blob: 31cbada623dfdb1eb4889b012bcdf5cd963f46d6 [file] [log] [blame]
Sean Paule0c4c3d2015-01-20 16:56:04 -05001/*
2 * Copyright (C) 2015 The Android Open Source Project
3 *
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
7 *
8 * http://www.apache.org/licenses/LICENSE-2.0
9 *
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
15 */
16
Stéphane Marchesinbe98c8c2015-06-23 16:18:10 -070017#define ATRACE_TAG ATRACE_TAG_GRAPHICS
Sean Paule0c4c3d2015-01-20 16:56:04 -050018#define LOG_TAG "hwcomposer-drm"
19
Sean Paulef8f1f92015-04-29 16:05:23 -040020#include "drm_hwcomposer.h"
Sean Paul6a55e9f2015-04-30 15:31:06 -040021#include "drmresources.h"
Sean Paulda6270d2015-06-01 14:11:52 -040022#include "importer.h"
Haixia Shid21f5282015-10-05 14:35:09 -070023#include "virtualcompositorworker.h"
Sean Paul4057be32015-05-13 06:23:09 -070024#include "vsyncworker.h"
Sean Paulef8f1f92015-04-29 16:05:23 -040025
Zach Reizner09807052015-08-13 14:53:41 -070026#include <stdlib.h>
27
28#include <map>
29#include <vector>
Zach Reizner4a253652015-09-10 18:30:54 -070030#include <sstream>
Zach Reizner09807052015-08-13 14:53:41 -070031
Sean Paule0c4c3d2015-01-20 16:56:04 -050032#include <errno.h>
Sean Paulef8f1f92015-04-29 16:05:23 -040033#include <fcntl.h>
Sean Paulef8f1f92015-04-29 16:05:23 -040034#include <pthread.h>
Sean Paule0c4c3d2015-01-20 16:56:04 -050035#include <sys/param.h>
Sean Paul9aa5ad32015-01-22 15:47:54 -050036#include <sys/resource.h>
Sean Paule0c4c3d2015-01-20 16:56:04 -050037#include <xf86drm.h>
38#include <xf86drmMode.h>
Sean Paule0c4c3d2015-01-20 16:56:04 -050039
Sean Paulef8f1f92015-04-29 16:05:23 -040040#include <cutils/log.h>
41#include <cutils/properties.h>
Sean Paule0c4c3d2015-01-20 16:56:04 -050042#include <hardware/hardware.h>
43#include <hardware/hwcomposer.h>
Zach Reizner4a253652015-09-10 18:30:54 -070044#include <sw_sync.h>
45#include <sync/sync.h>
Stéphane Marchesinbe98c8c2015-06-23 16:18:10 -070046#include <utils/Trace.h>
Sean Paule0c4c3d2015-01-20 16:56:04 -050047
Sean Paule0c4c3d2015-01-20 16:56:04 -050048#define UM_PER_INCH 25400
Stéphane Marchesincb3f9842015-06-19 14:50:45 -070049#define HWC_FB_BUFFERS 3
Sean Paule0c4c3d2015-01-20 16:56:04 -050050
Sean Paul6a55e9f2015-04-30 15:31:06 -040051namespace android {
Sean Paule0c4c3d2015-01-20 16:56:04 -050052
Zach Reizner4a253652015-09-10 18:30:54 -070053class DummySwSyncTimeline {
54 public:
55 int Init() {
56 int ret = timeline_fd_.Set(sw_sync_timeline_create());
57 if (ret < 0)
58 return ret;
59 return 0;
60 }
61
62 UniqueFd CreateDummyFence() {
63 int ret = sw_sync_fence_create(timeline_fd_.get(), "dummy fence",
64 timeline_pt_ + 1);
65 if (ret < 0) {
66 ALOGE("Failed to create dummy fence %d", ret);
67 return ret;
68 }
69
70 UniqueFd ret_fd(ret);
71
72 ret = sw_sync_timeline_inc(timeline_fd_.get(), 1);
73 if (ret) {
74 ALOGE("Failed to increment dummy sync timeline %d", ret);
75 return ret;
76 }
77
78 ++timeline_pt_;
79 return ret_fd;
80 }
81
82 private:
83 UniqueFd timeline_fd_;
84 int timeline_pt_ = 0;
85};
86
87struct CheckedOutputFd {
88 CheckedOutputFd(int *fd, const char *description,
89 DummySwSyncTimeline &timeline)
90 : fd_(fd), description_(description), timeline_(timeline) {
91 }
92 CheckedOutputFd(CheckedOutputFd &&rhs)
93 : description_(rhs.description_), timeline_(rhs.timeline_) {
94 std::swap(fd_, rhs.fd_);
95 }
96
97 CheckedOutputFd &operator=(const CheckedOutputFd &rhs) = delete;
98
99 ~CheckedOutputFd() {
100 if (fd_ == NULL)
101 return;
102
103 if (*fd_ >= 0)
104 return;
105
106 *fd_ = timeline_.CreateDummyFence().Release();
107
108 if (*fd_ < 0)
109 ALOGE("Failed to fill %s (%p == %d) before destruction",
110 description_.c_str(), fd_, *fd_);
111 }
112
113 private:
114 int *fd_ = NULL;
115 std::string description_;
116 DummySwSyncTimeline &timeline_;
117};
118
Sean Paule42febf2015-05-07 11:35:29 -0700119typedef struct hwc_drm_display {
Sean Paulef8f1f92015-04-29 16:05:23 -0400120 struct hwc_context_t *ctx;
121 int display;
Sean Paul9aa5ad32015-01-22 15:47:54 -0500122
Sean Paul6a55e9f2015-04-30 15:31:06 -0400123 std::vector<uint32_t> config_ids;
Sean Paul9aa5ad32015-01-22 15:47:54 -0500124
Sean Paul4057be32015-05-13 06:23:09 -0700125 VSyncWorker vsync_worker;
Sean Paule42febf2015-05-07 11:35:29 -0700126} hwc_drm_display_t;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500127
128struct hwc_context_t {
Sean Paule42febf2015-05-07 11:35:29 -0700129 // map of display:hwc_drm_display_t
130 typedef std::map<int, hwc_drm_display_t> DisplayMap;
131 typedef DisplayMap::iterator DisplayMapIter;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500132
Zach Reizner1946fa72015-08-14 11:14:38 -0700133 hwc_context_t() : procs(NULL), importer(NULL), use_framebuffer_target(false) {
Sean Paulda6270d2015-06-01 14:11:52 -0400134 }
135
136 ~hwc_context_t() {
Haixia Shid21f5282015-10-05 14:35:09 -0700137 virtual_compositor_worker.Exit();
Sean Paulda6270d2015-06-01 14:11:52 -0400138 delete importer;
139 }
140
Sean Paule42febf2015-05-07 11:35:29 -0700141 hwc_composer_device_1_t device;
Sean Paulef8f1f92015-04-29 16:05:23 -0400142 hwc_procs_t const *procs;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500143
Sean Paule42febf2015-05-07 11:35:29 -0700144 DisplayMap displays;
Sean Paul6a55e9f2015-04-30 15:31:06 -0400145 DrmResources drm;
Sean Paulda6270d2015-06-01 14:11:52 -0400146 Importer *importer;
Zach Reizner4a253652015-09-10 18:30:54 -0700147 const gralloc_module_t *gralloc;
148 DummySwSyncTimeline dummy_timeline;
Zach Reizner1946fa72015-08-14 11:14:38 -0700149 bool use_framebuffer_target;
Haixia Shid21f5282015-10-05 14:35:09 -0700150 VirtualCompositorWorker virtual_compositor_worker;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500151};
152
Zach Reizner4a253652015-09-10 18:30:54 -0700153static native_handle_t *dup_buffer_handle(buffer_handle_t handle) {
154 native_handle_t *new_handle =
155 native_handle_create(handle->numFds, handle->numInts);
156 if (new_handle == NULL)
157 return NULL;
158
159 const int *old_data = handle->data;
160 int *new_data = new_handle->data;
161 for (int i = 0; i < handle->numFds; i++) {
162 *new_data = dup(*old_data);
163 old_data++;
164 new_data++;
165 }
166 memcpy(new_data, old_data, sizeof(int) * handle->numInts);
167
168 return new_handle;
169}
170
171static void free_buffer_handle(native_handle_t *handle) {
172 int ret = native_handle_close(handle);
173 if (ret)
174 ALOGE("Failed to close native handle %d", ret);
175 ret = native_handle_delete(handle);
176 if (ret)
177 ALOGE("Failed to delete native handle %d", ret);
178}
179
180OutputFd &OutputFd::operator=(OutputFd &&rhs) {
181 if (fd_ == NULL) {
182 std::swap(fd_, rhs.fd_);
183 } else {
184 if (*fd_ < 0) {
185 ALOGE("Failed to fill OutputFd %p before assignment", fd_);
186 }
187 fd_ = rhs.fd_;
188 rhs.fd_ = NULL;
189 }
190
191 return *this;
192}
193
Zach Reiznerf99d53f2015-10-09 13:02:55 -0700194const hwc_drm_bo *DrmHwcBuffer::operator->() const {
Zach Reizner4a253652015-09-10 18:30:54 -0700195 if (importer_ == NULL) {
Zach Reiznerf99d53f2015-10-09 13:02:55 -0700196 ALOGE("Access of non-existent BO");
Zach Reizner4a253652015-09-10 18:30:54 -0700197 exit(1);
198 return NULL;
199 }
200 return &bo_;
201}
202
203void DrmHwcBuffer::Clear() {
204 if (importer_ != NULL) {
205 importer_->ReleaseBuffer(&bo_);
206 importer_ = NULL;
207 }
208}
209
210int DrmHwcBuffer::ImportBuffer(buffer_handle_t handle, Importer *importer) {
211 hwc_drm_bo tmp_bo;
212
213 int ret = importer->ImportBuffer(handle, &tmp_bo);
214 if (ret)
215 return ret;
216
217 if (importer_ != NULL) {
218 importer_->ReleaseBuffer(&bo_);
219 }
220
221 importer_ = importer;
222
223 bo_ = tmp_bo;
224
225 return 0;
226}
227
228int DrmHwcNativeHandle::CopyBufferHandle(buffer_handle_t handle,
229 const gralloc_module_t *gralloc) {
230 native_handle_t *handle_copy = dup_buffer_handle(handle);
231 if (handle_copy == NULL) {
232 ALOGE("Failed to duplicate handle");
233 return -ENOMEM;
234 }
235
236 int ret = gralloc->registerBuffer(gralloc, handle_copy);
237 if (ret) {
238 ALOGE("Failed to register buffer handle %d", ret);
239 free_buffer_handle(handle_copy);
240 return ret;
241 }
242
243 Clear();
244
245 gralloc_ = gralloc;
246 handle_ = handle_copy;
247
248 return 0;
249}
250
251DrmHwcNativeHandle::~DrmHwcNativeHandle() {
252 Clear();
253}
254
255void DrmHwcNativeHandle::Clear() {
256 if (gralloc_ != NULL && handle_ != NULL) {
257 gralloc_->unregisterBuffer(gralloc_, handle_);
258 free_buffer_handle(handle_);
259 gralloc_ = NULL;
260 handle_ = NULL;
261 }
262}
263
264int DrmHwcLayer::InitFromHwcLayer(hwc_layer_1_t *sf_layer, Importer *importer,
265 const gralloc_module_t *gralloc) {
266 sf_handle = sf_layer->handle;
Zach Reizner4a253652015-09-10 18:30:54 -0700267 alpha = sf_layer->planeAlpha;
268
Zach Reizner7e88be92015-10-12 15:20:33 -0700269 source_crop = DrmHwcRect<float>(
270 sf_layer->sourceCropf.left, sf_layer->sourceCropf.top,
271 sf_layer->sourceCropf.right, sf_layer->sourceCropf.bottom);
272 display_frame = DrmHwcRect<int>(
273 sf_layer->displayFrame.left, sf_layer->displayFrame.top,
274 sf_layer->displayFrame.right, sf_layer->displayFrame.bottom);
275
Zach Reizner4a253652015-09-10 18:30:54 -0700276 switch (sf_layer->transform) {
277 case 0:
278 transform = DrmHwcTransform::kIdentity;
279 break;
280 case HWC_TRANSFORM_FLIP_H:
281 transform = DrmHwcTransform::kFlipH;
282 break;
283 case HWC_TRANSFORM_FLIP_V:
284 transform = DrmHwcTransform::kFlipV;
285 break;
286 case HWC_TRANSFORM_ROT_90:
287 transform = DrmHwcTransform::kRotate90;
288 break;
289 case HWC_TRANSFORM_ROT_180:
290 transform = DrmHwcTransform::kRotate180;
291 break;
292 case HWC_TRANSFORM_ROT_270:
293 transform = DrmHwcTransform::kRotate270;
294 break;
295 default:
296 ALOGE("Invalid transform in hwc_layer_1_t %d", sf_layer->transform);
297 return -EINVAL;
298 }
299
300 switch (sf_layer->blending) {
301 case HWC_BLENDING_NONE:
302 blending = DrmHwcBlending::kNone;
303 break;
304 case HWC_BLENDING_PREMULT:
305 blending = DrmHwcBlending::kPreMult;
306 break;
307 case HWC_BLENDING_COVERAGE:
308 blending = DrmHwcBlending::kCoverage;
309 break;
310 default:
311 ALOGE("Invalid blending in hwc_layer_1_t %d", sf_layer->blending);
312 return -EINVAL;
313 }
314
Zach Reizner7e88be92015-10-12 15:20:33 -0700315 int ret = buffer.ImportBuffer(sf_layer->handle, importer);
316 if (ret)
317 return ret;
318
319 ret = handle.CopyBufferHandle(sf_layer->handle, gralloc);
320 if (ret)
321 return ret;
Zach Reizner4a253652015-09-10 18:30:54 -0700322
323 return 0;
324}
325
Zach Reiznerc6520e42015-08-13 14:32:09 -0700326static void hwc_dump(struct hwc_composer_device_1 *dev, char *buff,
Sean Paul9046c642015-06-10 17:27:47 -0400327 int buff_len) {
328 struct hwc_context_t *ctx = (struct hwc_context_t *)&dev->common;
329 std::ostringstream out;
330
331 ctx->drm.compositor()->Dump(&out);
332 std::string out_str = out.str();
Zach Reiznerfd6dc332015-10-13 21:12:48 -0700333 strncpy(buff, out_str.c_str(),
334 std::min((size_t)buff_len, out_str.length() + 1));
335 buff[buff_len - 1] = '\0';
Sean Paul9046c642015-06-10 17:27:47 -0400336}
337
Sean Paulb386f1b2015-05-13 06:33:23 -0700338static int hwc_prepare(hwc_composer_device_1_t *dev, size_t num_displays,
Sean Paulef8f1f92015-04-29 16:05:23 -0400339 hwc_display_contents_1_t **display_contents) {
Sean Paulb386f1b2015-05-13 06:33:23 -0700340 struct hwc_context_t *ctx = (struct hwc_context_t *)&dev->common;
Zach Reizner1946fa72015-08-14 11:14:38 -0700341
342 char use_framebuffer_target[PROPERTY_VALUE_MAX];
343 property_get("hwc.drm.use_framebuffer_target", use_framebuffer_target, "0");
344 bool new_use_framebuffer_target = atoi(use_framebuffer_target);
345 if (ctx->use_framebuffer_target != new_use_framebuffer_target)
346 ALOGW("Starting to %s HWC_FRAMEBUFFER_TARGET",
347 new_use_framebuffer_target ? "use" : "not use");
348 ctx->use_framebuffer_target = new_use_framebuffer_target;
349
Sean Paule42febf2015-05-07 11:35:29 -0700350 for (int i = 0; i < (int)num_displays; ++i) {
Sean Paulef8f1f92015-04-29 16:05:23 -0400351 if (!display_contents[i])
352 continue;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500353
Haixia Shid21f5282015-10-05 14:35:09 -0700354 bool use_framebuffer_target = ctx->use_framebuffer_target;
355 if (i == HWC_DISPLAY_VIRTUAL) {
356 use_framebuffer_target = true;
357 } else {
358 DrmCrtc *crtc = ctx->drm.GetCrtcForDisplay(i);
359 if (!crtc) {
360 ALOGE("No crtc for display %d", i);
361 return -ENODEV;
362 }
Sean Paulb386f1b2015-05-13 06:33:23 -0700363 }
Sean Paulb386f1b2015-05-13 06:33:23 -0700364
Zach Reizner45624d32015-06-10 16:03:01 -0700365 int num_layers = display_contents[i]->numHwLayers;
366 for (int j = 0; j < num_layers; j++) {
Sean Paulb386f1b2015-05-13 06:33:23 -0700367 hwc_layer_1_t *layer = &display_contents[i]->hwLayers[j];
Zach Reizner45624d32015-06-10 16:03:01 -0700368
Haixia Shid21f5282015-10-05 14:35:09 -0700369 if (!use_framebuffer_target) {
Zach Reizner1946fa72015-08-14 11:14:38 -0700370 if (layer->compositionType == HWC_FRAMEBUFFER)
371 layer->compositionType = HWC_OVERLAY;
372 } else {
373 switch (layer->compositionType) {
374 case HWC_OVERLAY:
375 case HWC_BACKGROUND:
376 case HWC_SIDEBAND:
377 case HWC_CURSOR_OVERLAY:
378 layer->compositionType = HWC_FRAMEBUFFER;
379 break;
380 }
381 }
Sean Paulef8f1f92015-04-29 16:05:23 -0400382 }
383 }
Sean Pauldffca952015-02-04 10:19:55 -0800384
Sean Paulef8f1f92015-04-29 16:05:23 -0400385 return 0;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500386}
387
Zach Reizner09807052015-08-13 14:53:41 -0700388static void hwc_add_layer_to_retire_fence(
389 hwc_layer_1_t *layer, hwc_display_contents_1_t *display_contents) {
Sean Paul04206122015-07-16 15:59:24 -0400390 if (layer->releaseFenceFd < 0)
391 return;
392
393 if (display_contents->retireFenceFd >= 0) {
394 int old_retire_fence = display_contents->retireFenceFd;
Zach Reiznerc6520e42015-08-13 14:32:09 -0700395 display_contents->retireFenceFd =
396 sync_merge("dc_retire", old_retire_fence, layer->releaseFenceFd);
Sean Paul04206122015-07-16 15:59:24 -0400397 close(old_retire_fence);
398 } else {
399 display_contents->retireFenceFd = dup(layer->releaseFenceFd);
400 }
401}
402
Sean Paule0c4c3d2015-01-20 16:56:04 -0500403static int hwc_set(hwc_composer_device_1_t *dev, size_t num_displays,
Zach Reizner4a253652015-09-10 18:30:54 -0700404 hwc_display_contents_1_t **sf_display_contents) {
Stéphane Marchesinbe98c8c2015-06-23 16:18:10 -0700405 ATRACE_CALL();
Sean Paulef8f1f92015-04-29 16:05:23 -0400406 struct hwc_context_t *ctx = (struct hwc_context_t *)&dev->common;
Zach Reizner4a253652015-09-10 18:30:54 -0700407 int ret = 0;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500408
Zach Reizner4a253652015-09-10 18:30:54 -0700409 std::vector<CheckedOutputFd> checked_output_fences;
410 std::vector<DrmHwcDisplayContents> displays_contents;
Zach Reizner09807052015-08-13 14:53:41 -0700411 std::vector<DrmCompositionDisplayLayersMap> layers_map;
412 std::vector<std::vector<size_t>> layers_indices;
Zach Reizner4a253652015-09-10 18:30:54 -0700413 displays_contents.reserve(num_displays);
414 // layers_map.reserve(num_displays);
Zach Reizner09807052015-08-13 14:53:41 -0700415 layers_indices.reserve(num_displays);
416
Zach Reizner4a253652015-09-10 18:30:54 -0700417 // Phase one does nothing that would cause errors. Only take ownership of FDs.
418 for (size_t i = 0; i < num_displays; ++i) {
419 hwc_display_contents_1_t *dc = sf_display_contents[i];
420 displays_contents.emplace_back();
421 DrmHwcDisplayContents &display_contents = displays_contents.back();
Haixia Shi7acc59b2015-09-30 10:57:54 -0700422 layers_indices.emplace_back();
423 std::vector<size_t> &indices_to_composite = layers_indices.back();
Zach Reizner4a253652015-09-10 18:30:54 -0700424
425 if (!sf_display_contents[i])
Sean Paulb386f1b2015-05-13 06:33:23 -0700426 continue;
Zach Reizner09807052015-08-13 14:53:41 -0700427
Haixia Shid21f5282015-10-05 14:35:09 -0700428 if (i == HWC_DISPLAY_VIRTUAL) {
429 ctx->virtual_compositor_worker.QueueComposite(dc);
430 continue;
431 }
432
Zach Reizner4a253652015-09-10 18:30:54 -0700433 std::ostringstream display_index_formatter;
434 display_index_formatter << "retire fence for display " << i;
435 std::string display_fence_description(display_index_formatter.str());
436 checked_output_fences.emplace_back(&dc->retireFenceFd,
437 display_fence_description.c_str(),
438 ctx->dummy_timeline);
439 display_contents.retire_fence = OutputFd(&dc->retireFenceFd);
Zach Reizner09807052015-08-13 14:53:41 -0700440
Zach Reizner4a253652015-09-10 18:30:54 -0700441 size_t num_dc_layers = dc->numHwLayers;
Haixia Shi1034bb72015-09-09 12:08:20 -0700442 int framebuffer_target_index = -1;
Zach Reizner4a253652015-09-10 18:30:54 -0700443 for (size_t j = 0; j < num_dc_layers; ++j) {
444 hwc_layer_1_t *sf_layer = &dc->hwLayers[j];
445
446 display_contents.layers.emplace_back();
447 DrmHwcLayer &layer = display_contents.layers.back();
448
449 if (sf_layer->flags & HWC_SKIP_LAYER)
Sean Paulb386f1b2015-05-13 06:33:23 -0700450 continue;
Zach Reizner4a253652015-09-10 18:30:54 -0700451
Zach Reizner1946fa72015-08-14 11:14:38 -0700452 if (!ctx->use_framebuffer_target) {
Zach Reizner4a253652015-09-10 18:30:54 -0700453 if (sf_layer->compositionType == HWC_OVERLAY)
Zach Reizner1946fa72015-08-14 11:14:38 -0700454 indices_to_composite.push_back(j);
Zach Reizner4a253652015-09-10 18:30:54 -0700455 if (sf_layer->compositionType == HWC_FRAMEBUFFER_TARGET)
Haixia Shi1034bb72015-09-09 12:08:20 -0700456 framebuffer_target_index = j;
Zach Reizner1946fa72015-08-14 11:14:38 -0700457 } else {
Zach Reizner4a253652015-09-10 18:30:54 -0700458 if (sf_layer->compositionType == HWC_FRAMEBUFFER_TARGET)
Zach Reizner1946fa72015-08-14 11:14:38 -0700459 indices_to_composite.push_back(j);
460 }
Zach Reizner4a253652015-09-10 18:30:54 -0700461
462 layer.acquire_fence.Set(sf_layer->acquireFenceFd);
463 sf_layer->acquireFenceFd = -1;
464
465 std::ostringstream layer_fence_formatter;
466 layer_fence_formatter << "release fence for layer " << j << " of display "
467 << i;
468 std::string layer_fence_description(layer_fence_formatter.str());
469 checked_output_fences.emplace_back(&sf_layer->releaseFenceFd,
470 layer_fence_description.c_str(),
471 ctx->dummy_timeline);
472 layer.release_fence = OutputFd(&sf_layer->releaseFenceFd);
Zach Reizner1946fa72015-08-14 11:14:38 -0700473 }
Zach Reizner4a253652015-09-10 18:30:54 -0700474
Zach Reizner1946fa72015-08-14 11:14:38 -0700475 if (ctx->use_framebuffer_target) {
476 if (indices_to_composite.size() != 1) {
477 ALOGE("Expected 1 (got %d) layer with HWC_FRAMEBUFFER_TARGET",
478 indices_to_composite.size());
Zach Reizner4a253652015-09-10 18:30:54 -0700479 ret = -EINVAL;
Zach Reizner1946fa72015-08-14 11:14:38 -0700480 }
Haixia Shi1034bb72015-09-09 12:08:20 -0700481 } else {
482 if (indices_to_composite.empty() && framebuffer_target_index >= 0) {
Zach Reizner4a253652015-09-10 18:30:54 -0700483 hwc_layer_1_t *sf_layer = &dc->hwLayers[framebuffer_target_index];
484 if (!sf_layer->handle || (sf_layer->flags & HWC_SKIP_LAYER)) {
485 ALOGE(
486 "Expected valid layer with HWC_FRAMEBUFFER_TARGET when all "
487 "HWC_OVERLAY layers are skipped.");
488 ret = -EINVAL;
Haixia Shi1034bb72015-09-09 12:08:20 -0700489 }
490 indices_to_composite.push_back(framebuffer_target_index);
491 }
Zach Reizner45624d32015-06-10 16:03:01 -0700492 }
Zach Reizner4a253652015-09-10 18:30:54 -0700493 }
Zach Reizner45624d32015-06-10 16:03:01 -0700494
Zach Reizner4a253652015-09-10 18:30:54 -0700495 if (ret)
496 return ret;
497
498 for (size_t i = 0; i < num_displays; ++i) {
499 hwc_display_contents_1_t *dc = sf_display_contents[i];
500 DrmHwcDisplayContents &display_contents = displays_contents[i];
Haixia Shi2fddd372015-10-15 16:21:48 -0700501 if (!sf_display_contents[i] || i == HWC_DISPLAY_VIRTUAL)
Zach Reizner4a253652015-09-10 18:30:54 -0700502 continue;
503
504 layers_map.emplace_back();
505 DrmCompositionDisplayLayersMap &map = layers_map.back();
Zach Reizneracba14b2015-10-13 18:19:26 -0700506 map.display = i;
Zach Reizner4a253652015-09-10 18:30:54 -0700507 std::vector<size_t> &indices_to_composite = layers_indices[i];
508 for (size_t j : indices_to_composite) {
509 hwc_layer_1_t *sf_layer = &dc->hwLayers[j];
510
511 DrmHwcLayer &layer = display_contents.layers[j];
512
Zach Reizner7e88be92015-10-12 15:20:33 -0700513 ret = layer.InitFromHwcLayer(sf_layer, ctx->importer, ctx->gralloc);
514 if (ret) {
515 ALOGE("Failed to init composition from layer %d", ret);
516 return ret;
517 }
Zach Reizner4a253652015-09-10 18:30:54 -0700518 map.layers.emplace_back(std::move(layer));
519 }
520 }
521
522 std::unique_ptr<DrmComposition> composition(
523 ctx->drm.compositor()->CreateComposition(ctx->importer));
524 if (!composition) {
525 ALOGE("Drm composition init failed");
526 return -EINVAL;
Zach Reizner09807052015-08-13 14:53:41 -0700527 }
Zach Reizner45624d32015-06-10 16:03:01 -0700528
Zach Reizner09807052015-08-13 14:53:41 -0700529 ret = composition->SetLayers(layers_map.size(), layers_map.data());
530 if (ret) {
Zach Reizner09807052015-08-13 14:53:41 -0700531 return -EINVAL;
532 }
Zach Reizner45624d32015-06-10 16:03:01 -0700533
Zach Reizner09807052015-08-13 14:53:41 -0700534 ret = ctx->drm.compositor()->QueueComposition(std::move(composition));
535 if (ret) {
Zach Reizner09807052015-08-13 14:53:41 -0700536 return -EINVAL;
537 }
538
Zach Reizner566da2b2015-10-06 15:39:09 -0700539 for (size_t i = 0; i < num_displays; ++i) {
540 hwc_display_contents_1_t *dc = sf_display_contents[i];
541 if (!dc)
542 continue;
543
544 size_t num_dc_layers = dc->numHwLayers;
545 for (size_t j = 0; j < num_dc_layers; ++j) {
546 hwc_layer_1_t *layer = &dc->hwLayers[j];
547 if (layer->flags & HWC_SKIP_LAYER)
548 continue;
549 hwc_add_layer_to_retire_fence(layer, dc);
550 }
551 }
552
Zach Reizner09807052015-08-13 14:53:41 -0700553 composition.reset(NULL);
554
Sean Paulef8f1f92015-04-29 16:05:23 -0400555 return ret;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500556}
557
Sean Paulef8f1f92015-04-29 16:05:23 -0400558static int hwc_event_control(struct hwc_composer_device_1 *dev, int display,
559 int event, int enabled) {
Sean Paulef8f1f92015-04-29 16:05:23 -0400560 if (event != HWC_EVENT_VSYNC || (enabled != 0 && enabled != 1))
561 return -EINVAL;
Sean Pauleb9e75c2015-01-25 23:31:30 -0500562
Sean Paul4057be32015-05-13 06:23:09 -0700563 struct hwc_context_t *ctx = (struct hwc_context_t *)&dev->common;
564 hwc_drm_display_t *hd = &ctx->displays[display];
565 return hd->vsync_worker.VSyncControl(enabled);
Sean Paule0c4c3d2015-01-20 16:56:04 -0500566}
567
Sean Paulef8f1f92015-04-29 16:05:23 -0400568static int hwc_set_power_mode(struct hwc_composer_device_1 *dev, int display,
569 int mode) {
570 struct hwc_context_t *ctx = (struct hwc_context_t *)&dev->common;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500571
Sean Paul6a55e9f2015-04-30 15:31:06 -0400572 uint64_t dpmsValue = 0;
Sean Paulef8f1f92015-04-29 16:05:23 -0400573 switch (mode) {
574 case HWC_POWER_MODE_OFF:
Sean Paul6a55e9f2015-04-30 15:31:06 -0400575 dpmsValue = DRM_MODE_DPMS_OFF;
Sean Paulef8f1f92015-04-29 16:05:23 -0400576 break;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500577
Sean Paulef8f1f92015-04-29 16:05:23 -0400578 /* We can't support dozing right now, so go full on */
579 case HWC_POWER_MODE_DOZE:
580 case HWC_POWER_MODE_DOZE_SUSPEND:
581 case HWC_POWER_MODE_NORMAL:
Sean Paul6a55e9f2015-04-30 15:31:06 -0400582 dpmsValue = DRM_MODE_DPMS_ON;
Sean Paulef8f1f92015-04-29 16:05:23 -0400583 break;
584 };
Sean Paul6a55e9f2015-04-30 15:31:06 -0400585 return ctx->drm.SetDpmsMode(display, dpmsValue);
Sean Paule0c4c3d2015-01-20 16:56:04 -0500586}
587
Sean Paulef8f1f92015-04-29 16:05:23 -0400588static int hwc_query(struct hwc_composer_device_1 * /* dev */, int what,
589 int *value) {
590 switch (what) {
591 case HWC_BACKGROUND_LAYER_SUPPORTED:
592 *value = 0; /* TODO: We should do this */
593 break;
594 case HWC_VSYNC_PERIOD:
595 ALOGW("Query for deprecated vsync value, returning 60Hz");
596 *value = 1000 * 1000 * 1000 / 60;
597 break;
598 case HWC_DISPLAY_TYPES_SUPPORTED:
Haixia Shi2fddd372015-10-15 16:21:48 -0700599 *value = HWC_DISPLAY_PRIMARY_BIT | HWC_DISPLAY_EXTERNAL_BIT |
600 HWC_DISPLAY_VIRTUAL_BIT;
Sean Paulef8f1f92015-04-29 16:05:23 -0400601 break;
602 }
603 return 0;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500604}
605
Sean Paulef8f1f92015-04-29 16:05:23 -0400606static void hwc_register_procs(struct hwc_composer_device_1 *dev,
607 hwc_procs_t const *procs) {
608 struct hwc_context_t *ctx = (struct hwc_context_t *)&dev->common;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500609
Sean Paulef8f1f92015-04-29 16:05:23 -0400610 ctx->procs = procs;
Sean Paul4057be32015-05-13 06:23:09 -0700611
612 for (hwc_context_t::DisplayMapIter iter = ctx->displays.begin();
613 iter != ctx->displays.end(); ++iter) {
614 iter->second.vsync_worker.SetProcs(procs);
615 }
Sean Paule0c4c3d2015-01-20 16:56:04 -0500616}
617
Sean Paulef8f1f92015-04-29 16:05:23 -0400618static int hwc_get_display_configs(struct hwc_composer_device_1 *dev,
619 int display, uint32_t *configs,
Sean Paul6a55e9f2015-04-30 15:31:06 -0400620 size_t *num_configs) {
621 if (!*num_configs)
Sean Paulef8f1f92015-04-29 16:05:23 -0400622 return 0;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500623
Sean Paulef8f1f92015-04-29 16:05:23 -0400624 struct hwc_context_t *ctx = (struct hwc_context_t *)&dev->common;
Sean Paule42febf2015-05-07 11:35:29 -0700625 hwc_drm_display_t *hd = &ctx->displays[display];
Sean Paul6a55e9f2015-04-30 15:31:06 -0400626 hd->config_ids.clear();
627
628 DrmConnector *connector = ctx->drm.GetConnectorForDisplay(display);
629 if (!connector) {
630 ALOGE("Failed to get connector for display %d", display);
Sean Paulef8f1f92015-04-29 16:05:23 -0400631 return -ENODEV;
632 }
Sean Paule0c4c3d2015-01-20 16:56:04 -0500633
Sean Paule42febf2015-05-07 11:35:29 -0700634 int ret = connector->UpdateModes();
Sean Paul6a55e9f2015-04-30 15:31:06 -0400635 if (ret) {
636 ALOGE("Failed to update display modes %d", ret);
Sean Paulef8f1f92015-04-29 16:05:23 -0400637 return ret;
Sean Paulef8f1f92015-04-29 16:05:23 -0400638 }
Sean Paule0c4c3d2015-01-20 16:56:04 -0500639
Sean Paul6a55e9f2015-04-30 15:31:06 -0400640 for (DrmConnector::ModeIter iter = connector->begin_modes();
641 iter != connector->end_modes(); ++iter) {
642 size_t idx = hd->config_ids.size();
643 if (idx == *num_configs)
644 break;
645 hd->config_ids.push_back(iter->id());
646 configs[idx] = iter->id();
647 }
648 *num_configs = hd->config_ids.size();
649 return *num_configs == 0 ? -1 : 0;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500650}
651
Sean Paulef8f1f92015-04-29 16:05:23 -0400652static int hwc_get_display_attributes(struct hwc_composer_device_1 *dev,
653 int display, uint32_t config,
654 const uint32_t *attributes,
655 int32_t *values) {
656 struct hwc_context_t *ctx = (struct hwc_context_t *)&dev->common;
Sean Paul6a55e9f2015-04-30 15:31:06 -0400657 DrmConnector *c = ctx->drm.GetConnectorForDisplay(display);
Sean Paulef8f1f92015-04-29 16:05:23 -0400658 if (!c) {
Sean Paul6a55e9f2015-04-30 15:31:06 -0400659 ALOGE("Failed to get DrmConnector for display %d", display);
Sean Paulef8f1f92015-04-29 16:05:23 -0400660 return -ENODEV;
661 }
Sean Paul6a55e9f2015-04-30 15:31:06 -0400662 DrmMode mode;
663 for (DrmConnector::ModeIter iter = c->begin_modes(); iter != c->end_modes();
664 ++iter) {
665 if (iter->id() == config) {
666 mode = *iter;
667 break;
668 }
669 }
670 if (mode.id() == 0) {
671 ALOGE("Failed to find active mode for display %d", display);
672 return -ENOENT;
Sean Paulef8f1f92015-04-29 16:05:23 -0400673 }
Sean Paule0c4c3d2015-01-20 16:56:04 -0500674
Sean Paul6a55e9f2015-04-30 15:31:06 -0400675 uint32_t mm_width = c->mm_width();
676 uint32_t mm_height = c->mm_height();
Sean Paulef8f1f92015-04-29 16:05:23 -0400677 for (int i = 0; attributes[i] != HWC_DISPLAY_NO_ATTRIBUTE; ++i) {
678 switch (attributes[i]) {
679 case HWC_DISPLAY_VSYNC_PERIOD:
Sean Paul6a55e9f2015-04-30 15:31:06 -0400680 values[i] = 1000 * 1000 * 1000 / mode.v_refresh();
Sean Paulef8f1f92015-04-29 16:05:23 -0400681 break;
682 case HWC_DISPLAY_WIDTH:
Sean Paul6a55e9f2015-04-30 15:31:06 -0400683 values[i] = mode.h_display();
Sean Paulef8f1f92015-04-29 16:05:23 -0400684 break;
685 case HWC_DISPLAY_HEIGHT:
Sean Paul6a55e9f2015-04-30 15:31:06 -0400686 values[i] = mode.v_display();
Sean Paulef8f1f92015-04-29 16:05:23 -0400687 break;
688 case HWC_DISPLAY_DPI_X:
689 /* Dots per 1000 inches */
Sean Paul6a55e9f2015-04-30 15:31:06 -0400690 values[i] = mm_width ? (mode.h_display() * UM_PER_INCH) / mm_width : 0;
Sean Paulef8f1f92015-04-29 16:05:23 -0400691 break;
692 case HWC_DISPLAY_DPI_Y:
693 /* Dots per 1000 inches */
Sean Paul6a55e9f2015-04-30 15:31:06 -0400694 values[i] =
695 mm_height ? (mode.v_display() * UM_PER_INCH) / mm_height : 0;
Sean Paulef8f1f92015-04-29 16:05:23 -0400696 break;
697 }
698 }
Sean Paulef8f1f92015-04-29 16:05:23 -0400699 return 0;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500700}
701
Sean Paulef8f1f92015-04-29 16:05:23 -0400702static int hwc_get_active_config(struct hwc_composer_device_1 *dev,
703 int display) {
704 struct hwc_context_t *ctx = (struct hwc_context_t *)&dev->common;
Sean Paul6a55e9f2015-04-30 15:31:06 -0400705 DrmConnector *c = ctx->drm.GetConnectorForDisplay(display);
706 if (!c) {
707 ALOGE("Failed to get DrmConnector for display %d", display);
Sean Paulef8f1f92015-04-29 16:05:23 -0400708 return -ENODEV;
709 }
Sean Paule0c4c3d2015-01-20 16:56:04 -0500710
Sean Paul6a55e9f2015-04-30 15:31:06 -0400711 DrmMode mode = c->active_mode();
Sean Paule42febf2015-05-07 11:35:29 -0700712 hwc_drm_display_t *hd = &ctx->displays[display];
Sean Paul6a55e9f2015-04-30 15:31:06 -0400713 for (size_t i = 0; i < hd->config_ids.size(); ++i) {
714 if (hd->config_ids[i] == mode.id())
715 return i;
Sean Paulef8f1f92015-04-29 16:05:23 -0400716 }
Sean Paul6a55e9f2015-04-30 15:31:06 -0400717 return -1;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500718}
719
Sean Paulef8f1f92015-04-29 16:05:23 -0400720static int hwc_set_active_config(struct hwc_composer_device_1 *dev, int display,
721 int index) {
722 struct hwc_context_t *ctx = (struct hwc_context_t *)&dev->common;
Sean Paule42febf2015-05-07 11:35:29 -0700723 hwc_drm_display_t *hd = &ctx->displays[display];
Sean Paul6a55e9f2015-04-30 15:31:06 -0400724 if (index >= (int)hd->config_ids.size()) {
725 ALOGE("Invalid config index %d passed in", index);
726 return -EINVAL;
Sean Paulef8f1f92015-04-29 16:05:23 -0400727 }
Sean Paule0c4c3d2015-01-20 16:56:04 -0500728
Sean Paul877be972015-06-03 14:08:27 -0400729 DrmConnector *c = ctx->drm.GetConnectorForDisplay(display);
730 if (!c) {
731 ALOGE("Failed to get connector for display %d", display);
732 return -ENODEV;
733 }
734 DrmMode mode;
735 for (DrmConnector::ModeIter iter = c->begin_modes(); iter != c->end_modes();
736 ++iter) {
737 if (iter->id() == hd->config_ids[index]) {
738 mode = *iter;
739 break;
740 }
741 }
742 if (mode.id() != hd->config_ids[index]) {
743 ALOGE("Could not find active mode for %d/%d", index, hd->config_ids[index]);
744 return -ENOENT;
745 }
746 int ret = ctx->drm.SetDisplayActiveMode(display, mode);
Sean Paul6a55e9f2015-04-30 15:31:06 -0400747 if (ret) {
Sean Paul877be972015-06-03 14:08:27 -0400748 ALOGE("Failed to set active config %d", ret);
Sean Paul6a55e9f2015-04-30 15:31:06 -0400749 return ret;
Sean Paulef8f1f92015-04-29 16:05:23 -0400750 }
Sean Paul6a55e9f2015-04-30 15:31:06 -0400751 return ret;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500752}
753
Sean Paulef8f1f92015-04-29 16:05:23 -0400754static int hwc_device_close(struct hw_device_t *dev) {
755 struct hwc_context_t *ctx = (struct hwc_context_t *)dev;
Sean Paulef8f1f92015-04-29 16:05:23 -0400756 delete ctx;
Sean Paulef8f1f92015-04-29 16:05:23 -0400757 return 0;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500758}
759
Sean Paul24a26e32015-02-04 10:34:47 -0800760/*
761 * TODO: This function sets the active config to the first one in the list. This
762 * should be fixed such that it selects the preferred mode for the display, or
763 * some other, saner, method of choosing the config.
764 */
Sean Paule42febf2015-05-07 11:35:29 -0700765static int hwc_set_initial_config(hwc_drm_display_t *hd) {
Sean Paulef8f1f92015-04-29 16:05:23 -0400766 uint32_t config;
767 size_t num_configs = 1;
768 int ret = hwc_get_display_configs(&hd->ctx->device, hd->display, &config,
769 &num_configs);
770 if (ret || !num_configs)
771 return 0;
Sean Paul24a26e32015-02-04 10:34:47 -0800772
Sean Paulef8f1f92015-04-29 16:05:23 -0400773 ret = hwc_set_active_config(&hd->ctx->device, hd->display, 0);
774 if (ret) {
775 ALOGE("Failed to set active config d=%d ret=%d", hd->display, ret);
776 return ret;
777 }
Sean Paul24a26e32015-02-04 10:34:47 -0800778
Sean Paulef8f1f92015-04-29 16:05:23 -0400779 return ret;
Sean Paul24a26e32015-02-04 10:34:47 -0800780}
781
Sean Paul6a55e9f2015-04-30 15:31:06 -0400782static int hwc_initialize_display(struct hwc_context_t *ctx, int display) {
Sean Paule42febf2015-05-07 11:35:29 -0700783 hwc_drm_display_t *hd = &ctx->displays[display];
Sean Paulef8f1f92015-04-29 16:05:23 -0400784 hd->ctx = ctx;
785 hd->display = display;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500786
Sean Paulb386f1b2015-05-13 06:33:23 -0700787 int ret = hwc_set_initial_config(hd);
Sean Paulef8f1f92015-04-29 16:05:23 -0400788 if (ret) {
789 ALOGE("Failed to set initial config for d=%d ret=%d", display, ret);
Sean Paulef8f1f92015-04-29 16:05:23 -0400790 return ret;
791 }
Sean Paul24a26e32015-02-04 10:34:47 -0800792
Sean Paul4057be32015-05-13 06:23:09 -0700793 ret = hd->vsync_worker.Init(&ctx->drm, display);
794 if (ret) {
795 ALOGE("Failed to create event worker for display %d %d\n", display, ret);
796 return ret;
797 }
798
Sean Paulef8f1f92015-04-29 16:05:23 -0400799 return 0;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500800}
801
Sean Paulef8f1f92015-04-29 16:05:23 -0400802static int hwc_enumerate_displays(struct hwc_context_t *ctx) {
Sean Paul6a55e9f2015-04-30 15:31:06 -0400803 int ret;
804 for (DrmResources::ConnectorIter c = ctx->drm.begin_connectors();
805 c != ctx->drm.end_connectors(); ++c) {
806 ret = hwc_initialize_display(ctx, (*c)->display());
807 if (ret) {
808 ALOGE("Failed to initialize display %d", (*c)->display());
809 return ret;
Sean Paulef8f1f92015-04-29 16:05:23 -0400810 }
811 }
Sean Paulef8f1f92015-04-29 16:05:23 -0400812
Haixia Shid21f5282015-10-05 14:35:09 -0700813 ret = ctx->virtual_compositor_worker.Init();
814 if (ret) {
815 ALOGE("Failed to initialize virtual compositor worker");
816 return ret;
817 }
Sean Paulef8f1f92015-04-29 16:05:23 -0400818 return 0;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500819}
820
Sean Paulef8f1f92015-04-29 16:05:23 -0400821static int hwc_device_open(const struct hw_module_t *module, const char *name,
822 struct hw_device_t **dev) {
823 if (strcmp(name, HWC_HARDWARE_COMPOSER)) {
824 ALOGE("Invalid module name- %s", name);
825 return -EINVAL;
826 }
827
828 struct hwc_context_t *ctx = new hwc_context_t();
829 if (!ctx) {
830 ALOGE("Failed to allocate hwc context");
831 return -ENOMEM;
832 }
833
Sean Paul6a55e9f2015-04-30 15:31:06 -0400834 int ret = ctx->drm.Init();
835 if (ret) {
836 ALOGE("Can't initialize Drm object %d", ret);
837 delete ctx;
838 return ret;
839 }
840
Zach Reizner4a253652015-09-10 18:30:54 -0700841 ret = hw_get_module(GRALLOC_HARDWARE_MODULE_ID,
842 (const hw_module_t **)&ctx->gralloc);
843 if (ret) {
844 ALOGE("Failed to open gralloc module %d", ret);
845 delete ctx;
846 return ret;
847 }
848
849 ret = ctx->dummy_timeline.Init();
850 if (ret) {
851 ALOGE("Failed to create dummy sw sync timeline %d", ret);
852 return ret;
853 }
854
Sean Paulda6270d2015-06-01 14:11:52 -0400855 ctx->importer = Importer::CreateInstance(&ctx->drm);
856 if (!ctx->importer) {
857 ALOGE("Failed to create importer instance");
Sean Paulef8f1f92015-04-29 16:05:23 -0400858 delete ctx;
859 return ret;
860 }
861
Sean Paulef8f1f92015-04-29 16:05:23 -0400862 ret = hwc_enumerate_displays(ctx);
863 if (ret) {
864 ALOGE("Failed to enumerate displays: %s", strerror(ret));
Sean Paul6a55e9f2015-04-30 15:31:06 -0400865 delete ctx;
866 return ret;
867 }
868
Sean Paulef8f1f92015-04-29 16:05:23 -0400869 ctx->device.common.tag = HARDWARE_DEVICE_TAG;
870 ctx->device.common.version = HWC_DEVICE_API_VERSION_1_4;
871 ctx->device.common.module = const_cast<hw_module_t *>(module);
872 ctx->device.common.close = hwc_device_close;
873
Sean Paul9046c642015-06-10 17:27:47 -0400874 ctx->device.dump = hwc_dump;
Sean Paulef8f1f92015-04-29 16:05:23 -0400875 ctx->device.prepare = hwc_prepare;
876 ctx->device.set = hwc_set;
877 ctx->device.eventControl = hwc_event_control;
878 ctx->device.setPowerMode = hwc_set_power_mode;
879 ctx->device.query = hwc_query;
880 ctx->device.registerProcs = hwc_register_procs;
881 ctx->device.getDisplayConfigs = hwc_get_display_configs;
882 ctx->device.getDisplayAttributes = hwc_get_display_attributes;
883 ctx->device.getActiveConfig = hwc_get_active_config;
884 ctx->device.setActiveConfig = hwc_set_active_config;
885 ctx->device.setCursorPositionAsync = NULL; /* TODO: Add cursor */
886
887 *dev = &ctx->device.common;
888
889 return 0;
890}
Sean Paul6a55e9f2015-04-30 15:31:06 -0400891}
Sean Paulef8f1f92015-04-29 16:05:23 -0400892
Sean Paul6a55e9f2015-04-30 15:31:06 -0400893static struct hw_module_methods_t hwc_module_methods = {
894 open : android::hwc_device_open
895};
Sean Paule0c4c3d2015-01-20 16:56:04 -0500896
897hwc_module_t HAL_MODULE_INFO_SYM = {
Sean Paulef8f1f92015-04-29 16:05:23 -0400898 common : {
899 tag : HARDWARE_MODULE_TAG,
900 version_major : 1,
901 version_minor : 0,
902 id : HWC_HARDWARE_MODULE_ID,
903 name : "DRM hwcomposer module",
904 author : "The Android Open Source Project",
905 methods : &hwc_module_methods,
906 dso : NULL,
907 reserved : {0},
908 }
Sean Paule0c4c3d2015-01-20 16:56:04 -0500909};