blob: 6c007bcfb8b9c29bc4d59852ee4d6342701b9c5e [file] [log] [blame]
Sean Paule0c4c3d2015-01-20 16:56:04 -05001/*
2 * Copyright (C) 2015 The Android Open Source Project
3 *
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
7 *
8 * http://www.apache.org/licenses/LICENSE-2.0
9 *
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
15 */
16
17#define LOG_TAG "hwcomposer-drm"
18
Sean Paulef8f1f92015-04-29 16:05:23 -040019#include "drm_hwcomposer.h"
Sean Paul6a55e9f2015-04-30 15:31:06 -040020#include "drmresources.h"
Zach Reizner45624d32015-06-10 16:03:01 -070021#include "gl_compositor.h"
Sean Paulda6270d2015-06-01 14:11:52 -040022#include "importer.h"
Sean Paul4057be32015-05-13 06:23:09 -070023#include "vsyncworker.h"
Sean Paulef8f1f92015-04-29 16:05:23 -040024
Sean Paule0c4c3d2015-01-20 16:56:04 -050025#include <errno.h>
Sean Paulef8f1f92015-04-29 16:05:23 -040026#include <fcntl.h>
Sean Paul5ad302c2015-05-11 10:43:31 -070027#include <list>
Sean Paule42febf2015-05-07 11:35:29 -070028#include <map>
Sean Paulef8f1f92015-04-29 16:05:23 -040029#include <pthread.h>
Dan Albertc5255b32015-05-07 23:42:54 -070030#include <stdlib.h>
Sean Paule0c4c3d2015-01-20 16:56:04 -050031#include <sys/param.h>
Sean Paul9aa5ad32015-01-22 15:47:54 -050032#include <sys/resource.h>
Sean Paule0c4c3d2015-01-20 16:56:04 -050033#include <xf86drm.h>
34#include <xf86drmMode.h>
Sean Paule0c4c3d2015-01-20 16:56:04 -050035
Sean Paulef8f1f92015-04-29 16:05:23 -040036#include <cutils/log.h>
37#include <cutils/properties.h>
Sean Paule0c4c3d2015-01-20 16:56:04 -050038#include <hardware/hardware.h>
39#include <hardware/hwcomposer.h>
Sean Paulf1dc1912015-01-24 01:34:31 -050040#include <sw_sync.h>
Sean Paulef8f1f92015-04-29 16:05:23 -040041#include <sync/sync.h>
Zach Reizner45624d32015-06-10 16:03:01 -070042#include <ui/GraphicBuffer.h>
43#include <ui/PixelFormat.h>
Sean Paule0c4c3d2015-01-20 16:56:04 -050044
Sean Paule0c4c3d2015-01-20 16:56:04 -050045#define UM_PER_INCH 25400
Zach Reizner45624d32015-06-10 16:03:01 -070046#define HWC_FB_BUFFERS 2
Sean Paule0c4c3d2015-01-20 16:56:04 -050047
Sean Paul6a55e9f2015-04-30 15:31:06 -040048namespace android {
Sean Paule0c4c3d2015-01-20 16:56:04 -050049
Zach Reizner45624d32015-06-10 16:03:01 -070050struct hwc_drm_display_framebuffer {
51 hwc_drm_display_framebuffer() : release_fence_fd_(-1) {
52 }
53
54 ~hwc_drm_display_framebuffer() {
55 if (release_fence_fd() >= 0)
56 close(release_fence_fd());
57 }
58
59 bool is_valid() {
60 return buffer_ != NULL;
61 }
62
63 sp<GraphicBuffer> buffer() {
64 return buffer_;
65 }
66
67 int release_fence_fd() {
68 return release_fence_fd_;
69 }
70
71 void set_release_fence_fd(int fd) {
72 if (release_fence_fd_ >= 0)
73 close(release_fence_fd_);
74 release_fence_fd_ = fd;
75 }
76
77 bool Allocate(uint32_t w, uint32_t h) {
78 if (is_valid()) {
79 if (buffer_->getWidth() == w && buffer_->getHeight() == h)
80 return true;
81
82 if (release_fence_fd_ >= 0) {
83 if (sync_wait(release_fence_fd_, -1) != 0) {
84 return false;
85 }
86 }
87 Clear();
88 }
89 buffer_ = new GraphicBuffer(w, h, android::PIXEL_FORMAT_RGBA_8888,
90 GRALLOC_USAGE_HW_FB | GRALLOC_USAGE_HW_RENDER |
91 GRALLOC_USAGE_HW_COMPOSER);
92 release_fence_fd_ = -1;
93 return is_valid();
94 }
95
96 void Clear() {
97 if (!is_valid())
98 return;
99
100 if (release_fence_fd_ >= 0) {
101 close(release_fence_fd_);
102 release_fence_fd_ = -1;
103 }
104
105 buffer_.clear();
106 }
107
108 int WaitReleased(int timeout_milliseconds) {
109 if (!is_valid())
110 return 0;
111 if (release_fence_fd_ < 0)
112 return 0;
113
114 int ret = sync_wait(release_fence_fd_, timeout_milliseconds);
115 return ret;
116 }
117
118 private:
119 sp<GraphicBuffer> buffer_;
120 int release_fence_fd_;
121};
122
123
Sean Paule42febf2015-05-07 11:35:29 -0700124typedef struct hwc_drm_display {
Sean Paulef8f1f92015-04-29 16:05:23 -0400125 struct hwc_context_t *ctx;
126 int display;
Sean Paul9aa5ad32015-01-22 15:47:54 -0500127
Sean Paul6a55e9f2015-04-30 15:31:06 -0400128 std::vector<uint32_t> config_ids;
Sean Paul9aa5ad32015-01-22 15:47:54 -0500129
Sean Paul4057be32015-05-13 06:23:09 -0700130 VSyncWorker vsync_worker;
Zach Reizner45624d32015-06-10 16:03:01 -0700131
132 hwc_drm_display_framebuffer fb_chain[HWC_FB_BUFFERS];
133 int fb_idx;
Sean Paule42febf2015-05-07 11:35:29 -0700134} hwc_drm_display_t;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500135
136struct hwc_context_t {
Sean Paule42febf2015-05-07 11:35:29 -0700137 // map of display:hwc_drm_display_t
138 typedef std::map<int, hwc_drm_display_t> DisplayMap;
139 typedef DisplayMap::iterator DisplayMapIter;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500140
Sean Paulda6270d2015-06-01 14:11:52 -0400141 hwc_context_t() : procs(NULL), importer(NULL) {
142 }
143
144 ~hwc_context_t() {
145 delete importer;
146 }
147
Sean Paule42febf2015-05-07 11:35:29 -0700148 hwc_composer_device_1_t device;
Sean Paulef8f1f92015-04-29 16:05:23 -0400149 hwc_procs_t const *procs;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500150
Sean Paule42febf2015-05-07 11:35:29 -0700151 DisplayMap displays;
Sean Paul6a55e9f2015-04-30 15:31:06 -0400152 DrmResources drm;
Sean Paulda6270d2015-06-01 14:11:52 -0400153 Importer *importer;
Zach Reizner45624d32015-06-10 16:03:01 -0700154 GLCompositor pre_compositor;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500155};
156
Sean Paul9046c642015-06-10 17:27:47 -0400157static void hwc_dump(struct hwc_composer_device_1* dev, char *buff,
158 int buff_len) {
159 struct hwc_context_t *ctx = (struct hwc_context_t *)&dev->common;
160 std::ostringstream out;
161
162 ctx->drm.compositor()->Dump(&out);
163 std::string out_str = out.str();
164 strncpy(buff, out_str.c_str(), std::min((size_t)buff_len, out_str.length()));
165}
166
Sean Paulb386f1b2015-05-13 06:33:23 -0700167static int hwc_prepare(hwc_composer_device_1_t *dev, size_t num_displays,
Sean Paulef8f1f92015-04-29 16:05:23 -0400168 hwc_display_contents_1_t **display_contents) {
Sean Paulb386f1b2015-05-13 06:33:23 -0700169 struct hwc_context_t *ctx = (struct hwc_context_t *)&dev->common;
Sean Paule42febf2015-05-07 11:35:29 -0700170 for (int i = 0; i < (int)num_displays; ++i) {
Sean Paulef8f1f92015-04-29 16:05:23 -0400171 if (!display_contents[i])
172 continue;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500173
Sean Paulb386f1b2015-05-13 06:33:23 -0700174 DrmCrtc *crtc = ctx->drm.GetCrtcForDisplay(i);
175 if (!crtc) {
176 ALOGE("No crtc for display %d", i);
Sean Paulb386f1b2015-05-13 06:33:23 -0700177 return -ENODEV;
178 }
Sean Paulb386f1b2015-05-13 06:33:23 -0700179
Zach Reizner45624d32015-06-10 16:03:01 -0700180 int num_layers = display_contents[i]->numHwLayers;
181 for (int j = 0; j < num_layers; j++) {
Sean Paulb386f1b2015-05-13 06:33:23 -0700182 hwc_layer_1_t *layer = &display_contents[i]->hwLayers[j];
Zach Reizner45624d32015-06-10 16:03:01 -0700183
Sean Paul877be972015-06-03 14:08:27 -0400184 if (layer->compositionType == HWC_FRAMEBUFFER)
185 layer->compositionType = HWC_OVERLAY;
Sean Paulef8f1f92015-04-29 16:05:23 -0400186 }
187 }
Sean Pauldffca952015-02-04 10:19:55 -0800188
Sean Paulef8f1f92015-04-29 16:05:23 -0400189 return 0;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500190}
191
Sean Paulb386f1b2015-05-13 06:33:23 -0700192static void hwc_set_cleanup(size_t num_displays,
193 hwc_display_contents_1_t **display_contents,
194 Composition *composition) {
195 for (int i = 0; i < (int)num_displays; ++i) {
196 if (!display_contents[i])
197 continue;
198
199 hwc_display_contents_1_t *dc = display_contents[i];
200 for (size_t j = 0; j < dc->numHwLayers; ++j) {
201 hwc_layer_1_t *layer = &dc->hwLayers[j];
202 if (layer->acquireFenceFd >= 0) {
203 close(layer->acquireFenceFd);
204 layer->acquireFenceFd = -1;
205 }
206 }
207 if (dc->outbufAcquireFenceFd >= 0) {
208 close(dc->outbufAcquireFenceFd);
209 dc->outbufAcquireFenceFd = -1;
210 }
211 }
212
213 delete composition;
214}
215
Sean Paulb386f1b2015-05-13 06:33:23 -0700216static int hwc_add_layer(int display, hwc_context_t *ctx, hwc_layer_1_t *layer,
217 Composition *composition) {
218 hwc_drm_bo_t bo;
219 int ret = ctx->importer->ImportBuffer(layer->handle, &bo);
220 if (ret) {
221 ALOGE("Failed to import handle to bo %d", ret);
222 return ret;
Sean Paulef8f1f92015-04-29 16:05:23 -0400223 }
Sean Paulefb20cb2015-02-04 09:29:15 -0800224
Sean Paulb386f1b2015-05-13 06:33:23 -0700225 ret = composition->AddLayer(display, layer, &bo);
226 if (!ret)
Sean Paulef8f1f92015-04-29 16:05:23 -0400227 return 0;
Sean Paul9aa5ad32015-01-22 15:47:54 -0500228
Sean Paulb386f1b2015-05-13 06:33:23 -0700229 int destroy_ret = ctx->importer->ReleaseBuffer(&bo);
230 if (destroy_ret)
231 ALOGE("Failed to destroy buffer %d", destroy_ret);
Sean Paul9aa5ad32015-01-22 15:47:54 -0500232
Sean Paulef8f1f92015-04-29 16:05:23 -0400233 return ret;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500234}
235
236static int hwc_set(hwc_composer_device_1_t *dev, size_t num_displays,
Sean Paulef8f1f92015-04-29 16:05:23 -0400237 hwc_display_contents_1_t **display_contents) {
238 struct hwc_context_t *ctx = (struct hwc_context_t *)&dev->common;
Sean Paulb386f1b2015-05-13 06:33:23 -0700239 Composition *composition =
240 ctx->drm.compositor()->CreateComposition(ctx->importer);
241 if (!composition) {
242 ALOGE("Drm composition init failed");
243 hwc_set_cleanup(num_displays, display_contents, NULL);
244 return -EINVAL;
Sean Paulef8f1f92015-04-29 16:05:23 -0400245 }
Sean Paule0c4c3d2015-01-20 16:56:04 -0500246
Sean Paulb386f1b2015-05-13 06:33:23 -0700247 int ret;
248 for (int i = 0; i < (int)num_displays; ++i) {
249 if (!display_contents[i])
250 continue;
251
Zach Reizner45624d32015-06-10 16:03:01 -0700252 hwc_display_contents_1_t *dc = display_contents[i];
253 int j;
254 unsigned num_layers = 0;
255 unsigned num_dc_layers = dc->numHwLayers;
256 for (j = 0; j < (int)num_dc_layers; ++j) {
Sean Paulb386f1b2015-05-13 06:33:23 -0700257 hwc_layer_1_t *layer = &dc->hwLayers[j];
Zach Reizner45624d32015-06-10 16:03:01 -0700258 if (layer->flags & HWC_SKIP_LAYER)
Sean Paulb386f1b2015-05-13 06:33:23 -0700259 continue;
Sean Paul877be972015-06-03 14:08:27 -0400260 if (layer->compositionType == HWC_OVERLAY)
Zach Reizner45624d32015-06-10 16:03:01 -0700261 num_layers++;
Zach Reizner45624d32015-06-10 16:03:01 -0700262 }
263
264 unsigned num_planes = composition->GetRemainingLayers(i, num_layers);
265 bool use_pre_compositor = false;
266
Sean Paul877be972015-06-03 14:08:27 -0400267 if (num_layers > num_planes) {
Zach Reizner45624d32015-06-10 16:03:01 -0700268 use_pre_compositor = true;
269 // Reserve one of the planes for the result of the pre compositor.
270 num_planes--;
271 }
272
273 for (j = 0; num_planes && j < (int)num_dc_layers; ++j) {
274 hwc_layer_1_t *layer = &dc->hwLayers[j];
275 if (layer->flags & HWC_SKIP_LAYER)
276 continue;
Sean Paul877be972015-06-03 14:08:27 -0400277 if (layer->compositionType != HWC_OVERLAY)
278 continue;
Sean Paulb386f1b2015-05-13 06:33:23 -0700279
280 ret = hwc_add_layer(i, ctx, layer, composition);
281 if (ret) {
282 ALOGE("Add layer failed %d", ret);
283 hwc_set_cleanup(num_displays, display_contents, composition);
284 return ret;
285 }
286 --num_planes;
287 }
Zach Reizner45624d32015-06-10 16:03:01 -0700288
289 int last_comp_layer = j;
290
291 if (use_pre_compositor) {
292 hwc_drm_display_t *hd = &ctx->displays[i];
293 struct hwc_drm_display_framebuffer *fb = &hd->fb_chain[hd->fb_idx];
294 ret = fb->WaitReleased(-1);
295 if (ret) {
296 ALOGE("Failed to wait for framebuffer %d", ret);
297 hwc_set_cleanup(num_displays, display_contents, composition);
298 return ret;
299 }
300
301 DrmConnector *connector = ctx->drm.GetConnectorForDisplay(i);
302 if (!connector) {
303 ALOGE("No connector for display %d", i);
304 hwc_set_cleanup(num_displays, display_contents, composition);
305 return -ENODEV;
306 }
307
308 const DrmMode &mode = connector->active_mode();
309 if (!fb->Allocate(mode.h_display(), mode.v_display())) {
310 ALOGE("Failed to allocate framebuffer with size %dx%d",
311 mode.h_display(), mode.v_display());
312 hwc_set_cleanup(num_displays, display_contents, composition);
313 return -EINVAL;
314 }
315
316 sp<GraphicBuffer> fb_buffer = fb->buffer();
317 if (fb_buffer == NULL) {
318 ALOGE("Framebuffer is NULL");
319 hwc_set_cleanup(num_displays, display_contents, composition);
320 return -EINVAL;
321 }
322
323 Targeting *targeting = ctx->pre_compositor.targeting();
324 if (targeting == NULL) {
325 ALOGE("Pre-compositor does not support targeting");
326 hwc_set_cleanup(num_displays, display_contents, composition);
327 return -EINVAL;
328 }
329
330 int target = targeting->CreateTarget(fb_buffer);
331 targeting->SetTarget(target);
332
333 Composition *pre_composition = ctx->pre_compositor.CreateComposition(ctx->importer);
334 if (pre_composition == NULL) {
335 ALOGE("Failed to create pre-composition");
336 targeting->ForgetTarget(target);
337 hwc_set_cleanup(num_displays, display_contents, composition);
338 return -EINVAL;
339 }
340
341 for (j = last_comp_layer; j < (int)num_dc_layers; ++j) {
342 hwc_layer_1_t *layer = &dc->hwLayers[j];
343 if (layer->flags & HWC_SKIP_LAYER)
344 continue;
345 if (layer->compositionType != HWC_OVERLAY)
346 continue;
347 ret = hwc_add_layer(i, ctx, layer, pre_composition);
348 if (ret) {
349 ALOGE("Add layer failed %d", ret);
350 delete pre_composition;
351 targeting->ForgetTarget(target);
352 hwc_set_cleanup(num_displays, display_contents, composition);
353 return ret;
354 }
355 }
356
357 ret = ctx->pre_compositor.QueueComposition(pre_composition);
358 pre_composition = NULL;
359
360 targeting->ForgetTarget(target);
361 if (ret < 0 && ret != -EALREADY) {
362 ALOGE("Pre-composition failed %d", ret);
363 hwc_set_cleanup(num_displays, display_contents, composition);
364 return ret;
365 }
366
367 for (j = last_comp_layer; j < (int)num_dc_layers; ++j) {
368 hwc_layer_1_t *layer = &dc->hwLayers[j];
369 if (layer->flags & HWC_SKIP_LAYER)
370 continue;
371 if (layer->compositionType != HWC_OVERLAY)
372 continue;
373 layer->acquireFenceFd = -1;
374 }
375
376 hwc_layer_1_t composite_layer;
377 hwc_rect_t visible_rect;
378 memset(&composite_layer, 0, sizeof(composite_layer));
379 memset(&visible_rect, 0, sizeof(visible_rect));
380
381 composite_layer.compositionType = HWC_OVERLAY;
382 composite_layer.handle = fb_buffer->getNativeBuffer()->handle;
383 composite_layer.sourceCropf.right = composite_layer.displayFrame.right =
384 visible_rect.right = fb_buffer->getWidth();
385 composite_layer.sourceCropf.bottom = composite_layer.displayFrame.bottom =
386 visible_rect.bottom = fb_buffer->getHeight();
387 composite_layer.visibleRegionScreen.numRects = 1;
388 composite_layer.visibleRegionScreen.rects = &visible_rect;
389 composite_layer.acquireFenceFd = ret == -EALREADY ? -1 : ret;
390 // A known invalid fd in case AddLayer does not modify this field.
391 composite_layer.releaseFenceFd = -1;
392 composite_layer.planeAlpha = 0xff;
393
394 ret = hwc_add_layer(i, ctx, &composite_layer, composition);
395 if (ret) {
396 ALOGE("Add layer failed %d", ret);
397 hwc_set_cleanup(num_displays, display_contents, composition);
398 return ret;
399 }
400
401 fb->set_release_fence_fd(composite_layer.releaseFenceFd);
402 hd->fb_idx = (hd->fb_idx + 1) % HWC_FB_BUFFERS;
403 }
Sean Paulb386f1b2015-05-13 06:33:23 -0700404 }
405
406 ret = ctx->drm.compositor()->QueueComposition(composition);
407 if (ret) {
408 ALOGE("Failed to queue the composition");
409 hwc_set_cleanup(num_displays, display_contents, composition);
410 return ret;
411 }
412 hwc_set_cleanup(num_displays, display_contents, NULL);
Sean Paulef8f1f92015-04-29 16:05:23 -0400413 return ret;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500414}
415
Sean Paulef8f1f92015-04-29 16:05:23 -0400416static int hwc_event_control(struct hwc_composer_device_1 *dev, int display,
417 int event, int enabled) {
Sean Paulef8f1f92015-04-29 16:05:23 -0400418 if (event != HWC_EVENT_VSYNC || (enabled != 0 && enabled != 1))
419 return -EINVAL;
Sean Pauleb9e75c2015-01-25 23:31:30 -0500420
Sean Paul4057be32015-05-13 06:23:09 -0700421 struct hwc_context_t *ctx = (struct hwc_context_t *)&dev->common;
422 hwc_drm_display_t *hd = &ctx->displays[display];
423 return hd->vsync_worker.VSyncControl(enabled);
Sean Paule0c4c3d2015-01-20 16:56:04 -0500424}
425
Sean Paulef8f1f92015-04-29 16:05:23 -0400426static int hwc_set_power_mode(struct hwc_composer_device_1 *dev, int display,
427 int mode) {
428 struct hwc_context_t *ctx = (struct hwc_context_t *)&dev->common;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500429
Sean Paul6a55e9f2015-04-30 15:31:06 -0400430 uint64_t dpmsValue = 0;
Sean Paulef8f1f92015-04-29 16:05:23 -0400431 switch (mode) {
432 case HWC_POWER_MODE_OFF:
Sean Paul6a55e9f2015-04-30 15:31:06 -0400433 dpmsValue = DRM_MODE_DPMS_OFF;
Sean Paulef8f1f92015-04-29 16:05:23 -0400434 break;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500435
Sean Paulef8f1f92015-04-29 16:05:23 -0400436 /* We can't support dozing right now, so go full on */
437 case HWC_POWER_MODE_DOZE:
438 case HWC_POWER_MODE_DOZE_SUSPEND:
439 case HWC_POWER_MODE_NORMAL:
Sean Paul6a55e9f2015-04-30 15:31:06 -0400440 dpmsValue = DRM_MODE_DPMS_ON;
Sean Paulef8f1f92015-04-29 16:05:23 -0400441 break;
442 };
Sean Paul6a55e9f2015-04-30 15:31:06 -0400443 return ctx->drm.SetDpmsMode(display, dpmsValue);
Sean Paule0c4c3d2015-01-20 16:56:04 -0500444}
445
Sean Paulef8f1f92015-04-29 16:05:23 -0400446static int hwc_query(struct hwc_composer_device_1 * /* dev */, int what,
447 int *value) {
448 switch (what) {
449 case HWC_BACKGROUND_LAYER_SUPPORTED:
450 *value = 0; /* TODO: We should do this */
451 break;
452 case HWC_VSYNC_PERIOD:
453 ALOGW("Query for deprecated vsync value, returning 60Hz");
454 *value = 1000 * 1000 * 1000 / 60;
455 break;
456 case HWC_DISPLAY_TYPES_SUPPORTED:
457 *value = HWC_DISPLAY_PRIMARY | HWC_DISPLAY_EXTERNAL;
458 break;
459 }
460 return 0;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500461}
462
Sean Paulef8f1f92015-04-29 16:05:23 -0400463static void hwc_register_procs(struct hwc_composer_device_1 *dev,
464 hwc_procs_t const *procs) {
465 struct hwc_context_t *ctx = (struct hwc_context_t *)&dev->common;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500466
Sean Paulef8f1f92015-04-29 16:05:23 -0400467 ctx->procs = procs;
Sean Paul4057be32015-05-13 06:23:09 -0700468
469 for (hwc_context_t::DisplayMapIter iter = ctx->displays.begin();
470 iter != ctx->displays.end(); ++iter) {
471 iter->second.vsync_worker.SetProcs(procs);
472 }
Sean Paule0c4c3d2015-01-20 16:56:04 -0500473}
474
Sean Paulef8f1f92015-04-29 16:05:23 -0400475static int hwc_get_display_configs(struct hwc_composer_device_1 *dev,
476 int display, uint32_t *configs,
Sean Paul6a55e9f2015-04-30 15:31:06 -0400477 size_t *num_configs) {
478 if (!*num_configs)
Sean Paulef8f1f92015-04-29 16:05:23 -0400479 return 0;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500480
Sean Paulef8f1f92015-04-29 16:05:23 -0400481 struct hwc_context_t *ctx = (struct hwc_context_t *)&dev->common;
Sean Paule42febf2015-05-07 11:35:29 -0700482 hwc_drm_display_t *hd = &ctx->displays[display];
Sean Paul6a55e9f2015-04-30 15:31:06 -0400483 hd->config_ids.clear();
484
485 DrmConnector *connector = ctx->drm.GetConnectorForDisplay(display);
486 if (!connector) {
487 ALOGE("Failed to get connector for display %d", display);
Sean Paulef8f1f92015-04-29 16:05:23 -0400488 return -ENODEV;
489 }
Sean Paule0c4c3d2015-01-20 16:56:04 -0500490
Sean Paule42febf2015-05-07 11:35:29 -0700491 int ret = connector->UpdateModes();
Sean Paul6a55e9f2015-04-30 15:31:06 -0400492 if (ret) {
493 ALOGE("Failed to update display modes %d", ret);
Sean Paulef8f1f92015-04-29 16:05:23 -0400494 return ret;
Sean Paulef8f1f92015-04-29 16:05:23 -0400495 }
Sean Paule0c4c3d2015-01-20 16:56:04 -0500496
Sean Paul6a55e9f2015-04-30 15:31:06 -0400497 for (DrmConnector::ModeIter iter = connector->begin_modes();
498 iter != connector->end_modes(); ++iter) {
499 size_t idx = hd->config_ids.size();
500 if (idx == *num_configs)
501 break;
502 hd->config_ids.push_back(iter->id());
503 configs[idx] = iter->id();
504 }
505 *num_configs = hd->config_ids.size();
506 return *num_configs == 0 ? -1 : 0;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500507}
508
Sean Paulef8f1f92015-04-29 16:05:23 -0400509static int hwc_get_display_attributes(struct hwc_composer_device_1 *dev,
510 int display, uint32_t config,
511 const uint32_t *attributes,
512 int32_t *values) {
513 struct hwc_context_t *ctx = (struct hwc_context_t *)&dev->common;
Sean Paul6a55e9f2015-04-30 15:31:06 -0400514 DrmConnector *c = ctx->drm.GetConnectorForDisplay(display);
Sean Paulef8f1f92015-04-29 16:05:23 -0400515 if (!c) {
Sean Paul6a55e9f2015-04-30 15:31:06 -0400516 ALOGE("Failed to get DrmConnector for display %d", display);
Sean Paulef8f1f92015-04-29 16:05:23 -0400517 return -ENODEV;
518 }
Sean Paul6a55e9f2015-04-30 15:31:06 -0400519 DrmMode mode;
520 for (DrmConnector::ModeIter iter = c->begin_modes(); iter != c->end_modes();
521 ++iter) {
522 if (iter->id() == config) {
523 mode = *iter;
524 break;
525 }
526 }
527 if (mode.id() == 0) {
528 ALOGE("Failed to find active mode for display %d", display);
529 return -ENOENT;
Sean Paulef8f1f92015-04-29 16:05:23 -0400530 }
Sean Paule0c4c3d2015-01-20 16:56:04 -0500531
Sean Paul6a55e9f2015-04-30 15:31:06 -0400532 uint32_t mm_width = c->mm_width();
533 uint32_t mm_height = c->mm_height();
Sean Paulef8f1f92015-04-29 16:05:23 -0400534 for (int i = 0; attributes[i] != HWC_DISPLAY_NO_ATTRIBUTE; ++i) {
535 switch (attributes[i]) {
536 case HWC_DISPLAY_VSYNC_PERIOD:
Sean Paul6a55e9f2015-04-30 15:31:06 -0400537 values[i] = 1000 * 1000 * 1000 / mode.v_refresh();
Sean Paulef8f1f92015-04-29 16:05:23 -0400538 break;
539 case HWC_DISPLAY_WIDTH:
Sean Paul6a55e9f2015-04-30 15:31:06 -0400540 values[i] = mode.h_display();
Sean Paulef8f1f92015-04-29 16:05:23 -0400541 break;
542 case HWC_DISPLAY_HEIGHT:
Sean Paul6a55e9f2015-04-30 15:31:06 -0400543 values[i] = mode.v_display();
Sean Paulef8f1f92015-04-29 16:05:23 -0400544 break;
545 case HWC_DISPLAY_DPI_X:
546 /* Dots per 1000 inches */
Sean Paul6a55e9f2015-04-30 15:31:06 -0400547 values[i] = mm_width ? (mode.h_display() * UM_PER_INCH) / mm_width : 0;
Sean Paulef8f1f92015-04-29 16:05:23 -0400548 break;
549 case HWC_DISPLAY_DPI_Y:
550 /* Dots per 1000 inches */
Sean Paul6a55e9f2015-04-30 15:31:06 -0400551 values[i] =
552 mm_height ? (mode.v_display() * UM_PER_INCH) / mm_height : 0;
Sean Paulef8f1f92015-04-29 16:05:23 -0400553 break;
554 }
555 }
Sean Paulef8f1f92015-04-29 16:05:23 -0400556 return 0;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500557}
558
Sean Paulef8f1f92015-04-29 16:05:23 -0400559static int hwc_get_active_config(struct hwc_composer_device_1 *dev,
560 int display) {
561 struct hwc_context_t *ctx = (struct hwc_context_t *)&dev->common;
Sean Paul6a55e9f2015-04-30 15:31:06 -0400562 DrmConnector *c = ctx->drm.GetConnectorForDisplay(display);
563 if (!c) {
564 ALOGE("Failed to get DrmConnector for display %d", display);
Sean Paulef8f1f92015-04-29 16:05:23 -0400565 return -ENODEV;
566 }
Sean Paule0c4c3d2015-01-20 16:56:04 -0500567
Sean Paul6a55e9f2015-04-30 15:31:06 -0400568 DrmMode mode = c->active_mode();
Sean Paule42febf2015-05-07 11:35:29 -0700569 hwc_drm_display_t *hd = &ctx->displays[display];
Sean Paul6a55e9f2015-04-30 15:31:06 -0400570 for (size_t i = 0; i < hd->config_ids.size(); ++i) {
571 if (hd->config_ids[i] == mode.id())
572 return i;
Sean Paulef8f1f92015-04-29 16:05:23 -0400573 }
Sean Paul6a55e9f2015-04-30 15:31:06 -0400574 return -1;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500575}
576
Sean Paulef8f1f92015-04-29 16:05:23 -0400577static int hwc_set_active_config(struct hwc_composer_device_1 *dev, int display,
578 int index) {
579 struct hwc_context_t *ctx = (struct hwc_context_t *)&dev->common;
Sean Paule42febf2015-05-07 11:35:29 -0700580 hwc_drm_display_t *hd = &ctx->displays[display];
Sean Paul6a55e9f2015-04-30 15:31:06 -0400581 if (index >= (int)hd->config_ids.size()) {
582 ALOGE("Invalid config index %d passed in", index);
583 return -EINVAL;
Sean Paulef8f1f92015-04-29 16:05:23 -0400584 }
Sean Paule0c4c3d2015-01-20 16:56:04 -0500585
Sean Paul877be972015-06-03 14:08:27 -0400586 DrmConnector *c = ctx->drm.GetConnectorForDisplay(display);
587 if (!c) {
588 ALOGE("Failed to get connector for display %d", display);
589 return -ENODEV;
590 }
591 DrmMode mode;
592 for (DrmConnector::ModeIter iter = c->begin_modes(); iter != c->end_modes();
593 ++iter) {
594 if (iter->id() == hd->config_ids[index]) {
595 mode = *iter;
596 break;
597 }
598 }
599 if (mode.id() != hd->config_ids[index]) {
600 ALOGE("Could not find active mode for %d/%d", index, hd->config_ids[index]);
601 return -ENOENT;
602 }
603 int ret = ctx->drm.SetDisplayActiveMode(display, mode);
Sean Paul6a55e9f2015-04-30 15:31:06 -0400604 if (ret) {
Sean Paul877be972015-06-03 14:08:27 -0400605 ALOGE("Failed to set active config %d", ret);
Sean Paul6a55e9f2015-04-30 15:31:06 -0400606 return ret;
Sean Paulef8f1f92015-04-29 16:05:23 -0400607 }
Sean Paul6a55e9f2015-04-30 15:31:06 -0400608 return ret;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500609}
610
Sean Paulef8f1f92015-04-29 16:05:23 -0400611static int hwc_device_close(struct hw_device_t *dev) {
612 struct hwc_context_t *ctx = (struct hwc_context_t *)dev;
Sean Paulef8f1f92015-04-29 16:05:23 -0400613 delete ctx;
Sean Paulef8f1f92015-04-29 16:05:23 -0400614 return 0;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500615}
616
Sean Paul24a26e32015-02-04 10:34:47 -0800617/*
618 * TODO: This function sets the active config to the first one in the list. This
619 * should be fixed such that it selects the preferred mode for the display, or
620 * some other, saner, method of choosing the config.
621 */
Sean Paule42febf2015-05-07 11:35:29 -0700622static int hwc_set_initial_config(hwc_drm_display_t *hd) {
Sean Paulef8f1f92015-04-29 16:05:23 -0400623 uint32_t config;
624 size_t num_configs = 1;
625 int ret = hwc_get_display_configs(&hd->ctx->device, hd->display, &config,
626 &num_configs);
627 if (ret || !num_configs)
628 return 0;
Sean Paul24a26e32015-02-04 10:34:47 -0800629
Sean Paulef8f1f92015-04-29 16:05:23 -0400630 ret = hwc_set_active_config(&hd->ctx->device, hd->display, 0);
631 if (ret) {
632 ALOGE("Failed to set active config d=%d ret=%d", hd->display, ret);
633 return ret;
634 }
Sean Paul24a26e32015-02-04 10:34:47 -0800635
Sean Paulef8f1f92015-04-29 16:05:23 -0400636 return ret;
Sean Paul24a26e32015-02-04 10:34:47 -0800637}
638
Sean Paul6a55e9f2015-04-30 15:31:06 -0400639static int hwc_initialize_display(struct hwc_context_t *ctx, int display) {
Sean Paule42febf2015-05-07 11:35:29 -0700640 hwc_drm_display_t *hd = &ctx->displays[display];
Sean Paulef8f1f92015-04-29 16:05:23 -0400641 hd->ctx = ctx;
642 hd->display = display;
Zach Reizner45624d32015-06-10 16:03:01 -0700643 hd->fb_idx = 0;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500644
Sean Paulb386f1b2015-05-13 06:33:23 -0700645 int ret = hwc_set_initial_config(hd);
Sean Paulef8f1f92015-04-29 16:05:23 -0400646 if (ret) {
647 ALOGE("Failed to set initial config for d=%d ret=%d", display, ret);
Sean Paulef8f1f92015-04-29 16:05:23 -0400648 return ret;
649 }
Sean Paul24a26e32015-02-04 10:34:47 -0800650
Sean Paul4057be32015-05-13 06:23:09 -0700651 ret = hd->vsync_worker.Init(&ctx->drm, display);
652 if (ret) {
653 ALOGE("Failed to create event worker for display %d %d\n", display, ret);
654 return ret;
655 }
656
Sean Paulef8f1f92015-04-29 16:05:23 -0400657 return 0;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500658}
659
Sean Paulef8f1f92015-04-29 16:05:23 -0400660static int hwc_enumerate_displays(struct hwc_context_t *ctx) {
Sean Paul6a55e9f2015-04-30 15:31:06 -0400661 int ret;
662 for (DrmResources::ConnectorIter c = ctx->drm.begin_connectors();
663 c != ctx->drm.end_connectors(); ++c) {
664 ret = hwc_initialize_display(ctx, (*c)->display());
665 if (ret) {
666 ALOGE("Failed to initialize display %d", (*c)->display());
667 return ret;
Sean Paulef8f1f92015-04-29 16:05:23 -0400668 }
669 }
Sean Paulef8f1f92015-04-29 16:05:23 -0400670
671 return 0;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500672}
673
Sean Paulef8f1f92015-04-29 16:05:23 -0400674static int hwc_device_open(const struct hw_module_t *module, const char *name,
675 struct hw_device_t **dev) {
676 if (strcmp(name, HWC_HARDWARE_COMPOSER)) {
677 ALOGE("Invalid module name- %s", name);
678 return -EINVAL;
679 }
680
681 struct hwc_context_t *ctx = new hwc_context_t();
682 if (!ctx) {
683 ALOGE("Failed to allocate hwc context");
684 return -ENOMEM;
685 }
686
Sean Paul6a55e9f2015-04-30 15:31:06 -0400687 int ret = ctx->drm.Init();
688 if (ret) {
689 ALOGE("Can't initialize Drm object %d", ret);
690 delete ctx;
691 return ret;
692 }
693
Zach Reizner45624d32015-06-10 16:03:01 -0700694 ret = ctx->pre_compositor.Init();
695 if (ret) {
696 ALOGE("Can't initialize OpenGL Compositor object %d", ret);
697 delete ctx;
698 return ret;
699 }
700
Sean Paulda6270d2015-06-01 14:11:52 -0400701 ctx->importer = Importer::CreateInstance(&ctx->drm);
702 if (!ctx->importer) {
703 ALOGE("Failed to create importer instance");
Sean Paulef8f1f92015-04-29 16:05:23 -0400704 delete ctx;
705 return ret;
706 }
707
Sean Paulef8f1f92015-04-29 16:05:23 -0400708 ret = hwc_enumerate_displays(ctx);
709 if (ret) {
710 ALOGE("Failed to enumerate displays: %s", strerror(ret));
Sean Paul6a55e9f2015-04-30 15:31:06 -0400711 delete ctx;
712 return ret;
713 }
714
Sean Paulef8f1f92015-04-29 16:05:23 -0400715 ctx->device.common.tag = HARDWARE_DEVICE_TAG;
716 ctx->device.common.version = HWC_DEVICE_API_VERSION_1_4;
717 ctx->device.common.module = const_cast<hw_module_t *>(module);
718 ctx->device.common.close = hwc_device_close;
719
Sean Paul9046c642015-06-10 17:27:47 -0400720 ctx->device.dump = hwc_dump;
Sean Paulef8f1f92015-04-29 16:05:23 -0400721 ctx->device.prepare = hwc_prepare;
722 ctx->device.set = hwc_set;
723 ctx->device.eventControl = hwc_event_control;
724 ctx->device.setPowerMode = hwc_set_power_mode;
725 ctx->device.query = hwc_query;
726 ctx->device.registerProcs = hwc_register_procs;
727 ctx->device.getDisplayConfigs = hwc_get_display_configs;
728 ctx->device.getDisplayAttributes = hwc_get_display_attributes;
729 ctx->device.getActiveConfig = hwc_get_active_config;
730 ctx->device.setActiveConfig = hwc_set_active_config;
731 ctx->device.setCursorPositionAsync = NULL; /* TODO: Add cursor */
732
733 *dev = &ctx->device.common;
734
735 return 0;
736}
Sean Paul6a55e9f2015-04-30 15:31:06 -0400737}
Sean Paulef8f1f92015-04-29 16:05:23 -0400738
Sean Paul6a55e9f2015-04-30 15:31:06 -0400739static struct hw_module_methods_t hwc_module_methods = {
740 open : android::hwc_device_open
741};
Sean Paule0c4c3d2015-01-20 16:56:04 -0500742
743hwc_module_t HAL_MODULE_INFO_SYM = {
Sean Paulef8f1f92015-04-29 16:05:23 -0400744 common : {
745 tag : HARDWARE_MODULE_TAG,
746 version_major : 1,
747 version_minor : 0,
748 id : HWC_HARDWARE_MODULE_ID,
749 name : "DRM hwcomposer module",
750 author : "The Android Open Source Project",
751 methods : &hwc_module_methods,
752 dso : NULL,
753 reserved : {0},
754 }
Sean Paule0c4c3d2015-01-20 16:56:04 -0500755};