Sean Paul | e0c4c3d | 2015-01-20 16:56:04 -0500 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2015 The Android Open Source Project |
| 3 | * |
| 4 | * Licensed under the Apache License, Version 2.0 (the "License"); |
| 5 | * you may not use this file except in compliance with the License. |
| 6 | * You may obtain a copy of the License at |
| 7 | * |
| 8 | * http://www.apache.org/licenses/LICENSE-2.0 |
| 9 | * |
| 10 | * Unless required by applicable law or agreed to in writing, software |
| 11 | * distributed under the License is distributed on an "AS IS" BASIS, |
| 12 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
| 13 | * See the License for the specific language governing permissions and |
| 14 | * limitations under the License. |
| 15 | */ |
| 16 | |
| 17 | #define LOG_TAG "hwcomposer-drm" |
| 18 | |
Sean Paul | ef8f1f9 | 2015-04-29 16:05:23 -0400 | [diff] [blame] | 19 | #include "drm_hwcomposer.h" |
Sean Paul | 6a55e9f | 2015-04-30 15:31:06 -0400 | [diff] [blame] | 20 | #include "drmresources.h" |
Sean Paul | da6270d | 2015-06-01 14:11:52 -0400 | [diff] [blame] | 21 | #include "importer.h" |
Sean Paul | 4057be3 | 2015-05-13 06:23:09 -0700 | [diff] [blame] | 22 | #include "vsyncworker.h" |
Sean Paul | ef8f1f9 | 2015-04-29 16:05:23 -0400 | [diff] [blame] | 23 | |
Sean Paul | e0c4c3d | 2015-01-20 16:56:04 -0500 | [diff] [blame] | 24 | #include <errno.h> |
Sean Paul | ef8f1f9 | 2015-04-29 16:05:23 -0400 | [diff] [blame] | 25 | #include <fcntl.h> |
Sean Paul | 5ad302c | 2015-05-11 10:43:31 -0700 | [diff] [blame] | 26 | #include <list> |
Sean Paul | e42febf | 2015-05-07 11:35:29 -0700 | [diff] [blame] | 27 | #include <map> |
Sean Paul | ef8f1f9 | 2015-04-29 16:05:23 -0400 | [diff] [blame] | 28 | #include <pthread.h> |
Dan Albert | c5255b3 | 2015-05-07 23:42:54 -0700 | [diff] [blame] | 29 | #include <stdlib.h> |
Sean Paul | e0c4c3d | 2015-01-20 16:56:04 -0500 | [diff] [blame] | 30 | #include <sys/param.h> |
Sean Paul | 9aa5ad3 | 2015-01-22 15:47:54 -0500 | [diff] [blame] | 31 | #include <sys/resource.h> |
Sean Paul | e0c4c3d | 2015-01-20 16:56:04 -0500 | [diff] [blame] | 32 | #include <xf86drm.h> |
| 33 | #include <xf86drmMode.h> |
Sean Paul | e0c4c3d | 2015-01-20 16:56:04 -0500 | [diff] [blame] | 34 | |
Sean Paul | ef8f1f9 | 2015-04-29 16:05:23 -0400 | [diff] [blame] | 35 | #include <cutils/log.h> |
| 36 | #include <cutils/properties.h> |
Sean Paul | e0c4c3d | 2015-01-20 16:56:04 -0500 | [diff] [blame] | 37 | #include <hardware/hardware.h> |
| 38 | #include <hardware/hwcomposer.h> |
Sean Paul | f1dc191 | 2015-01-24 01:34:31 -0500 | [diff] [blame] | 39 | #include <sw_sync.h> |
Sean Paul | ef8f1f9 | 2015-04-29 16:05:23 -0400 | [diff] [blame] | 40 | #include <sync/sync.h> |
Sean Paul | e0c4c3d | 2015-01-20 16:56:04 -0500 | [diff] [blame] | 41 | |
Sean Paul | e0c4c3d | 2015-01-20 16:56:04 -0500 | [diff] [blame] | 42 | #define UM_PER_INCH 25400 |
| 43 | |
Sean Paul | 6a55e9f | 2015-04-30 15:31:06 -0400 | [diff] [blame] | 44 | namespace android { |
Sean Paul | e0c4c3d | 2015-01-20 16:56:04 -0500 | [diff] [blame] | 45 | |
Sean Paul | e42febf | 2015-05-07 11:35:29 -0700 | [diff] [blame] | 46 | typedef struct hwc_drm_display { |
Sean Paul | ef8f1f9 | 2015-04-29 16:05:23 -0400 | [diff] [blame] | 47 | struct hwc_context_t *ctx; |
| 48 | int display; |
Sean Paul | 9aa5ad3 | 2015-01-22 15:47:54 -0500 | [diff] [blame] | 49 | |
Sean Paul | 6a55e9f | 2015-04-30 15:31:06 -0400 | [diff] [blame] | 50 | std::vector<uint32_t> config_ids; |
Sean Paul | 9aa5ad3 | 2015-01-22 15:47:54 -0500 | [diff] [blame] | 51 | |
Sean Paul | 4057be3 | 2015-05-13 06:23:09 -0700 | [diff] [blame] | 52 | VSyncWorker vsync_worker; |
Sean Paul | e42febf | 2015-05-07 11:35:29 -0700 | [diff] [blame] | 53 | } hwc_drm_display_t; |
Sean Paul | e0c4c3d | 2015-01-20 16:56:04 -0500 | [diff] [blame] | 54 | |
| 55 | struct hwc_context_t { |
Sean Paul | e42febf | 2015-05-07 11:35:29 -0700 | [diff] [blame] | 56 | // map of display:hwc_drm_display_t |
| 57 | typedef std::map<int, hwc_drm_display_t> DisplayMap; |
| 58 | typedef DisplayMap::iterator DisplayMapIter; |
Sean Paul | e0c4c3d | 2015-01-20 16:56:04 -0500 | [diff] [blame] | 59 | |
Sean Paul | da6270d | 2015-06-01 14:11:52 -0400 | [diff] [blame] | 60 | hwc_context_t() : procs(NULL), importer(NULL) { |
| 61 | } |
| 62 | |
| 63 | ~hwc_context_t() { |
| 64 | delete importer; |
| 65 | } |
| 66 | |
Sean Paul | e42febf | 2015-05-07 11:35:29 -0700 | [diff] [blame] | 67 | hwc_composer_device_1_t device; |
Sean Paul | ef8f1f9 | 2015-04-29 16:05:23 -0400 | [diff] [blame] | 68 | hwc_procs_t const *procs; |
Sean Paul | e0c4c3d | 2015-01-20 16:56:04 -0500 | [diff] [blame] | 69 | |
Sean Paul | e42febf | 2015-05-07 11:35:29 -0700 | [diff] [blame] | 70 | DisplayMap displays; |
Sean Paul | 6a55e9f | 2015-04-30 15:31:06 -0400 | [diff] [blame] | 71 | DrmResources drm; |
Sean Paul | da6270d | 2015-06-01 14:11:52 -0400 | [diff] [blame] | 72 | Importer *importer; |
Sean Paul | e0c4c3d | 2015-01-20 16:56:04 -0500 | [diff] [blame] | 73 | }; |
| 74 | |
Sean Paul | 9046c64 | 2015-06-10 17:27:47 -0400 | [diff] [blame^] | 75 | static void hwc_dump(struct hwc_composer_device_1* dev, char *buff, |
| 76 | int buff_len) { |
| 77 | struct hwc_context_t *ctx = (struct hwc_context_t *)&dev->common; |
| 78 | std::ostringstream out; |
| 79 | |
| 80 | ctx->drm.compositor()->Dump(&out); |
| 81 | std::string out_str = out.str(); |
| 82 | strncpy(buff, out_str.c_str(), std::min((size_t)buff_len, out_str.length())); |
| 83 | } |
| 84 | |
Sean Paul | b386f1b | 2015-05-13 06:33:23 -0700 | [diff] [blame] | 85 | static int hwc_prepare(hwc_composer_device_1_t *dev, size_t num_displays, |
Sean Paul | ef8f1f9 | 2015-04-29 16:05:23 -0400 | [diff] [blame] | 86 | hwc_display_contents_1_t **display_contents) { |
Sean Paul | b386f1b | 2015-05-13 06:33:23 -0700 | [diff] [blame] | 87 | // XXX: Once we have a GL compositor, just make everything HWC_OVERLAY |
| 88 | struct hwc_context_t *ctx = (struct hwc_context_t *)&dev->common; |
| 89 | Composition *composition = |
| 90 | ctx->drm.compositor()->CreateComposition(ctx->importer); |
| 91 | if (!composition) { |
| 92 | ALOGE("Drm composition init failed"); |
| 93 | return -EINVAL; |
| 94 | } |
Sean Paul | e0c4c3d | 2015-01-20 16:56:04 -0500 | [diff] [blame] | 95 | |
Sean Paul | e42febf | 2015-05-07 11:35:29 -0700 | [diff] [blame] | 96 | for (int i = 0; i < (int)num_displays; ++i) { |
Sean Paul | ef8f1f9 | 2015-04-29 16:05:23 -0400 | [diff] [blame] | 97 | if (!display_contents[i]) |
| 98 | continue; |
Sean Paul | e0c4c3d | 2015-01-20 16:56:04 -0500 | [diff] [blame] | 99 | |
Sean Paul | b386f1b | 2015-05-13 06:33:23 -0700 | [diff] [blame] | 100 | int num_layers = display_contents[i]->numHwLayers; |
| 101 | int num_planes = composition->GetRemainingLayers(i, num_layers); |
| 102 | |
| 103 | // XXX: Should go away with atomic modeset |
| 104 | DrmCrtc *crtc = ctx->drm.GetCrtcForDisplay(i); |
| 105 | if (!crtc) { |
| 106 | ALOGE("No crtc for display %d", i); |
| 107 | delete composition; |
| 108 | return -ENODEV; |
| 109 | } |
| 110 | if (crtc->requires_modeset()) |
| 111 | num_planes = 0; |
| 112 | |
| 113 | for (int j = std::max(0, num_layers - num_planes); j < num_layers; j++) { |
| 114 | if (j >= num_planes) |
| 115 | break; |
| 116 | |
| 117 | hwc_layer_1_t *layer = &display_contents[i]->hwLayers[j]; |
| 118 | if (layer->compositionType == HWC_FRAMEBUFFER) |
| 119 | layer->compositionType = HWC_OVERLAY; |
Sean Paul | ef8f1f9 | 2015-04-29 16:05:23 -0400 | [diff] [blame] | 120 | } |
| 121 | } |
Sean Paul | dffca95 | 2015-02-04 10:19:55 -0800 | [diff] [blame] | 122 | |
Sean Paul | b386f1b | 2015-05-13 06:33:23 -0700 | [diff] [blame] | 123 | delete composition; |
Sean Paul | ef8f1f9 | 2015-04-29 16:05:23 -0400 | [diff] [blame] | 124 | return 0; |
Sean Paul | e0c4c3d | 2015-01-20 16:56:04 -0500 | [diff] [blame] | 125 | } |
| 126 | |
Sean Paul | b386f1b | 2015-05-13 06:33:23 -0700 | [diff] [blame] | 127 | static void hwc_set_cleanup(size_t num_displays, |
| 128 | hwc_display_contents_1_t **display_contents, |
| 129 | Composition *composition) { |
| 130 | for (int i = 0; i < (int)num_displays; ++i) { |
| 131 | if (!display_contents[i]) |
| 132 | continue; |
| 133 | |
| 134 | hwc_display_contents_1_t *dc = display_contents[i]; |
| 135 | for (size_t j = 0; j < dc->numHwLayers; ++j) { |
| 136 | hwc_layer_1_t *layer = &dc->hwLayers[j]; |
| 137 | if (layer->acquireFenceFd >= 0) { |
| 138 | close(layer->acquireFenceFd); |
| 139 | layer->acquireFenceFd = -1; |
| 140 | } |
| 141 | } |
| 142 | if (dc->outbufAcquireFenceFd >= 0) { |
| 143 | close(dc->outbufAcquireFenceFd); |
| 144 | dc->outbufAcquireFenceFd = -1; |
| 145 | } |
| 146 | } |
| 147 | |
| 148 | delete composition; |
| 149 | } |
| 150 | |
Sean Paul | b386f1b | 2015-05-13 06:33:23 -0700 | [diff] [blame] | 151 | static int hwc_add_layer(int display, hwc_context_t *ctx, hwc_layer_1_t *layer, |
| 152 | Composition *composition) { |
| 153 | hwc_drm_bo_t bo; |
| 154 | int ret = ctx->importer->ImportBuffer(layer->handle, &bo); |
| 155 | if (ret) { |
| 156 | ALOGE("Failed to import handle to bo %d", ret); |
| 157 | return ret; |
Sean Paul | ef8f1f9 | 2015-04-29 16:05:23 -0400 | [diff] [blame] | 158 | } |
Sean Paul | efb20cb | 2015-02-04 09:29:15 -0800 | [diff] [blame] | 159 | |
Sean Paul | b386f1b | 2015-05-13 06:33:23 -0700 | [diff] [blame] | 160 | ret = composition->AddLayer(display, layer, &bo); |
| 161 | if (!ret) |
Sean Paul | ef8f1f9 | 2015-04-29 16:05:23 -0400 | [diff] [blame] | 162 | return 0; |
Sean Paul | 9aa5ad3 | 2015-01-22 15:47:54 -0500 | [diff] [blame] | 163 | |
Sean Paul | b386f1b | 2015-05-13 06:33:23 -0700 | [diff] [blame] | 164 | int destroy_ret = ctx->importer->ReleaseBuffer(&bo); |
| 165 | if (destroy_ret) |
| 166 | ALOGE("Failed to destroy buffer %d", destroy_ret); |
Sean Paul | 9aa5ad3 | 2015-01-22 15:47:54 -0500 | [diff] [blame] | 167 | |
Sean Paul | ef8f1f9 | 2015-04-29 16:05:23 -0400 | [diff] [blame] | 168 | return ret; |
Sean Paul | e0c4c3d | 2015-01-20 16:56:04 -0500 | [diff] [blame] | 169 | } |
| 170 | |
| 171 | static int hwc_set(hwc_composer_device_1_t *dev, size_t num_displays, |
Sean Paul | ef8f1f9 | 2015-04-29 16:05:23 -0400 | [diff] [blame] | 172 | hwc_display_contents_1_t **display_contents) { |
| 173 | struct hwc_context_t *ctx = (struct hwc_context_t *)&dev->common; |
Sean Paul | b386f1b | 2015-05-13 06:33:23 -0700 | [diff] [blame] | 174 | Composition *composition = |
| 175 | ctx->drm.compositor()->CreateComposition(ctx->importer); |
| 176 | if (!composition) { |
| 177 | ALOGE("Drm composition init failed"); |
| 178 | hwc_set_cleanup(num_displays, display_contents, NULL); |
| 179 | return -EINVAL; |
Sean Paul | ef8f1f9 | 2015-04-29 16:05:23 -0400 | [diff] [blame] | 180 | } |
Sean Paul | e0c4c3d | 2015-01-20 16:56:04 -0500 | [diff] [blame] | 181 | |
Sean Paul | b386f1b | 2015-05-13 06:33:23 -0700 | [diff] [blame] | 182 | int ret; |
| 183 | for (int i = 0; i < (int)num_displays; ++i) { |
| 184 | if (!display_contents[i]) |
| 185 | continue; |
| 186 | |
| 187 | DrmCrtc *crtc = ctx->drm.GetCrtcForDisplay(i); |
| 188 | if (!crtc) { |
| 189 | ALOGE("No crtc for display %d", i); |
| 190 | hwc_set_cleanup(num_displays, display_contents, composition); |
| 191 | return -ENODEV; |
| 192 | } |
| 193 | |
| 194 | hwc_display_contents_1_t *dc = display_contents[i]; |
| 195 | unsigned num_layers = dc->numHwLayers; |
| 196 | unsigned num_planes = composition->GetRemainingLayers(i, num_layers); |
| 197 | bool use_target = false; |
| 198 | // XXX: We don't need to check for modeset required with atomic modeset |
| 199 | if (crtc->requires_modeset() || num_layers > num_planes) |
| 200 | use_target = true; |
| 201 | |
| 202 | // XXX: Won't need to worry about FB_TARGET with GL Compositor |
| 203 | for (int j = 0; use_target && j < (int)num_layers; ++j) { |
| 204 | hwc_layer_1_t *layer = &dc->hwLayers[j]; |
| 205 | if (layer->compositionType != HWC_FRAMEBUFFER_TARGET) |
| 206 | continue; |
| 207 | |
| 208 | ret = hwc_add_layer(i, ctx, layer, composition); |
| 209 | if (ret) { |
| 210 | ALOGE("Add layer failed %d", ret); |
| 211 | hwc_set_cleanup(num_displays, display_contents, composition); |
| 212 | return ret; |
| 213 | } |
| 214 | --num_planes; |
| 215 | break; |
| 216 | } |
| 217 | |
| 218 | for (int j = 0; num_planes && j < (int)num_layers; ++j) { |
| 219 | hwc_layer_1_t *layer = &dc->hwLayers[j]; |
| 220 | if (layer->compositionType != HWC_OVERLAY) |
| 221 | continue; |
| 222 | |
| 223 | ret = hwc_add_layer(i, ctx, layer, composition); |
| 224 | if (ret) { |
| 225 | ALOGE("Add layer failed %d", ret); |
| 226 | hwc_set_cleanup(num_displays, display_contents, composition); |
| 227 | return ret; |
| 228 | } |
| 229 | --num_planes; |
| 230 | } |
| 231 | } |
| 232 | |
| 233 | ret = ctx->drm.compositor()->QueueComposition(composition); |
| 234 | if (ret) { |
| 235 | ALOGE("Failed to queue the composition"); |
| 236 | hwc_set_cleanup(num_displays, display_contents, composition); |
| 237 | return ret; |
| 238 | } |
| 239 | hwc_set_cleanup(num_displays, display_contents, NULL); |
Sean Paul | ef8f1f9 | 2015-04-29 16:05:23 -0400 | [diff] [blame] | 240 | return ret; |
Sean Paul | e0c4c3d | 2015-01-20 16:56:04 -0500 | [diff] [blame] | 241 | } |
| 242 | |
Sean Paul | ef8f1f9 | 2015-04-29 16:05:23 -0400 | [diff] [blame] | 243 | static int hwc_event_control(struct hwc_composer_device_1 *dev, int display, |
| 244 | int event, int enabled) { |
Sean Paul | ef8f1f9 | 2015-04-29 16:05:23 -0400 | [diff] [blame] | 245 | if (event != HWC_EVENT_VSYNC || (enabled != 0 && enabled != 1)) |
| 246 | return -EINVAL; |
Sean Paul | eb9e75c | 2015-01-25 23:31:30 -0500 | [diff] [blame] | 247 | |
Sean Paul | 4057be3 | 2015-05-13 06:23:09 -0700 | [diff] [blame] | 248 | struct hwc_context_t *ctx = (struct hwc_context_t *)&dev->common; |
| 249 | hwc_drm_display_t *hd = &ctx->displays[display]; |
| 250 | return hd->vsync_worker.VSyncControl(enabled); |
Sean Paul | e0c4c3d | 2015-01-20 16:56:04 -0500 | [diff] [blame] | 251 | } |
| 252 | |
Sean Paul | ef8f1f9 | 2015-04-29 16:05:23 -0400 | [diff] [blame] | 253 | static int hwc_set_power_mode(struct hwc_composer_device_1 *dev, int display, |
| 254 | int mode) { |
| 255 | struct hwc_context_t *ctx = (struct hwc_context_t *)&dev->common; |
Sean Paul | e0c4c3d | 2015-01-20 16:56:04 -0500 | [diff] [blame] | 256 | |
Sean Paul | 6a55e9f | 2015-04-30 15:31:06 -0400 | [diff] [blame] | 257 | uint64_t dpmsValue = 0; |
Sean Paul | ef8f1f9 | 2015-04-29 16:05:23 -0400 | [diff] [blame] | 258 | switch (mode) { |
| 259 | case HWC_POWER_MODE_OFF: |
Sean Paul | 6a55e9f | 2015-04-30 15:31:06 -0400 | [diff] [blame] | 260 | dpmsValue = DRM_MODE_DPMS_OFF; |
Sean Paul | ef8f1f9 | 2015-04-29 16:05:23 -0400 | [diff] [blame] | 261 | break; |
Sean Paul | e0c4c3d | 2015-01-20 16:56:04 -0500 | [diff] [blame] | 262 | |
Sean Paul | ef8f1f9 | 2015-04-29 16:05:23 -0400 | [diff] [blame] | 263 | /* We can't support dozing right now, so go full on */ |
| 264 | case HWC_POWER_MODE_DOZE: |
| 265 | case HWC_POWER_MODE_DOZE_SUSPEND: |
| 266 | case HWC_POWER_MODE_NORMAL: |
Sean Paul | 6a55e9f | 2015-04-30 15:31:06 -0400 | [diff] [blame] | 267 | dpmsValue = DRM_MODE_DPMS_ON; |
Sean Paul | ef8f1f9 | 2015-04-29 16:05:23 -0400 | [diff] [blame] | 268 | break; |
| 269 | }; |
Sean Paul | 6a55e9f | 2015-04-30 15:31:06 -0400 | [diff] [blame] | 270 | return ctx->drm.SetDpmsMode(display, dpmsValue); |
Sean Paul | e0c4c3d | 2015-01-20 16:56:04 -0500 | [diff] [blame] | 271 | } |
| 272 | |
Sean Paul | ef8f1f9 | 2015-04-29 16:05:23 -0400 | [diff] [blame] | 273 | static int hwc_query(struct hwc_composer_device_1 * /* dev */, int what, |
| 274 | int *value) { |
| 275 | switch (what) { |
| 276 | case HWC_BACKGROUND_LAYER_SUPPORTED: |
| 277 | *value = 0; /* TODO: We should do this */ |
| 278 | break; |
| 279 | case HWC_VSYNC_PERIOD: |
| 280 | ALOGW("Query for deprecated vsync value, returning 60Hz"); |
| 281 | *value = 1000 * 1000 * 1000 / 60; |
| 282 | break; |
| 283 | case HWC_DISPLAY_TYPES_SUPPORTED: |
| 284 | *value = HWC_DISPLAY_PRIMARY | HWC_DISPLAY_EXTERNAL; |
| 285 | break; |
| 286 | } |
| 287 | return 0; |
Sean Paul | e0c4c3d | 2015-01-20 16:56:04 -0500 | [diff] [blame] | 288 | } |
| 289 | |
Sean Paul | ef8f1f9 | 2015-04-29 16:05:23 -0400 | [diff] [blame] | 290 | static void hwc_register_procs(struct hwc_composer_device_1 *dev, |
| 291 | hwc_procs_t const *procs) { |
| 292 | struct hwc_context_t *ctx = (struct hwc_context_t *)&dev->common; |
Sean Paul | e0c4c3d | 2015-01-20 16:56:04 -0500 | [diff] [blame] | 293 | |
Sean Paul | ef8f1f9 | 2015-04-29 16:05:23 -0400 | [diff] [blame] | 294 | ctx->procs = procs; |
Sean Paul | 4057be3 | 2015-05-13 06:23:09 -0700 | [diff] [blame] | 295 | |
| 296 | for (hwc_context_t::DisplayMapIter iter = ctx->displays.begin(); |
| 297 | iter != ctx->displays.end(); ++iter) { |
| 298 | iter->second.vsync_worker.SetProcs(procs); |
| 299 | } |
Sean Paul | e0c4c3d | 2015-01-20 16:56:04 -0500 | [diff] [blame] | 300 | } |
| 301 | |
Sean Paul | ef8f1f9 | 2015-04-29 16:05:23 -0400 | [diff] [blame] | 302 | static int hwc_get_display_configs(struct hwc_composer_device_1 *dev, |
| 303 | int display, uint32_t *configs, |
Sean Paul | 6a55e9f | 2015-04-30 15:31:06 -0400 | [diff] [blame] | 304 | size_t *num_configs) { |
| 305 | if (!*num_configs) |
Sean Paul | ef8f1f9 | 2015-04-29 16:05:23 -0400 | [diff] [blame] | 306 | return 0; |
Sean Paul | e0c4c3d | 2015-01-20 16:56:04 -0500 | [diff] [blame] | 307 | |
Sean Paul | ef8f1f9 | 2015-04-29 16:05:23 -0400 | [diff] [blame] | 308 | struct hwc_context_t *ctx = (struct hwc_context_t *)&dev->common; |
Sean Paul | e42febf | 2015-05-07 11:35:29 -0700 | [diff] [blame] | 309 | hwc_drm_display_t *hd = &ctx->displays[display]; |
Sean Paul | 6a55e9f | 2015-04-30 15:31:06 -0400 | [diff] [blame] | 310 | hd->config_ids.clear(); |
| 311 | |
| 312 | DrmConnector *connector = ctx->drm.GetConnectorForDisplay(display); |
| 313 | if (!connector) { |
| 314 | ALOGE("Failed to get connector for display %d", display); |
Sean Paul | ef8f1f9 | 2015-04-29 16:05:23 -0400 | [diff] [blame] | 315 | return -ENODEV; |
| 316 | } |
Sean Paul | e0c4c3d | 2015-01-20 16:56:04 -0500 | [diff] [blame] | 317 | |
Sean Paul | e42febf | 2015-05-07 11:35:29 -0700 | [diff] [blame] | 318 | int ret = connector->UpdateModes(); |
Sean Paul | 6a55e9f | 2015-04-30 15:31:06 -0400 | [diff] [blame] | 319 | if (ret) { |
| 320 | ALOGE("Failed to update display modes %d", ret); |
Sean Paul | ef8f1f9 | 2015-04-29 16:05:23 -0400 | [diff] [blame] | 321 | return ret; |
Sean Paul | ef8f1f9 | 2015-04-29 16:05:23 -0400 | [diff] [blame] | 322 | } |
Sean Paul | e0c4c3d | 2015-01-20 16:56:04 -0500 | [diff] [blame] | 323 | |
Sean Paul | 6a55e9f | 2015-04-30 15:31:06 -0400 | [diff] [blame] | 324 | for (DrmConnector::ModeIter iter = connector->begin_modes(); |
| 325 | iter != connector->end_modes(); ++iter) { |
| 326 | size_t idx = hd->config_ids.size(); |
| 327 | if (idx == *num_configs) |
| 328 | break; |
| 329 | hd->config_ids.push_back(iter->id()); |
| 330 | configs[idx] = iter->id(); |
| 331 | } |
| 332 | *num_configs = hd->config_ids.size(); |
| 333 | return *num_configs == 0 ? -1 : 0; |
Sean Paul | e0c4c3d | 2015-01-20 16:56:04 -0500 | [diff] [blame] | 334 | } |
| 335 | |
Sean Paul | ef8f1f9 | 2015-04-29 16:05:23 -0400 | [diff] [blame] | 336 | static int hwc_get_display_attributes(struct hwc_composer_device_1 *dev, |
| 337 | int display, uint32_t config, |
| 338 | const uint32_t *attributes, |
| 339 | int32_t *values) { |
| 340 | struct hwc_context_t *ctx = (struct hwc_context_t *)&dev->common; |
Sean Paul | 6a55e9f | 2015-04-30 15:31:06 -0400 | [diff] [blame] | 341 | DrmConnector *c = ctx->drm.GetConnectorForDisplay(display); |
Sean Paul | ef8f1f9 | 2015-04-29 16:05:23 -0400 | [diff] [blame] | 342 | if (!c) { |
Sean Paul | 6a55e9f | 2015-04-30 15:31:06 -0400 | [diff] [blame] | 343 | ALOGE("Failed to get DrmConnector for display %d", display); |
Sean Paul | ef8f1f9 | 2015-04-29 16:05:23 -0400 | [diff] [blame] | 344 | return -ENODEV; |
| 345 | } |
Sean Paul | 6a55e9f | 2015-04-30 15:31:06 -0400 | [diff] [blame] | 346 | DrmMode mode; |
| 347 | for (DrmConnector::ModeIter iter = c->begin_modes(); iter != c->end_modes(); |
| 348 | ++iter) { |
| 349 | if (iter->id() == config) { |
| 350 | mode = *iter; |
| 351 | break; |
| 352 | } |
| 353 | } |
| 354 | if (mode.id() == 0) { |
| 355 | ALOGE("Failed to find active mode for display %d", display); |
| 356 | return -ENOENT; |
Sean Paul | ef8f1f9 | 2015-04-29 16:05:23 -0400 | [diff] [blame] | 357 | } |
Sean Paul | e0c4c3d | 2015-01-20 16:56:04 -0500 | [diff] [blame] | 358 | |
Sean Paul | 6a55e9f | 2015-04-30 15:31:06 -0400 | [diff] [blame] | 359 | uint32_t mm_width = c->mm_width(); |
| 360 | uint32_t mm_height = c->mm_height(); |
Sean Paul | ef8f1f9 | 2015-04-29 16:05:23 -0400 | [diff] [blame] | 361 | for (int i = 0; attributes[i] != HWC_DISPLAY_NO_ATTRIBUTE; ++i) { |
| 362 | switch (attributes[i]) { |
| 363 | case HWC_DISPLAY_VSYNC_PERIOD: |
Sean Paul | 6a55e9f | 2015-04-30 15:31:06 -0400 | [diff] [blame] | 364 | values[i] = 1000 * 1000 * 1000 / mode.v_refresh(); |
Sean Paul | ef8f1f9 | 2015-04-29 16:05:23 -0400 | [diff] [blame] | 365 | break; |
| 366 | case HWC_DISPLAY_WIDTH: |
Sean Paul | 6a55e9f | 2015-04-30 15:31:06 -0400 | [diff] [blame] | 367 | values[i] = mode.h_display(); |
Sean Paul | ef8f1f9 | 2015-04-29 16:05:23 -0400 | [diff] [blame] | 368 | break; |
| 369 | case HWC_DISPLAY_HEIGHT: |
Sean Paul | 6a55e9f | 2015-04-30 15:31:06 -0400 | [diff] [blame] | 370 | values[i] = mode.v_display(); |
Sean Paul | ef8f1f9 | 2015-04-29 16:05:23 -0400 | [diff] [blame] | 371 | break; |
| 372 | case HWC_DISPLAY_DPI_X: |
| 373 | /* Dots per 1000 inches */ |
Sean Paul | 6a55e9f | 2015-04-30 15:31:06 -0400 | [diff] [blame] | 374 | values[i] = mm_width ? (mode.h_display() * UM_PER_INCH) / mm_width : 0; |
Sean Paul | ef8f1f9 | 2015-04-29 16:05:23 -0400 | [diff] [blame] | 375 | break; |
| 376 | case HWC_DISPLAY_DPI_Y: |
| 377 | /* Dots per 1000 inches */ |
Sean Paul | 6a55e9f | 2015-04-30 15:31:06 -0400 | [diff] [blame] | 378 | values[i] = |
| 379 | mm_height ? (mode.v_display() * UM_PER_INCH) / mm_height : 0; |
Sean Paul | ef8f1f9 | 2015-04-29 16:05:23 -0400 | [diff] [blame] | 380 | break; |
| 381 | } |
| 382 | } |
Sean Paul | ef8f1f9 | 2015-04-29 16:05:23 -0400 | [diff] [blame] | 383 | return 0; |
Sean Paul | e0c4c3d | 2015-01-20 16:56:04 -0500 | [diff] [blame] | 384 | } |
| 385 | |
Sean Paul | ef8f1f9 | 2015-04-29 16:05:23 -0400 | [diff] [blame] | 386 | static int hwc_get_active_config(struct hwc_composer_device_1 *dev, |
| 387 | int display) { |
| 388 | struct hwc_context_t *ctx = (struct hwc_context_t *)&dev->common; |
Sean Paul | 6a55e9f | 2015-04-30 15:31:06 -0400 | [diff] [blame] | 389 | DrmConnector *c = ctx->drm.GetConnectorForDisplay(display); |
| 390 | if (!c) { |
| 391 | ALOGE("Failed to get DrmConnector for display %d", display); |
Sean Paul | ef8f1f9 | 2015-04-29 16:05:23 -0400 | [diff] [blame] | 392 | return -ENODEV; |
| 393 | } |
Sean Paul | e0c4c3d | 2015-01-20 16:56:04 -0500 | [diff] [blame] | 394 | |
Sean Paul | 6a55e9f | 2015-04-30 15:31:06 -0400 | [diff] [blame] | 395 | DrmMode mode = c->active_mode(); |
Sean Paul | e42febf | 2015-05-07 11:35:29 -0700 | [diff] [blame] | 396 | hwc_drm_display_t *hd = &ctx->displays[display]; |
Sean Paul | 6a55e9f | 2015-04-30 15:31:06 -0400 | [diff] [blame] | 397 | for (size_t i = 0; i < hd->config_ids.size(); ++i) { |
| 398 | if (hd->config_ids[i] == mode.id()) |
| 399 | return i; |
Sean Paul | ef8f1f9 | 2015-04-29 16:05:23 -0400 | [diff] [blame] | 400 | } |
Sean Paul | 6a55e9f | 2015-04-30 15:31:06 -0400 | [diff] [blame] | 401 | return -1; |
Sean Paul | e0c4c3d | 2015-01-20 16:56:04 -0500 | [diff] [blame] | 402 | } |
| 403 | |
Sean Paul | ef8f1f9 | 2015-04-29 16:05:23 -0400 | [diff] [blame] | 404 | static int hwc_set_active_config(struct hwc_composer_device_1 *dev, int display, |
| 405 | int index) { |
| 406 | struct hwc_context_t *ctx = (struct hwc_context_t *)&dev->common; |
Sean Paul | e42febf | 2015-05-07 11:35:29 -0700 | [diff] [blame] | 407 | hwc_drm_display_t *hd = &ctx->displays[display]; |
Sean Paul | 6a55e9f | 2015-04-30 15:31:06 -0400 | [diff] [blame] | 408 | if (index >= (int)hd->config_ids.size()) { |
| 409 | ALOGE("Invalid config index %d passed in", index); |
| 410 | return -EINVAL; |
Sean Paul | ef8f1f9 | 2015-04-29 16:05:23 -0400 | [diff] [blame] | 411 | } |
Sean Paul | e0c4c3d | 2015-01-20 16:56:04 -0500 | [diff] [blame] | 412 | |
Sean Paul | e42febf | 2015-05-07 11:35:29 -0700 | [diff] [blame] | 413 | int ret = |
Sean Paul | 6a55e9f | 2015-04-30 15:31:06 -0400 | [diff] [blame] | 414 | ctx->drm.SetDisplayActiveMode(display, hd->config_ids[index]); |
| 415 | if (ret) { |
| 416 | ALOGE("Failed to set config for display %d", display); |
| 417 | return ret; |
Sean Paul | ef8f1f9 | 2015-04-29 16:05:23 -0400 | [diff] [blame] | 418 | } |
Sean Paul | e0c4c3d | 2015-01-20 16:56:04 -0500 | [diff] [blame] | 419 | |
Sean Paul | 6a55e9f | 2015-04-30 15:31:06 -0400 | [diff] [blame] | 420 | return ret; |
Sean Paul | e0c4c3d | 2015-01-20 16:56:04 -0500 | [diff] [blame] | 421 | } |
| 422 | |
Sean Paul | ef8f1f9 | 2015-04-29 16:05:23 -0400 | [diff] [blame] | 423 | static int hwc_device_close(struct hw_device_t *dev) { |
| 424 | struct hwc_context_t *ctx = (struct hwc_context_t *)dev; |
Sean Paul | ef8f1f9 | 2015-04-29 16:05:23 -0400 | [diff] [blame] | 425 | delete ctx; |
Sean Paul | ef8f1f9 | 2015-04-29 16:05:23 -0400 | [diff] [blame] | 426 | return 0; |
Sean Paul | e0c4c3d | 2015-01-20 16:56:04 -0500 | [diff] [blame] | 427 | } |
| 428 | |
Sean Paul | 24a26e3 | 2015-02-04 10:34:47 -0800 | [diff] [blame] | 429 | /* |
| 430 | * TODO: This function sets the active config to the first one in the list. This |
| 431 | * should be fixed such that it selects the preferred mode for the display, or |
| 432 | * some other, saner, method of choosing the config. |
| 433 | */ |
Sean Paul | e42febf | 2015-05-07 11:35:29 -0700 | [diff] [blame] | 434 | static int hwc_set_initial_config(hwc_drm_display_t *hd) { |
Sean Paul | ef8f1f9 | 2015-04-29 16:05:23 -0400 | [diff] [blame] | 435 | uint32_t config; |
| 436 | size_t num_configs = 1; |
| 437 | int ret = hwc_get_display_configs(&hd->ctx->device, hd->display, &config, |
| 438 | &num_configs); |
| 439 | if (ret || !num_configs) |
| 440 | return 0; |
Sean Paul | 24a26e3 | 2015-02-04 10:34:47 -0800 | [diff] [blame] | 441 | |
Sean Paul | ef8f1f9 | 2015-04-29 16:05:23 -0400 | [diff] [blame] | 442 | ret = hwc_set_active_config(&hd->ctx->device, hd->display, 0); |
| 443 | if (ret) { |
| 444 | ALOGE("Failed to set active config d=%d ret=%d", hd->display, ret); |
| 445 | return ret; |
| 446 | } |
Sean Paul | 24a26e3 | 2015-02-04 10:34:47 -0800 | [diff] [blame] | 447 | |
Sean Paul | ef8f1f9 | 2015-04-29 16:05:23 -0400 | [diff] [blame] | 448 | return ret; |
Sean Paul | 24a26e3 | 2015-02-04 10:34:47 -0800 | [diff] [blame] | 449 | } |
| 450 | |
Sean Paul | 6a55e9f | 2015-04-30 15:31:06 -0400 | [diff] [blame] | 451 | static int hwc_initialize_display(struct hwc_context_t *ctx, int display) { |
Sean Paul | e42febf | 2015-05-07 11:35:29 -0700 | [diff] [blame] | 452 | hwc_drm_display_t *hd = &ctx->displays[display]; |
Sean Paul | ef8f1f9 | 2015-04-29 16:05:23 -0400 | [diff] [blame] | 453 | hd->ctx = ctx; |
| 454 | hd->display = display; |
Sean Paul | e0c4c3d | 2015-01-20 16:56:04 -0500 | [diff] [blame] | 455 | |
Sean Paul | b386f1b | 2015-05-13 06:33:23 -0700 | [diff] [blame] | 456 | int ret = hwc_set_initial_config(hd); |
Sean Paul | ef8f1f9 | 2015-04-29 16:05:23 -0400 | [diff] [blame] | 457 | if (ret) { |
| 458 | ALOGE("Failed to set initial config for d=%d ret=%d", display, ret); |
Sean Paul | ef8f1f9 | 2015-04-29 16:05:23 -0400 | [diff] [blame] | 459 | return ret; |
| 460 | } |
Sean Paul | 24a26e3 | 2015-02-04 10:34:47 -0800 | [diff] [blame] | 461 | |
Sean Paul | 4057be3 | 2015-05-13 06:23:09 -0700 | [diff] [blame] | 462 | ret = hd->vsync_worker.Init(&ctx->drm, display); |
| 463 | if (ret) { |
| 464 | ALOGE("Failed to create event worker for display %d %d\n", display, ret); |
| 465 | return ret; |
| 466 | } |
| 467 | |
Sean Paul | ef8f1f9 | 2015-04-29 16:05:23 -0400 | [diff] [blame] | 468 | return 0; |
Sean Paul | e0c4c3d | 2015-01-20 16:56:04 -0500 | [diff] [blame] | 469 | } |
| 470 | |
Sean Paul | ef8f1f9 | 2015-04-29 16:05:23 -0400 | [diff] [blame] | 471 | static int hwc_enumerate_displays(struct hwc_context_t *ctx) { |
Sean Paul | 6a55e9f | 2015-04-30 15:31:06 -0400 | [diff] [blame] | 472 | int ret; |
| 473 | for (DrmResources::ConnectorIter c = ctx->drm.begin_connectors(); |
| 474 | c != ctx->drm.end_connectors(); ++c) { |
| 475 | ret = hwc_initialize_display(ctx, (*c)->display()); |
| 476 | if (ret) { |
| 477 | ALOGE("Failed to initialize display %d", (*c)->display()); |
| 478 | return ret; |
Sean Paul | ef8f1f9 | 2015-04-29 16:05:23 -0400 | [diff] [blame] | 479 | } |
| 480 | } |
Sean Paul | ef8f1f9 | 2015-04-29 16:05:23 -0400 | [diff] [blame] | 481 | |
| 482 | return 0; |
Sean Paul | e0c4c3d | 2015-01-20 16:56:04 -0500 | [diff] [blame] | 483 | } |
| 484 | |
Sean Paul | ef8f1f9 | 2015-04-29 16:05:23 -0400 | [diff] [blame] | 485 | static int hwc_device_open(const struct hw_module_t *module, const char *name, |
| 486 | struct hw_device_t **dev) { |
| 487 | if (strcmp(name, HWC_HARDWARE_COMPOSER)) { |
| 488 | ALOGE("Invalid module name- %s", name); |
| 489 | return -EINVAL; |
| 490 | } |
| 491 | |
| 492 | struct hwc_context_t *ctx = new hwc_context_t(); |
| 493 | if (!ctx) { |
| 494 | ALOGE("Failed to allocate hwc context"); |
| 495 | return -ENOMEM; |
| 496 | } |
| 497 | |
Sean Paul | 6a55e9f | 2015-04-30 15:31:06 -0400 | [diff] [blame] | 498 | int ret = ctx->drm.Init(); |
| 499 | if (ret) { |
| 500 | ALOGE("Can't initialize Drm object %d", ret); |
| 501 | delete ctx; |
| 502 | return ret; |
| 503 | } |
| 504 | |
Sean Paul | da6270d | 2015-06-01 14:11:52 -0400 | [diff] [blame] | 505 | ctx->importer = Importer::CreateInstance(&ctx->drm); |
| 506 | if (!ctx->importer) { |
| 507 | ALOGE("Failed to create importer instance"); |
Sean Paul | ef8f1f9 | 2015-04-29 16:05:23 -0400 | [diff] [blame] | 508 | delete ctx; |
| 509 | return ret; |
| 510 | } |
| 511 | |
Sean Paul | ef8f1f9 | 2015-04-29 16:05:23 -0400 | [diff] [blame] | 512 | ret = hwc_enumerate_displays(ctx); |
| 513 | if (ret) { |
| 514 | ALOGE("Failed to enumerate displays: %s", strerror(ret)); |
Sean Paul | 6a55e9f | 2015-04-30 15:31:06 -0400 | [diff] [blame] | 515 | delete ctx; |
| 516 | return ret; |
| 517 | } |
| 518 | |
Sean Paul | ef8f1f9 | 2015-04-29 16:05:23 -0400 | [diff] [blame] | 519 | ctx->device.common.tag = HARDWARE_DEVICE_TAG; |
| 520 | ctx->device.common.version = HWC_DEVICE_API_VERSION_1_4; |
| 521 | ctx->device.common.module = const_cast<hw_module_t *>(module); |
| 522 | ctx->device.common.close = hwc_device_close; |
| 523 | |
Sean Paul | 9046c64 | 2015-06-10 17:27:47 -0400 | [diff] [blame^] | 524 | ctx->device.dump = hwc_dump; |
Sean Paul | ef8f1f9 | 2015-04-29 16:05:23 -0400 | [diff] [blame] | 525 | ctx->device.prepare = hwc_prepare; |
| 526 | ctx->device.set = hwc_set; |
| 527 | ctx->device.eventControl = hwc_event_control; |
| 528 | ctx->device.setPowerMode = hwc_set_power_mode; |
| 529 | ctx->device.query = hwc_query; |
| 530 | ctx->device.registerProcs = hwc_register_procs; |
| 531 | ctx->device.getDisplayConfigs = hwc_get_display_configs; |
| 532 | ctx->device.getDisplayAttributes = hwc_get_display_attributes; |
| 533 | ctx->device.getActiveConfig = hwc_get_active_config; |
| 534 | ctx->device.setActiveConfig = hwc_set_active_config; |
| 535 | ctx->device.setCursorPositionAsync = NULL; /* TODO: Add cursor */ |
| 536 | |
| 537 | *dev = &ctx->device.common; |
| 538 | |
| 539 | return 0; |
| 540 | } |
Sean Paul | 6a55e9f | 2015-04-30 15:31:06 -0400 | [diff] [blame] | 541 | } |
Sean Paul | ef8f1f9 | 2015-04-29 16:05:23 -0400 | [diff] [blame] | 542 | |
Sean Paul | 6a55e9f | 2015-04-30 15:31:06 -0400 | [diff] [blame] | 543 | static struct hw_module_methods_t hwc_module_methods = { |
| 544 | open : android::hwc_device_open |
| 545 | }; |
Sean Paul | e0c4c3d | 2015-01-20 16:56:04 -0500 | [diff] [blame] | 546 | |
| 547 | hwc_module_t HAL_MODULE_INFO_SYM = { |
Sean Paul | ef8f1f9 | 2015-04-29 16:05:23 -0400 | [diff] [blame] | 548 | common : { |
| 549 | tag : HARDWARE_MODULE_TAG, |
| 550 | version_major : 1, |
| 551 | version_minor : 0, |
| 552 | id : HWC_HARDWARE_MODULE_ID, |
| 553 | name : "DRM hwcomposer module", |
| 554 | author : "The Android Open Source Project", |
| 555 | methods : &hwc_module_methods, |
| 556 | dso : NULL, |
| 557 | reserved : {0}, |
| 558 | } |
Sean Paul | e0c4c3d | 2015-01-20 16:56:04 -0500 | [diff] [blame] | 559 | }; |