blob: 303536268160cd50d56aa7f7b2d39a2f9c57477b [file] [log] [blame]
Sean Paule0c4c3d2015-01-20 16:56:04 -05001/*
2 * Copyright (C) 2015 The Android Open Source Project
3 *
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
7 *
8 * http://www.apache.org/licenses/LICENSE-2.0
9 *
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
15 */
16
Stéphane Marchesinbe98c8c2015-06-23 16:18:10 -070017#define ATRACE_TAG ATRACE_TAG_GRAPHICS
Sean Paule0c4c3d2015-01-20 16:56:04 -050018#define LOG_TAG "hwcomposer-drm"
19
Sean Paulef8f1f92015-04-29 16:05:23 -040020#include "drm_hwcomposer.h"
Sean Paul6a55e9f2015-04-30 15:31:06 -040021#include "drmresources.h"
Sean Paulda6270d2015-06-01 14:11:52 -040022#include "importer.h"
Sean Paul4057be32015-05-13 06:23:09 -070023#include "vsyncworker.h"
Sean Paulef8f1f92015-04-29 16:05:23 -040024
Zach Reizner09807052015-08-13 14:53:41 -070025#include <stdlib.h>
26
27#include <map>
28#include <vector>
Zach Reizner4a253652015-09-10 18:30:54 -070029#include <sstream>
Zach Reizner09807052015-08-13 14:53:41 -070030
Sean Paule0c4c3d2015-01-20 16:56:04 -050031#include <errno.h>
Sean Paulef8f1f92015-04-29 16:05:23 -040032#include <fcntl.h>
Sean Paulef8f1f92015-04-29 16:05:23 -040033#include <pthread.h>
Sean Paule0c4c3d2015-01-20 16:56:04 -050034#include <sys/param.h>
Sean Paul9aa5ad32015-01-22 15:47:54 -050035#include <sys/resource.h>
Sean Paule0c4c3d2015-01-20 16:56:04 -050036#include <xf86drm.h>
37#include <xf86drmMode.h>
Sean Paule0c4c3d2015-01-20 16:56:04 -050038
Sean Paulef8f1f92015-04-29 16:05:23 -040039#include <cutils/log.h>
40#include <cutils/properties.h>
Sean Paule0c4c3d2015-01-20 16:56:04 -050041#include <hardware/hardware.h>
42#include <hardware/hwcomposer.h>
Zach Reizner4a253652015-09-10 18:30:54 -070043#include <sw_sync.h>
44#include <sync/sync.h>
Stéphane Marchesinbe98c8c2015-06-23 16:18:10 -070045#include <utils/Trace.h>
Sean Paule0c4c3d2015-01-20 16:56:04 -050046
Sean Paule0c4c3d2015-01-20 16:56:04 -050047#define UM_PER_INCH 25400
Stéphane Marchesincb3f9842015-06-19 14:50:45 -070048#define HWC_FB_BUFFERS 3
Sean Paule0c4c3d2015-01-20 16:56:04 -050049
Sean Paul6a55e9f2015-04-30 15:31:06 -040050namespace android {
Sean Paule0c4c3d2015-01-20 16:56:04 -050051
Zach Reizner4a253652015-09-10 18:30:54 -070052class DummySwSyncTimeline {
53 public:
54 int Init() {
55 int ret = timeline_fd_.Set(sw_sync_timeline_create());
56 if (ret < 0)
57 return ret;
58 return 0;
59 }
60
61 UniqueFd CreateDummyFence() {
62 int ret = sw_sync_fence_create(timeline_fd_.get(), "dummy fence",
63 timeline_pt_ + 1);
64 if (ret < 0) {
65 ALOGE("Failed to create dummy fence %d", ret);
66 return ret;
67 }
68
69 UniqueFd ret_fd(ret);
70
71 ret = sw_sync_timeline_inc(timeline_fd_.get(), 1);
72 if (ret) {
73 ALOGE("Failed to increment dummy sync timeline %d", ret);
74 return ret;
75 }
76
77 ++timeline_pt_;
78 return ret_fd;
79 }
80
81 private:
82 UniqueFd timeline_fd_;
83 int timeline_pt_ = 0;
84};
85
86struct CheckedOutputFd {
87 CheckedOutputFd(int *fd, const char *description,
88 DummySwSyncTimeline &timeline)
89 : fd_(fd), description_(description), timeline_(timeline) {
90 }
91 CheckedOutputFd(CheckedOutputFd &&rhs)
92 : description_(rhs.description_), timeline_(rhs.timeline_) {
93 std::swap(fd_, rhs.fd_);
94 }
95
96 CheckedOutputFd &operator=(const CheckedOutputFd &rhs) = delete;
97
98 ~CheckedOutputFd() {
99 if (fd_ == NULL)
100 return;
101
102 if (*fd_ >= 0)
103 return;
104
105 *fd_ = timeline_.CreateDummyFence().Release();
106
107 if (*fd_ < 0)
108 ALOGE("Failed to fill %s (%p == %d) before destruction",
109 description_.c_str(), fd_, *fd_);
110 }
111
112 private:
113 int *fd_ = NULL;
114 std::string description_;
115 DummySwSyncTimeline &timeline_;
116};
117
Sean Paule42febf2015-05-07 11:35:29 -0700118typedef struct hwc_drm_display {
Sean Paulef8f1f92015-04-29 16:05:23 -0400119 struct hwc_context_t *ctx;
120 int display;
Sean Paul9aa5ad32015-01-22 15:47:54 -0500121
Sean Paul6a55e9f2015-04-30 15:31:06 -0400122 std::vector<uint32_t> config_ids;
Sean Paul9aa5ad32015-01-22 15:47:54 -0500123
Sean Paul4057be32015-05-13 06:23:09 -0700124 VSyncWorker vsync_worker;
Sean Paule42febf2015-05-07 11:35:29 -0700125} hwc_drm_display_t;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500126
127struct hwc_context_t {
Sean Paule42febf2015-05-07 11:35:29 -0700128 // map of display:hwc_drm_display_t
129 typedef std::map<int, hwc_drm_display_t> DisplayMap;
130 typedef DisplayMap::iterator DisplayMapIter;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500131
Zach Reizner1946fa72015-08-14 11:14:38 -0700132 hwc_context_t() : procs(NULL), importer(NULL), use_framebuffer_target(false) {
Sean Paulda6270d2015-06-01 14:11:52 -0400133 }
134
135 ~hwc_context_t() {
136 delete importer;
137 }
138
Sean Paule42febf2015-05-07 11:35:29 -0700139 hwc_composer_device_1_t device;
Sean Paulef8f1f92015-04-29 16:05:23 -0400140 hwc_procs_t const *procs;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500141
Sean Paule42febf2015-05-07 11:35:29 -0700142 DisplayMap displays;
Sean Paul6a55e9f2015-04-30 15:31:06 -0400143 DrmResources drm;
Sean Paulda6270d2015-06-01 14:11:52 -0400144 Importer *importer;
Zach Reizner4a253652015-09-10 18:30:54 -0700145 const gralloc_module_t *gralloc;
146 DummySwSyncTimeline dummy_timeline;
Zach Reizner1946fa72015-08-14 11:14:38 -0700147 bool use_framebuffer_target;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500148};
149
Zach Reizner4a253652015-09-10 18:30:54 -0700150static native_handle_t *dup_buffer_handle(buffer_handle_t handle) {
151 native_handle_t *new_handle =
152 native_handle_create(handle->numFds, handle->numInts);
153 if (new_handle == NULL)
154 return NULL;
155
156 const int *old_data = handle->data;
157 int *new_data = new_handle->data;
158 for (int i = 0; i < handle->numFds; i++) {
159 *new_data = dup(*old_data);
160 old_data++;
161 new_data++;
162 }
163 memcpy(new_data, old_data, sizeof(int) * handle->numInts);
164
165 return new_handle;
166}
167
168static void free_buffer_handle(native_handle_t *handle) {
169 int ret = native_handle_close(handle);
170 if (ret)
171 ALOGE("Failed to close native handle %d", ret);
172 ret = native_handle_delete(handle);
173 if (ret)
174 ALOGE("Failed to delete native handle %d", ret);
175}
176
177OutputFd &OutputFd::operator=(OutputFd &&rhs) {
178 if (fd_ == NULL) {
179 std::swap(fd_, rhs.fd_);
180 } else {
181 if (*fd_ < 0) {
182 ALOGE("Failed to fill OutputFd %p before assignment", fd_);
183 }
184 fd_ = rhs.fd_;
185 rhs.fd_ = NULL;
186 }
187
188 return *this;
189}
190
191hwc_drm_bo *DrmHwcBuffer::operator->() {
192 if (importer_ == NULL) {
193 ALOGE("Access of none existent BO");
194 exit(1);
195 return NULL;
196 }
197 return &bo_;
198}
199
200void DrmHwcBuffer::Clear() {
201 if (importer_ != NULL) {
202 importer_->ReleaseBuffer(&bo_);
203 importer_ = NULL;
204 }
205}
206
207int DrmHwcBuffer::ImportBuffer(buffer_handle_t handle, Importer *importer) {
208 hwc_drm_bo tmp_bo;
209
210 int ret = importer->ImportBuffer(handle, &tmp_bo);
211 if (ret)
212 return ret;
213
214 if (importer_ != NULL) {
215 importer_->ReleaseBuffer(&bo_);
216 }
217
218 importer_ = importer;
219
220 bo_ = tmp_bo;
221
222 return 0;
223}
224
225int DrmHwcNativeHandle::CopyBufferHandle(buffer_handle_t handle,
226 const gralloc_module_t *gralloc) {
227 native_handle_t *handle_copy = dup_buffer_handle(handle);
228 if (handle_copy == NULL) {
229 ALOGE("Failed to duplicate handle");
230 return -ENOMEM;
231 }
232
233 int ret = gralloc->registerBuffer(gralloc, handle_copy);
234 if (ret) {
235 ALOGE("Failed to register buffer handle %d", ret);
236 free_buffer_handle(handle_copy);
237 return ret;
238 }
239
240 Clear();
241
242 gralloc_ = gralloc;
243 handle_ = handle_copy;
244
245 return 0;
246}
247
248DrmHwcNativeHandle::~DrmHwcNativeHandle() {
249 Clear();
250}
251
252void DrmHwcNativeHandle::Clear() {
253 if (gralloc_ != NULL && handle_ != NULL) {
254 gralloc_->unregisterBuffer(gralloc_, handle_);
255 free_buffer_handle(handle_);
256 gralloc_ = NULL;
257 handle_ = NULL;
258 }
259}
260
261int DrmHwcLayer::InitFromHwcLayer(hwc_layer_1_t *sf_layer, Importer *importer,
262 const gralloc_module_t *gralloc) {
263 sf_handle = sf_layer->handle;
264 int ret = buffer.ImportBuffer(sf_layer->handle, importer);
265 if (ret)
266 return ret;
267
268 ret = handle.CopyBufferHandle(sf_layer->handle, gralloc);
269 if (ret)
270 return ret;
271
272 alpha = sf_layer->planeAlpha;
273
274 switch (sf_layer->transform) {
275 case 0:
276 transform = DrmHwcTransform::kIdentity;
277 break;
278 case HWC_TRANSFORM_FLIP_H:
279 transform = DrmHwcTransform::kFlipH;
280 break;
281 case HWC_TRANSFORM_FLIP_V:
282 transform = DrmHwcTransform::kFlipV;
283 break;
284 case HWC_TRANSFORM_ROT_90:
285 transform = DrmHwcTransform::kRotate90;
286 break;
287 case HWC_TRANSFORM_ROT_180:
288 transform = DrmHwcTransform::kRotate180;
289 break;
290 case HWC_TRANSFORM_ROT_270:
291 transform = DrmHwcTransform::kRotate270;
292 break;
293 default:
294 ALOGE("Invalid transform in hwc_layer_1_t %d", sf_layer->transform);
295 return -EINVAL;
296 }
297
298 switch (sf_layer->blending) {
299 case HWC_BLENDING_NONE:
300 blending = DrmHwcBlending::kNone;
301 break;
302 case HWC_BLENDING_PREMULT:
303 blending = DrmHwcBlending::kPreMult;
304 break;
305 case HWC_BLENDING_COVERAGE:
306 blending = DrmHwcBlending::kCoverage;
307 break;
308 default:
309 ALOGE("Invalid blending in hwc_layer_1_t %d", sf_layer->blending);
310 return -EINVAL;
311 }
312
313 source_crop = DrmHwcRect<float>(
314 sf_layer->sourceCropf.left, sf_layer->sourceCropf.top,
315 sf_layer->sourceCropf.right, sf_layer->sourceCropf.bottom);
316 display_frame = DrmHwcRect<int>(
317 sf_layer->displayFrame.left, sf_layer->displayFrame.top,
318 sf_layer->displayFrame.right, sf_layer->displayFrame.bottom);
319
320 return 0;
321}
322
Zach Reiznerc6520e42015-08-13 14:32:09 -0700323static void hwc_dump(struct hwc_composer_device_1 *dev, char *buff,
Sean Paul9046c642015-06-10 17:27:47 -0400324 int buff_len) {
325 struct hwc_context_t *ctx = (struct hwc_context_t *)&dev->common;
326 std::ostringstream out;
327
328 ctx->drm.compositor()->Dump(&out);
329 std::string out_str = out.str();
330 strncpy(buff, out_str.c_str(), std::min((size_t)buff_len, out_str.length()));
331}
332
Sean Paulb386f1b2015-05-13 06:33:23 -0700333static int hwc_prepare(hwc_composer_device_1_t *dev, size_t num_displays,
Sean Paulef8f1f92015-04-29 16:05:23 -0400334 hwc_display_contents_1_t **display_contents) {
Sean Paulb386f1b2015-05-13 06:33:23 -0700335 struct hwc_context_t *ctx = (struct hwc_context_t *)&dev->common;
Zach Reizner1946fa72015-08-14 11:14:38 -0700336
337 char use_framebuffer_target[PROPERTY_VALUE_MAX];
338 property_get("hwc.drm.use_framebuffer_target", use_framebuffer_target, "0");
339 bool new_use_framebuffer_target = atoi(use_framebuffer_target);
340 if (ctx->use_framebuffer_target != new_use_framebuffer_target)
341 ALOGW("Starting to %s HWC_FRAMEBUFFER_TARGET",
342 new_use_framebuffer_target ? "use" : "not use");
343 ctx->use_framebuffer_target = new_use_framebuffer_target;
344
Sean Paule42febf2015-05-07 11:35:29 -0700345 for (int i = 0; i < (int)num_displays; ++i) {
Sean Paulef8f1f92015-04-29 16:05:23 -0400346 if (!display_contents[i])
347 continue;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500348
Sean Paulb386f1b2015-05-13 06:33:23 -0700349 DrmCrtc *crtc = ctx->drm.GetCrtcForDisplay(i);
350 if (!crtc) {
351 ALOGE("No crtc for display %d", i);
Sean Paulb386f1b2015-05-13 06:33:23 -0700352 return -ENODEV;
353 }
Sean Paulb386f1b2015-05-13 06:33:23 -0700354
Zach Reizner45624d32015-06-10 16:03:01 -0700355 int num_layers = display_contents[i]->numHwLayers;
356 for (int j = 0; j < num_layers; j++) {
Sean Paulb386f1b2015-05-13 06:33:23 -0700357 hwc_layer_1_t *layer = &display_contents[i]->hwLayers[j];
Zach Reizner45624d32015-06-10 16:03:01 -0700358
Zach Reizner1946fa72015-08-14 11:14:38 -0700359 if (!ctx->use_framebuffer_target) {
360 if (layer->compositionType == HWC_FRAMEBUFFER)
361 layer->compositionType = HWC_OVERLAY;
362 } else {
363 switch (layer->compositionType) {
364 case HWC_OVERLAY:
365 case HWC_BACKGROUND:
366 case HWC_SIDEBAND:
367 case HWC_CURSOR_OVERLAY:
368 layer->compositionType = HWC_FRAMEBUFFER;
369 break;
370 }
371 }
Sean Paulef8f1f92015-04-29 16:05:23 -0400372 }
373 }
Sean Pauldffca952015-02-04 10:19:55 -0800374
Sean Paulef8f1f92015-04-29 16:05:23 -0400375 return 0;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500376}
377
Zach Reizner09807052015-08-13 14:53:41 -0700378static void hwc_add_layer_to_retire_fence(
379 hwc_layer_1_t *layer, hwc_display_contents_1_t *display_contents) {
Sean Paul04206122015-07-16 15:59:24 -0400380 if (layer->releaseFenceFd < 0)
381 return;
382
383 if (display_contents->retireFenceFd >= 0) {
384 int old_retire_fence = display_contents->retireFenceFd;
Zach Reiznerc6520e42015-08-13 14:32:09 -0700385 display_contents->retireFenceFd =
386 sync_merge("dc_retire", old_retire_fence, layer->releaseFenceFd);
Sean Paul04206122015-07-16 15:59:24 -0400387 close(old_retire_fence);
388 } else {
389 display_contents->retireFenceFd = dup(layer->releaseFenceFd);
390 }
391}
392
Sean Paule0c4c3d2015-01-20 16:56:04 -0500393static int hwc_set(hwc_composer_device_1_t *dev, size_t num_displays,
Zach Reizner4a253652015-09-10 18:30:54 -0700394 hwc_display_contents_1_t **sf_display_contents) {
Stéphane Marchesinbe98c8c2015-06-23 16:18:10 -0700395 ATRACE_CALL();
Sean Paulef8f1f92015-04-29 16:05:23 -0400396 struct hwc_context_t *ctx = (struct hwc_context_t *)&dev->common;
Zach Reizner4a253652015-09-10 18:30:54 -0700397 int ret = 0;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500398
Zach Reizner4a253652015-09-10 18:30:54 -0700399 std::vector<CheckedOutputFd> checked_output_fences;
400 std::vector<DrmHwcDisplayContents> displays_contents;
Zach Reizner09807052015-08-13 14:53:41 -0700401 std::vector<DrmCompositionDisplayLayersMap> layers_map;
402 std::vector<std::vector<size_t>> layers_indices;
Zach Reizner4a253652015-09-10 18:30:54 -0700403 displays_contents.reserve(num_displays);
404 // layers_map.reserve(num_displays);
Zach Reizner09807052015-08-13 14:53:41 -0700405 layers_indices.reserve(num_displays);
406
Zach Reizner4a253652015-09-10 18:30:54 -0700407 // Phase one does nothing that would cause errors. Only take ownership of FDs.
408 for (size_t i = 0; i < num_displays; ++i) {
409 hwc_display_contents_1_t *dc = sf_display_contents[i];
410 displays_contents.emplace_back();
411 DrmHwcDisplayContents &display_contents = displays_contents.back();
Haixia Shi7acc59b2015-09-30 10:57:54 -0700412 layers_indices.emplace_back();
413 std::vector<size_t> &indices_to_composite = layers_indices.back();
Zach Reizner4a253652015-09-10 18:30:54 -0700414
415 if (!sf_display_contents[i])
Sean Paulb386f1b2015-05-13 06:33:23 -0700416 continue;
Zach Reizner09807052015-08-13 14:53:41 -0700417
Zach Reizner4a253652015-09-10 18:30:54 -0700418 std::ostringstream display_index_formatter;
419 display_index_formatter << "retire fence for display " << i;
420 std::string display_fence_description(display_index_formatter.str());
421 checked_output_fences.emplace_back(&dc->retireFenceFd,
422 display_fence_description.c_str(),
423 ctx->dummy_timeline);
424 display_contents.retire_fence = OutputFd(&dc->retireFenceFd);
Zach Reizner09807052015-08-13 14:53:41 -0700425
Zach Reizner4a253652015-09-10 18:30:54 -0700426 size_t num_dc_layers = dc->numHwLayers;
Haixia Shi1034bb72015-09-09 12:08:20 -0700427 int framebuffer_target_index = -1;
Zach Reizner4a253652015-09-10 18:30:54 -0700428 for (size_t j = 0; j < num_dc_layers; ++j) {
429 hwc_layer_1_t *sf_layer = &dc->hwLayers[j];
430
431 display_contents.layers.emplace_back();
432 DrmHwcLayer &layer = display_contents.layers.back();
433
434 if (sf_layer->flags & HWC_SKIP_LAYER)
Sean Paulb386f1b2015-05-13 06:33:23 -0700435 continue;
Zach Reizner4a253652015-09-10 18:30:54 -0700436
Zach Reizner1946fa72015-08-14 11:14:38 -0700437 if (!ctx->use_framebuffer_target) {
Zach Reizner4a253652015-09-10 18:30:54 -0700438 if (sf_layer->compositionType == HWC_OVERLAY)
Zach Reizner1946fa72015-08-14 11:14:38 -0700439 indices_to_composite.push_back(j);
Zach Reizner4a253652015-09-10 18:30:54 -0700440 if (sf_layer->compositionType == HWC_FRAMEBUFFER_TARGET)
Haixia Shi1034bb72015-09-09 12:08:20 -0700441 framebuffer_target_index = j;
Zach Reizner1946fa72015-08-14 11:14:38 -0700442 } else {
Zach Reizner4a253652015-09-10 18:30:54 -0700443 if (sf_layer->compositionType == HWC_FRAMEBUFFER_TARGET)
Zach Reizner1946fa72015-08-14 11:14:38 -0700444 indices_to_composite.push_back(j);
445 }
Zach Reizner4a253652015-09-10 18:30:54 -0700446
447 layer.acquire_fence.Set(sf_layer->acquireFenceFd);
448 sf_layer->acquireFenceFd = -1;
449
450 std::ostringstream layer_fence_formatter;
451 layer_fence_formatter << "release fence for layer " << j << " of display "
452 << i;
453 std::string layer_fence_description(layer_fence_formatter.str());
454 checked_output_fences.emplace_back(&sf_layer->releaseFenceFd,
455 layer_fence_description.c_str(),
456 ctx->dummy_timeline);
457 layer.release_fence = OutputFd(&sf_layer->releaseFenceFd);
Zach Reizner1946fa72015-08-14 11:14:38 -0700458 }
Zach Reizner4a253652015-09-10 18:30:54 -0700459
Zach Reizner1946fa72015-08-14 11:14:38 -0700460 if (ctx->use_framebuffer_target) {
461 if (indices_to_composite.size() != 1) {
462 ALOGE("Expected 1 (got %d) layer with HWC_FRAMEBUFFER_TARGET",
463 indices_to_composite.size());
Zach Reizner4a253652015-09-10 18:30:54 -0700464 ret = -EINVAL;
Zach Reizner1946fa72015-08-14 11:14:38 -0700465 }
Haixia Shi1034bb72015-09-09 12:08:20 -0700466 } else {
467 if (indices_to_composite.empty() && framebuffer_target_index >= 0) {
Zach Reizner4a253652015-09-10 18:30:54 -0700468 hwc_layer_1_t *sf_layer = &dc->hwLayers[framebuffer_target_index];
469 if (!sf_layer->handle || (sf_layer->flags & HWC_SKIP_LAYER)) {
470 ALOGE(
471 "Expected valid layer with HWC_FRAMEBUFFER_TARGET when all "
472 "HWC_OVERLAY layers are skipped.");
473 ret = -EINVAL;
Haixia Shi1034bb72015-09-09 12:08:20 -0700474 }
475 indices_to_composite.push_back(framebuffer_target_index);
476 }
Zach Reizner45624d32015-06-10 16:03:01 -0700477 }
Zach Reizner4a253652015-09-10 18:30:54 -0700478 }
Zach Reizner45624d32015-06-10 16:03:01 -0700479
Zach Reizner4a253652015-09-10 18:30:54 -0700480 if (ret)
481 return ret;
482
483 for (size_t i = 0; i < num_displays; ++i) {
484 hwc_display_contents_1_t *dc = sf_display_contents[i];
485 DrmHwcDisplayContents &display_contents = displays_contents[i];
486 if (!sf_display_contents[i])
487 continue;
488
489 layers_map.emplace_back();
490 DrmCompositionDisplayLayersMap &map = layers_map.back();
491 std::vector<size_t> &indices_to_composite = layers_indices[i];
492 for (size_t j : indices_to_composite) {
493 hwc_layer_1_t *sf_layer = &dc->hwLayers[j];
494
495 DrmHwcLayer &layer = display_contents.layers[j];
496
497 layer.InitFromHwcLayer(sf_layer, ctx->importer, ctx->gralloc);
498 map.layers.emplace_back(std::move(layer));
499 }
500 }
501
502 std::unique_ptr<DrmComposition> composition(
503 ctx->drm.compositor()->CreateComposition(ctx->importer));
504 if (!composition) {
505 ALOGE("Drm composition init failed");
506 return -EINVAL;
Zach Reizner09807052015-08-13 14:53:41 -0700507 }
Zach Reizner45624d32015-06-10 16:03:01 -0700508
Zach Reizner09807052015-08-13 14:53:41 -0700509 ret = composition->SetLayers(layers_map.size(), layers_map.data());
510 if (ret) {
Zach Reizner09807052015-08-13 14:53:41 -0700511 return -EINVAL;
512 }
Zach Reizner45624d32015-06-10 16:03:01 -0700513
Zach Reizner09807052015-08-13 14:53:41 -0700514 ret = ctx->drm.compositor()->QueueComposition(std::move(composition));
515 if (ret) {
Zach Reizner09807052015-08-13 14:53:41 -0700516 return -EINVAL;
517 }
518
Zach Reizner566da2b2015-10-06 15:39:09 -0700519 for (size_t i = 0; i < num_displays; ++i) {
520 hwc_display_contents_1_t *dc = sf_display_contents[i];
521 if (!dc)
522 continue;
523
524 size_t num_dc_layers = dc->numHwLayers;
525 for (size_t j = 0; j < num_dc_layers; ++j) {
526 hwc_layer_1_t *layer = &dc->hwLayers[j];
527 if (layer->flags & HWC_SKIP_LAYER)
528 continue;
529 hwc_add_layer_to_retire_fence(layer, dc);
530 }
531 }
532
Zach Reizner09807052015-08-13 14:53:41 -0700533 composition.reset(NULL);
534
Sean Paulef8f1f92015-04-29 16:05:23 -0400535 return ret;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500536}
537
Sean Paulef8f1f92015-04-29 16:05:23 -0400538static int hwc_event_control(struct hwc_composer_device_1 *dev, int display,
539 int event, int enabled) {
Sean Paulef8f1f92015-04-29 16:05:23 -0400540 if (event != HWC_EVENT_VSYNC || (enabled != 0 && enabled != 1))
541 return -EINVAL;
Sean Pauleb9e75c2015-01-25 23:31:30 -0500542
Sean Paul4057be32015-05-13 06:23:09 -0700543 struct hwc_context_t *ctx = (struct hwc_context_t *)&dev->common;
544 hwc_drm_display_t *hd = &ctx->displays[display];
545 return hd->vsync_worker.VSyncControl(enabled);
Sean Paule0c4c3d2015-01-20 16:56:04 -0500546}
547
Sean Paulef8f1f92015-04-29 16:05:23 -0400548static int hwc_set_power_mode(struct hwc_composer_device_1 *dev, int display,
549 int mode) {
550 struct hwc_context_t *ctx = (struct hwc_context_t *)&dev->common;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500551
Sean Paul6a55e9f2015-04-30 15:31:06 -0400552 uint64_t dpmsValue = 0;
Sean Paulef8f1f92015-04-29 16:05:23 -0400553 switch (mode) {
554 case HWC_POWER_MODE_OFF:
Sean Paul6a55e9f2015-04-30 15:31:06 -0400555 dpmsValue = DRM_MODE_DPMS_OFF;
Sean Paulef8f1f92015-04-29 16:05:23 -0400556 break;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500557
Sean Paulef8f1f92015-04-29 16:05:23 -0400558 /* We can't support dozing right now, so go full on */
559 case HWC_POWER_MODE_DOZE:
560 case HWC_POWER_MODE_DOZE_SUSPEND:
561 case HWC_POWER_MODE_NORMAL:
Sean Paul6a55e9f2015-04-30 15:31:06 -0400562 dpmsValue = DRM_MODE_DPMS_ON;
Sean Paulef8f1f92015-04-29 16:05:23 -0400563 break;
564 };
Sean Paul6a55e9f2015-04-30 15:31:06 -0400565 return ctx->drm.SetDpmsMode(display, dpmsValue);
Sean Paule0c4c3d2015-01-20 16:56:04 -0500566}
567
Sean Paulef8f1f92015-04-29 16:05:23 -0400568static int hwc_query(struct hwc_composer_device_1 * /* dev */, int what,
569 int *value) {
570 switch (what) {
571 case HWC_BACKGROUND_LAYER_SUPPORTED:
572 *value = 0; /* TODO: We should do this */
573 break;
574 case HWC_VSYNC_PERIOD:
575 ALOGW("Query for deprecated vsync value, returning 60Hz");
576 *value = 1000 * 1000 * 1000 / 60;
577 break;
578 case HWC_DISPLAY_TYPES_SUPPORTED:
579 *value = HWC_DISPLAY_PRIMARY | HWC_DISPLAY_EXTERNAL;
580 break;
581 }
582 return 0;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500583}
584
Sean Paulef8f1f92015-04-29 16:05:23 -0400585static void hwc_register_procs(struct hwc_composer_device_1 *dev,
586 hwc_procs_t const *procs) {
587 struct hwc_context_t *ctx = (struct hwc_context_t *)&dev->common;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500588
Sean Paulef8f1f92015-04-29 16:05:23 -0400589 ctx->procs = procs;
Sean Paul4057be32015-05-13 06:23:09 -0700590
591 for (hwc_context_t::DisplayMapIter iter = ctx->displays.begin();
592 iter != ctx->displays.end(); ++iter) {
593 iter->second.vsync_worker.SetProcs(procs);
594 }
Sean Paule0c4c3d2015-01-20 16:56:04 -0500595}
596
Sean Paulef8f1f92015-04-29 16:05:23 -0400597static int hwc_get_display_configs(struct hwc_composer_device_1 *dev,
598 int display, uint32_t *configs,
Sean Paul6a55e9f2015-04-30 15:31:06 -0400599 size_t *num_configs) {
600 if (!*num_configs)
Sean Paulef8f1f92015-04-29 16:05:23 -0400601 return 0;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500602
Sean Paulef8f1f92015-04-29 16:05:23 -0400603 struct hwc_context_t *ctx = (struct hwc_context_t *)&dev->common;
Sean Paule42febf2015-05-07 11:35:29 -0700604 hwc_drm_display_t *hd = &ctx->displays[display];
Sean Paul6a55e9f2015-04-30 15:31:06 -0400605 hd->config_ids.clear();
606
607 DrmConnector *connector = ctx->drm.GetConnectorForDisplay(display);
608 if (!connector) {
609 ALOGE("Failed to get connector for display %d", display);
Sean Paulef8f1f92015-04-29 16:05:23 -0400610 return -ENODEV;
611 }
Sean Paule0c4c3d2015-01-20 16:56:04 -0500612
Sean Paule42febf2015-05-07 11:35:29 -0700613 int ret = connector->UpdateModes();
Sean Paul6a55e9f2015-04-30 15:31:06 -0400614 if (ret) {
615 ALOGE("Failed to update display modes %d", ret);
Sean Paulef8f1f92015-04-29 16:05:23 -0400616 return ret;
Sean Paulef8f1f92015-04-29 16:05:23 -0400617 }
Sean Paule0c4c3d2015-01-20 16:56:04 -0500618
Sean Paul6a55e9f2015-04-30 15:31:06 -0400619 for (DrmConnector::ModeIter iter = connector->begin_modes();
620 iter != connector->end_modes(); ++iter) {
621 size_t idx = hd->config_ids.size();
622 if (idx == *num_configs)
623 break;
624 hd->config_ids.push_back(iter->id());
625 configs[idx] = iter->id();
626 }
627 *num_configs = hd->config_ids.size();
628 return *num_configs == 0 ? -1 : 0;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500629}
630
Sean Paulef8f1f92015-04-29 16:05:23 -0400631static int hwc_get_display_attributes(struct hwc_composer_device_1 *dev,
632 int display, uint32_t config,
633 const uint32_t *attributes,
634 int32_t *values) {
635 struct hwc_context_t *ctx = (struct hwc_context_t *)&dev->common;
Sean Paul6a55e9f2015-04-30 15:31:06 -0400636 DrmConnector *c = ctx->drm.GetConnectorForDisplay(display);
Sean Paulef8f1f92015-04-29 16:05:23 -0400637 if (!c) {
Sean Paul6a55e9f2015-04-30 15:31:06 -0400638 ALOGE("Failed to get DrmConnector for display %d", display);
Sean Paulef8f1f92015-04-29 16:05:23 -0400639 return -ENODEV;
640 }
Sean Paul6a55e9f2015-04-30 15:31:06 -0400641 DrmMode mode;
642 for (DrmConnector::ModeIter iter = c->begin_modes(); iter != c->end_modes();
643 ++iter) {
644 if (iter->id() == config) {
645 mode = *iter;
646 break;
647 }
648 }
649 if (mode.id() == 0) {
650 ALOGE("Failed to find active mode for display %d", display);
651 return -ENOENT;
Sean Paulef8f1f92015-04-29 16:05:23 -0400652 }
Sean Paule0c4c3d2015-01-20 16:56:04 -0500653
Sean Paul6a55e9f2015-04-30 15:31:06 -0400654 uint32_t mm_width = c->mm_width();
655 uint32_t mm_height = c->mm_height();
Sean Paulef8f1f92015-04-29 16:05:23 -0400656 for (int i = 0; attributes[i] != HWC_DISPLAY_NO_ATTRIBUTE; ++i) {
657 switch (attributes[i]) {
658 case HWC_DISPLAY_VSYNC_PERIOD:
Sean Paul6a55e9f2015-04-30 15:31:06 -0400659 values[i] = 1000 * 1000 * 1000 / mode.v_refresh();
Sean Paulef8f1f92015-04-29 16:05:23 -0400660 break;
661 case HWC_DISPLAY_WIDTH:
Sean Paul6a55e9f2015-04-30 15:31:06 -0400662 values[i] = mode.h_display();
Sean Paulef8f1f92015-04-29 16:05:23 -0400663 break;
664 case HWC_DISPLAY_HEIGHT:
Sean Paul6a55e9f2015-04-30 15:31:06 -0400665 values[i] = mode.v_display();
Sean Paulef8f1f92015-04-29 16:05:23 -0400666 break;
667 case HWC_DISPLAY_DPI_X:
668 /* Dots per 1000 inches */
Sean Paul6a55e9f2015-04-30 15:31:06 -0400669 values[i] = mm_width ? (mode.h_display() * UM_PER_INCH) / mm_width : 0;
Sean Paulef8f1f92015-04-29 16:05:23 -0400670 break;
671 case HWC_DISPLAY_DPI_Y:
672 /* Dots per 1000 inches */
Sean Paul6a55e9f2015-04-30 15:31:06 -0400673 values[i] =
674 mm_height ? (mode.v_display() * UM_PER_INCH) / mm_height : 0;
Sean Paulef8f1f92015-04-29 16:05:23 -0400675 break;
676 }
677 }
Sean Paulef8f1f92015-04-29 16:05:23 -0400678 return 0;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500679}
680
Sean Paulef8f1f92015-04-29 16:05:23 -0400681static int hwc_get_active_config(struct hwc_composer_device_1 *dev,
682 int display) {
683 struct hwc_context_t *ctx = (struct hwc_context_t *)&dev->common;
Sean Paul6a55e9f2015-04-30 15:31:06 -0400684 DrmConnector *c = ctx->drm.GetConnectorForDisplay(display);
685 if (!c) {
686 ALOGE("Failed to get DrmConnector for display %d", display);
Sean Paulef8f1f92015-04-29 16:05:23 -0400687 return -ENODEV;
688 }
Sean Paule0c4c3d2015-01-20 16:56:04 -0500689
Sean Paul6a55e9f2015-04-30 15:31:06 -0400690 DrmMode mode = c->active_mode();
Sean Paule42febf2015-05-07 11:35:29 -0700691 hwc_drm_display_t *hd = &ctx->displays[display];
Sean Paul6a55e9f2015-04-30 15:31:06 -0400692 for (size_t i = 0; i < hd->config_ids.size(); ++i) {
693 if (hd->config_ids[i] == mode.id())
694 return i;
Sean Paulef8f1f92015-04-29 16:05:23 -0400695 }
Sean Paul6a55e9f2015-04-30 15:31:06 -0400696 return -1;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500697}
698
Sean Paulef8f1f92015-04-29 16:05:23 -0400699static int hwc_set_active_config(struct hwc_composer_device_1 *dev, int display,
700 int index) {
701 struct hwc_context_t *ctx = (struct hwc_context_t *)&dev->common;
Sean Paule42febf2015-05-07 11:35:29 -0700702 hwc_drm_display_t *hd = &ctx->displays[display];
Sean Paul6a55e9f2015-04-30 15:31:06 -0400703 if (index >= (int)hd->config_ids.size()) {
704 ALOGE("Invalid config index %d passed in", index);
705 return -EINVAL;
Sean Paulef8f1f92015-04-29 16:05:23 -0400706 }
Sean Paule0c4c3d2015-01-20 16:56:04 -0500707
Sean Paul877be972015-06-03 14:08:27 -0400708 DrmConnector *c = ctx->drm.GetConnectorForDisplay(display);
709 if (!c) {
710 ALOGE("Failed to get connector for display %d", display);
711 return -ENODEV;
712 }
713 DrmMode mode;
714 for (DrmConnector::ModeIter iter = c->begin_modes(); iter != c->end_modes();
715 ++iter) {
716 if (iter->id() == hd->config_ids[index]) {
717 mode = *iter;
718 break;
719 }
720 }
721 if (mode.id() != hd->config_ids[index]) {
722 ALOGE("Could not find active mode for %d/%d", index, hd->config_ids[index]);
723 return -ENOENT;
724 }
725 int ret = ctx->drm.SetDisplayActiveMode(display, mode);
Sean Paul6a55e9f2015-04-30 15:31:06 -0400726 if (ret) {
Sean Paul877be972015-06-03 14:08:27 -0400727 ALOGE("Failed to set active config %d", ret);
Sean Paul6a55e9f2015-04-30 15:31:06 -0400728 return ret;
Sean Paulef8f1f92015-04-29 16:05:23 -0400729 }
Sean Paul6a55e9f2015-04-30 15:31:06 -0400730 return ret;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500731}
732
Sean Paulef8f1f92015-04-29 16:05:23 -0400733static int hwc_device_close(struct hw_device_t *dev) {
734 struct hwc_context_t *ctx = (struct hwc_context_t *)dev;
Sean Paulef8f1f92015-04-29 16:05:23 -0400735 delete ctx;
Sean Paulef8f1f92015-04-29 16:05:23 -0400736 return 0;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500737}
738
Sean Paul24a26e32015-02-04 10:34:47 -0800739/*
740 * TODO: This function sets the active config to the first one in the list. This
741 * should be fixed such that it selects the preferred mode for the display, or
742 * some other, saner, method of choosing the config.
743 */
Sean Paule42febf2015-05-07 11:35:29 -0700744static int hwc_set_initial_config(hwc_drm_display_t *hd) {
Sean Paulef8f1f92015-04-29 16:05:23 -0400745 uint32_t config;
746 size_t num_configs = 1;
747 int ret = hwc_get_display_configs(&hd->ctx->device, hd->display, &config,
748 &num_configs);
749 if (ret || !num_configs)
750 return 0;
Sean Paul24a26e32015-02-04 10:34:47 -0800751
Sean Paulef8f1f92015-04-29 16:05:23 -0400752 ret = hwc_set_active_config(&hd->ctx->device, hd->display, 0);
753 if (ret) {
754 ALOGE("Failed to set active config d=%d ret=%d", hd->display, ret);
755 return ret;
756 }
Sean Paul24a26e32015-02-04 10:34:47 -0800757
Sean Paulef8f1f92015-04-29 16:05:23 -0400758 return ret;
Sean Paul24a26e32015-02-04 10:34:47 -0800759}
760
Sean Paul6a55e9f2015-04-30 15:31:06 -0400761static int hwc_initialize_display(struct hwc_context_t *ctx, int display) {
Sean Paule42febf2015-05-07 11:35:29 -0700762 hwc_drm_display_t *hd = &ctx->displays[display];
Sean Paulef8f1f92015-04-29 16:05:23 -0400763 hd->ctx = ctx;
764 hd->display = display;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500765
Sean Paulb386f1b2015-05-13 06:33:23 -0700766 int ret = hwc_set_initial_config(hd);
Sean Paulef8f1f92015-04-29 16:05:23 -0400767 if (ret) {
768 ALOGE("Failed to set initial config for d=%d ret=%d", display, ret);
Sean Paulef8f1f92015-04-29 16:05:23 -0400769 return ret;
770 }
Sean Paul24a26e32015-02-04 10:34:47 -0800771
Sean Paul4057be32015-05-13 06:23:09 -0700772 ret = hd->vsync_worker.Init(&ctx->drm, display);
773 if (ret) {
774 ALOGE("Failed to create event worker for display %d %d\n", display, ret);
775 return ret;
776 }
777
Sean Paulef8f1f92015-04-29 16:05:23 -0400778 return 0;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500779}
780
Sean Paulef8f1f92015-04-29 16:05:23 -0400781static int hwc_enumerate_displays(struct hwc_context_t *ctx) {
Sean Paul6a55e9f2015-04-30 15:31:06 -0400782 int ret;
783 for (DrmResources::ConnectorIter c = ctx->drm.begin_connectors();
784 c != ctx->drm.end_connectors(); ++c) {
785 ret = hwc_initialize_display(ctx, (*c)->display());
786 if (ret) {
787 ALOGE("Failed to initialize display %d", (*c)->display());
788 return ret;
Sean Paulef8f1f92015-04-29 16:05:23 -0400789 }
790 }
Sean Paulef8f1f92015-04-29 16:05:23 -0400791
792 return 0;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500793}
794
Sean Paulef8f1f92015-04-29 16:05:23 -0400795static int hwc_device_open(const struct hw_module_t *module, const char *name,
796 struct hw_device_t **dev) {
797 if (strcmp(name, HWC_HARDWARE_COMPOSER)) {
798 ALOGE("Invalid module name- %s", name);
799 return -EINVAL;
800 }
801
802 struct hwc_context_t *ctx = new hwc_context_t();
803 if (!ctx) {
804 ALOGE("Failed to allocate hwc context");
805 return -ENOMEM;
806 }
807
Sean Paul6a55e9f2015-04-30 15:31:06 -0400808 int ret = ctx->drm.Init();
809 if (ret) {
810 ALOGE("Can't initialize Drm object %d", ret);
811 delete ctx;
812 return ret;
813 }
814
Zach Reizner4a253652015-09-10 18:30:54 -0700815 ret = hw_get_module(GRALLOC_HARDWARE_MODULE_ID,
816 (const hw_module_t **)&ctx->gralloc);
817 if (ret) {
818 ALOGE("Failed to open gralloc module %d", ret);
819 delete ctx;
820 return ret;
821 }
822
823 ret = ctx->dummy_timeline.Init();
824 if (ret) {
825 ALOGE("Failed to create dummy sw sync timeline %d", ret);
826 return ret;
827 }
828
Sean Paulda6270d2015-06-01 14:11:52 -0400829 ctx->importer = Importer::CreateInstance(&ctx->drm);
830 if (!ctx->importer) {
831 ALOGE("Failed to create importer instance");
Sean Paulef8f1f92015-04-29 16:05:23 -0400832 delete ctx;
833 return ret;
834 }
835
Sean Paulef8f1f92015-04-29 16:05:23 -0400836 ret = hwc_enumerate_displays(ctx);
837 if (ret) {
838 ALOGE("Failed to enumerate displays: %s", strerror(ret));
Sean Paul6a55e9f2015-04-30 15:31:06 -0400839 delete ctx;
840 return ret;
841 }
842
Sean Paulef8f1f92015-04-29 16:05:23 -0400843 ctx->device.common.tag = HARDWARE_DEVICE_TAG;
844 ctx->device.common.version = HWC_DEVICE_API_VERSION_1_4;
845 ctx->device.common.module = const_cast<hw_module_t *>(module);
846 ctx->device.common.close = hwc_device_close;
847
Sean Paul9046c642015-06-10 17:27:47 -0400848 ctx->device.dump = hwc_dump;
Sean Paulef8f1f92015-04-29 16:05:23 -0400849 ctx->device.prepare = hwc_prepare;
850 ctx->device.set = hwc_set;
851 ctx->device.eventControl = hwc_event_control;
852 ctx->device.setPowerMode = hwc_set_power_mode;
853 ctx->device.query = hwc_query;
854 ctx->device.registerProcs = hwc_register_procs;
855 ctx->device.getDisplayConfigs = hwc_get_display_configs;
856 ctx->device.getDisplayAttributes = hwc_get_display_attributes;
857 ctx->device.getActiveConfig = hwc_get_active_config;
858 ctx->device.setActiveConfig = hwc_set_active_config;
859 ctx->device.setCursorPositionAsync = NULL; /* TODO: Add cursor */
860
861 *dev = &ctx->device.common;
862
863 return 0;
864}
Sean Paul6a55e9f2015-04-30 15:31:06 -0400865}
Sean Paulef8f1f92015-04-29 16:05:23 -0400866
Sean Paul6a55e9f2015-04-30 15:31:06 -0400867static struct hw_module_methods_t hwc_module_methods = {
868 open : android::hwc_device_open
869};
Sean Paule0c4c3d2015-01-20 16:56:04 -0500870
871hwc_module_t HAL_MODULE_INFO_SYM = {
Sean Paulef8f1f92015-04-29 16:05:23 -0400872 common : {
873 tag : HARDWARE_MODULE_TAG,
874 version_major : 1,
875 version_minor : 0,
876 id : HWC_HARDWARE_MODULE_ID,
877 name : "DRM hwcomposer module",
878 author : "The Android Open Source Project",
879 methods : &hwc_module_methods,
880 dso : NULL,
881 reserved : {0},
882 }
Sean Paule0c4c3d2015-01-20 16:56:04 -0500883};