blob: 214b40d9c6021432a6ba619ba5230f94e1cbafd1 [file] [log] [blame]
Sean Paule0c4c3d2015-01-20 16:56:04 -05001/*
2 * Copyright (C) 2015 The Android Open Source Project
3 *
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
7 *
8 * http://www.apache.org/licenses/LICENSE-2.0
9 *
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
15 */
16
17#define LOG_TAG "hwcomposer-drm"
18
19#include <fcntl.h>
20#include <errno.h>
21#include <sys/param.h>
Sean Paul9aa5ad32015-01-22 15:47:54 -050022#include <sys/resource.h>
23#include <pthread.h>
Sean Paul9b1bb842015-01-23 01:11:58 -050024#include <queue>
Sean Paule0c4c3d2015-01-20 16:56:04 -050025
26#include <cutils/log.h>
27
28#include <xf86drm.h>
29#include <xf86drmMode.h>
Sean Paule0c4c3d2015-01-20 16:56:04 -050030
31#include <hardware/hardware.h>
32#include <hardware/hwcomposer.h>
33
Sean Paul9aa5ad32015-01-22 15:47:54 -050034#include <sync/sync.h>
Sean Paulf1dc1912015-01-24 01:34:31 -050035#include <sw_sync.h>
Sean Paul9aa5ad32015-01-22 15:47:54 -050036
Sean Paulcd36a9e2015-01-22 18:01:18 -050037#include "drm_hwcomposer.h"
Sean Paule0c4c3d2015-01-20 16:56:04 -050038
39#define ARRAY_SIZE(arr) (int)(sizeof(arr) / sizeof((arr)[0]))
40
41#define HWCOMPOSER_DRM_DEVICE "/dev/dri/card0"
42#define MAX_NUM_DISPLAYS 3
43#define UM_PER_INCH 25400
44
45static const uint32_t panel_types[] = {
46 DRM_MODE_CONNECTOR_LVDS,
47 DRM_MODE_CONNECTOR_eDP,
48 DRM_MODE_CONNECTOR_DSI,
49};
50
Sean Paul9aa5ad32015-01-22 15:47:54 -050051struct hwc_worker {
52 pthread_t thread;
53 pthread_mutex_t lock;
54 pthread_cond_t cond;
55 bool exit;
56};
57
Sean Paule0c4c3d2015-01-20 16:56:04 -050058struct hwc_drm_display {
Sean Paul9aa5ad32015-01-22 15:47:54 -050059 struct hwc_context_t *ctx;
60 int display;
61
Sean Paule0c4c3d2015-01-20 16:56:04 -050062 uint32_t connector_id;
63
64 drmModeModeInfoPtr configs;
65 uint32_t num_configs;
66
Sean Paulfa406a12015-02-04 10:05:44 -080067 drmModeModeInfo active_mode;
Sean Paule0c4c3d2015-01-20 16:56:04 -050068 uint32_t active_crtc;
Sean Pauleb9e75c2015-01-25 23:31:30 -050069 int active_pipe;
Sean Paulefb20cb2015-02-04 09:29:15 -080070 bool initial_modeset_required;
Sean Paul9aa5ad32015-01-22 15:47:54 -050071
72 struct hwc_worker set_worker;
73
Sean Paul9b1bb842015-01-23 01:11:58 -050074 std::queue<struct hwc_drm_bo> buf_queue;
Sean Paul9aa5ad32015-01-22 15:47:54 -050075 struct hwc_drm_bo front;
Sean Paulf1dc1912015-01-24 01:34:31 -050076
77 int timeline_fd;
78 unsigned timeline_next;
Sean Pauleb9e75c2015-01-25 23:31:30 -050079
80 struct hwc_worker vsync_worker;
81 bool enable_vsync_events;
Sean Paule0c4c3d2015-01-20 16:56:04 -050082};
83
84struct hwc_context_t {
85 hwc_composer_device_1_t device;
86
87 int fd;
Sean Paule0c4c3d2015-01-20 16:56:04 -050088
89 hwc_procs_t const *procs;
Sean Paulcd36a9e2015-01-22 18:01:18 -050090 struct hwc_import_context *import_ctx;
Sean Paule0c4c3d2015-01-20 16:56:04 -050091
92 struct hwc_drm_display displays[MAX_NUM_DISPLAYS];
93 int num_displays;
94};
95
96static int hwc_get_drm_display(struct hwc_context_t *ctx, int display,
97 struct hwc_drm_display **hd)
98{
99 if (display >= MAX_NUM_DISPLAYS) {
100 ALOGE("Requested display is out-of-bounds %d %d", display,
101 MAX_NUM_DISPLAYS);
102 return -EINVAL;
103 }
104 *hd = &ctx->displays[display];
105 return 0;
106}
107
108static int hwc_prepare_layer(hwc_layer_1_t *layer)
109{
110 /* TODO: We can't handle background right now, defer to sufaceFlinger */
111 if (layer->compositionType == HWC_BACKGROUND) {
112 layer->compositionType = HWC_FRAMEBUFFER;
113 ALOGV("Can't handle background layers yet");
114
115 /* TODO: Support sideband compositions */
116 } else if (layer->compositionType == HWC_SIDEBAND) {
117 layer->compositionType = HWC_FRAMEBUFFER;
118 ALOGV("Can't handle sideband content yet");
119 }
120
121 layer->hints = 0;
122
123 /* TODO: Handle cursor by setting compositionType=HWC_CURSOR_OVERLAY */
124 if (layer->flags & HWC_IS_CURSOR_LAYER) {
125 ALOGV("Can't handle async cursors yet");
126 }
127
128 /* TODO: Handle transformations */
129 if (layer->transform) {
130 ALOGV("Can't handle transformations yet");
131 }
132
133 /* TODO: Handle blending & plane alpha*/
134 if (layer->blending == HWC_BLENDING_PREMULT ||
135 layer->blending == HWC_BLENDING_COVERAGE) {
136 ALOGV("Can't handle blending yet");
137 }
138
139 /* TODO: Handle cropping & scaling */
140
141 return 0;
142}
143
144static int hwc_prepare(hwc_composer_device_1_t */* dev */, size_t num_displays,
145 hwc_display_contents_1_t** display_contents)
146{
147 int ret = 0, i, j;
148
149 /* TODO: Check flags for HWC_GEOMETRY_CHANGED */
150
151 for (i = 0; i < (int)num_displays && i < MAX_NUM_DISPLAYS; i++) {
Sean Pauldffca952015-02-04 10:19:55 -0800152
153 if (!display_contents[i])
154 continue;
155
Sean Paule0c4c3d2015-01-20 16:56:04 -0500156 for (j = 0; j < (int)display_contents[i]->numHwLayers; j++) {
157 ret = hwc_prepare_layer(
158 &display_contents[i]->hwLayers[j]);
159 if (ret) {
160 ALOGE("Failed to prepare layer %d:%d", j, i);
161 return ret;
162 }
163 }
164 }
165
166 return ret;
167}
168
Sean Paulcd36a9e2015-01-22 18:01:18 -0500169/*
170 * TODO: This hack allows us to use the importer's fd to drm to add and remove
171 * framebuffers. The reason it exists is because gralloc doesn't export its
172 * bo's, so we have to use its file descriptor to drm for some operations. Once
173 * gralloc behaves, we can remove this.
174 */
175static int hwc_get_fd_for_bo(struct hwc_context_t *ctx, struct hwc_drm_bo *bo)
176{
177 if (bo->importer_fd >= 0)
178 return bo->importer_fd;
179
180 return ctx->fd;
181}
182
Sean Paule0c4c3d2015-01-20 16:56:04 -0500183static bool hwc_mode_is_equal(drmModeModeInfoPtr a, drmModeModeInfoPtr b)
184{
185 return a->clock == b->clock &&
186 a->hdisplay == b->hdisplay &&
187 a->hsync_start == b->hsync_start &&
188 a->hsync_end == b->hsync_end &&
189 a->htotal == b->htotal &&
190 a->hskew == b->hskew &&
191 a->vdisplay == b->vdisplay &&
192 a->vsync_start == b->vsync_start &&
193 a->vsync_end == b->vsync_end &&
194 a->vtotal == b->vtotal &&
195 a->vscan == b->vscan &&
196 a->vrefresh == b->vrefresh &&
197 a->flags == b->flags &&
198 a->type == b->type &&
199 !strcmp(a->name, b->name);
200}
201
Sean Paul9aa5ad32015-01-22 15:47:54 -0500202static int hwc_modeset_required(struct hwc_drm_display *hd,
203 bool *modeset_required)
204{
205 drmModeCrtcPtr crtc;
206 drmModeModeInfoPtr m;
207
Sean Paulefb20cb2015-02-04 09:29:15 -0800208 if (hd->initial_modeset_required) {
209 *modeset_required = true;
210 hd->initial_modeset_required = false;
211 return 0;
212 }
213
Sean Paul9aa5ad32015-01-22 15:47:54 -0500214 crtc = drmModeGetCrtc(hd->ctx->fd, hd->active_crtc);
215 if (!crtc) {
216 ALOGE("Failed to get crtc for display %d", hd->display);
217 return -ENODEV;
218 }
219
Sean Paulfa406a12015-02-04 10:05:44 -0800220 m = &hd->active_mode;
Sean Paul9aa5ad32015-01-22 15:47:54 -0500221
222 /* Do a modeset if we haven't done one, or the mode has changed */
223 if (!crtc->mode_valid || !hwc_mode_is_equal(m, &crtc->mode))
224 *modeset_required = true;
225 else
226 *modeset_required = false;
227
228 drmModeFreeCrtc(crtc);
229
230 return 0;
231}
232
233static void hwc_flip_handler(int /* fd */, unsigned int /* sequence */,
234 unsigned int /* tv_sec */, unsigned int /* tv_usec */,
235 void */* user_data */)
236{
237}
238
Sean Paul9b1bb842015-01-23 01:11:58 -0500239static int hwc_flip(struct hwc_drm_display *hd, struct hwc_drm_bo *buf)
Sean Paul9aa5ad32015-01-22 15:47:54 -0500240{
241 fd_set fds;
242 drmEventContext event_context;
243 int ret;
244 bool modeset_required;
245
246 ret = hwc_modeset_required(hd, &modeset_required);
247 if (ret) {
248 ALOGE("Failed to determine if modeset is required %d", ret);
249 return ret;
250 }
251 if (modeset_required) {
Sean Paul9b1bb842015-01-23 01:11:58 -0500252 ret = drmModeSetCrtc(hd->ctx->fd, hd->active_crtc, buf->fb_id,
253 0, 0, &hd->connector_id, 1,
Sean Paulfa406a12015-02-04 10:05:44 -0800254 &hd->active_mode);
Sean Paul9aa5ad32015-01-22 15:47:54 -0500255 if (ret) {
256 ALOGE("Modeset failed for crtc %d",
257 hd->active_crtc);
258 return ret;
259 }
260 return 0;
261 }
262
263 FD_ZERO(&fds);
264 FD_SET(hd->ctx->fd, &fds);
265
266 event_context.version = DRM_EVENT_CONTEXT_VERSION;
267 event_context.page_flip_handler = hwc_flip_handler;
268
Sean Paul9b1bb842015-01-23 01:11:58 -0500269 ret = drmModePageFlip(hd->ctx->fd, hd->active_crtc, buf->fb_id,
Sean Paul9aa5ad32015-01-22 15:47:54 -0500270 DRM_MODE_PAGE_FLIP_EVENT, hd);
271 if (ret) {
272 ALOGE("Failed to flip buffer for crtc %d",
273 hd->active_crtc);
274 return ret;
275 }
276
277 do {
278 ret = select(hd->ctx->fd + 1, &fds, NULL, NULL, NULL);
279 } while (ret == -1 && errno == EINTR);
280
281 if (ret != 1) {
282 ALOGE("Failed waiting for flip to complete\n");
283 return -EINVAL;
284 }
285 drmHandleEvent(hd->ctx->fd, &event_context);
286
287 return 0;
288}
289
Sean Paul3bc48e82015-01-23 01:41:13 -0500290static int hwc_wait_and_set(struct hwc_drm_display *hd,
291 struct hwc_drm_bo *buf)
Sean Paul9aa5ad32015-01-22 15:47:54 -0500292{
293 int ret;
294
Sean Paul3bc48e82015-01-23 01:41:13 -0500295 ret = drmModeAddFB2(hwc_get_fd_for_bo(hd->ctx, buf), buf->width,
296 buf->height, buf->format, buf->gem_handles, buf->pitches,
297 buf->offsets, &buf->fb_id, 0);
Sean Paul9aa5ad32015-01-22 15:47:54 -0500298 if (ret) {
299 ALOGE("could not create drm fb %d", ret);
300 return ret;
301 }
302
Sean Paul3bc48e82015-01-23 01:41:13 -0500303 if (buf->acquire_fence_fd >= 0) {
304 ret = sync_wait(buf->acquire_fence_fd, -1);
Sean Paul9aa5ad32015-01-22 15:47:54 -0500305 if (ret) {
306 ALOGE("Failed to wait for acquire %d", ret);
307 return ret;
308 }
309 }
310
Sean Paul3bc48e82015-01-23 01:41:13 -0500311 ret = hwc_flip(hd, buf);
Sean Paul9aa5ad32015-01-22 15:47:54 -0500312 if (ret) {
313 ALOGE("Failed to perform flip\n");
314 return ret;
315 }
316
317 if (hd->front.fb_id) {
Sean Paulcd36a9e2015-01-22 18:01:18 -0500318 ret = drmModeRmFB(hwc_get_fd_for_bo(hd->ctx, &hd->front),
319 hd->front.fb_id);
Sean Paul9aa5ad32015-01-22 15:47:54 -0500320 if (ret) {
321 ALOGE("Failed to rm fb from front %d", ret);
322 return ret;
323 }
324 }
Sean Paul3bc48e82015-01-23 01:41:13 -0500325 hd->front = *buf;
326
Sean Paul9aa5ad32015-01-22 15:47:54 -0500327 return ret;
328}
329
330static void *hwc_set_worker(void *arg)
331{
332 struct hwc_drm_display *hd = (struct hwc_drm_display *)arg;
333 int ret;
334
335 setpriority(PRIO_PROCESS, 0, HAL_PRIORITY_URGENT_DISPLAY);
336
Sean Paul9aa5ad32015-01-22 15:47:54 -0500337 do {
Sean Paul3bc48e82015-01-23 01:41:13 -0500338 struct hwc_drm_bo buf;
339
340 ret = pthread_mutex_lock(&hd->set_worker.lock);
Sean Paul9aa5ad32015-01-22 15:47:54 -0500341 if (ret) {
Sean Paul3bc48e82015-01-23 01:41:13 -0500342 ALOGE("Failed to lock set lock %d", ret);
343 return NULL;
Sean Paul9aa5ad32015-01-22 15:47:54 -0500344 }
345
Sean Paul3bc48e82015-01-23 01:41:13 -0500346 if (hd->set_worker.exit)
347 goto out;
348
349 if (hd->buf_queue.empty()) {
350 ret = pthread_cond_wait(&hd->set_worker.cond,
351 &hd->set_worker.lock);
352 if (ret) {
353 ALOGE("Failed to wait on condition %d", ret);
354 goto out;
355 }
356 }
357
358 buf = hd->buf_queue.front();
359 hd->buf_queue.pop();
360
361 ret = pthread_mutex_unlock(&hd->set_worker.lock);
362 if (ret) {
363 ALOGE("Failed to unlock set lock %d", ret);
364 return NULL;
365 }
366
367 ret = hwc_wait_and_set(hd, &buf);
Sean Paul9aa5ad32015-01-22 15:47:54 -0500368 if (ret)
369 ALOGE("Failed to wait and set %d", ret);
Sean Paulf1dc1912015-01-24 01:34:31 -0500370
371 ret = sw_sync_timeline_inc(hd->timeline_fd, 1);
372 if (ret)
373 ALOGE("Failed to increment sync timeline %d", ret);
Sean Paul9aa5ad32015-01-22 15:47:54 -0500374 } while (true);
375
Sean Paul3bc48e82015-01-23 01:41:13 -0500376out:
Sean Paul9aa5ad32015-01-22 15:47:54 -0500377 ret = pthread_mutex_unlock(&hd->set_worker.lock);
Sean Paul3bc48e82015-01-23 01:41:13 -0500378 if (ret)
379 ALOGE("Failed to unlock set lock while exiting %d", ret);
Sean Paul9aa5ad32015-01-22 15:47:54 -0500380
381 return NULL;
382}
383
Sean Paule0c4c3d2015-01-20 16:56:04 -0500384static int hwc_set_display(hwc_context_t *ctx, int display,
385 hwc_display_contents_1_t* display_contents)
386{
387 struct hwc_drm_display *hd = NULL;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500388 hwc_layer_1_t *layer = NULL;
Sean Paul9b1bb842015-01-23 01:11:58 -0500389 struct hwc_drm_bo buf;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500390 int ret, i;
Sean Paul9aa5ad32015-01-22 15:47:54 -0500391 uint32_t fb_id;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500392
Sean Paul9b1bb842015-01-23 01:11:58 -0500393 memset(&buf, 0, sizeof(buf));
394
Sean Paule0c4c3d2015-01-20 16:56:04 -0500395 ret = hwc_get_drm_display(ctx, display, &hd);
396 if (ret)
397 return ret;
398
399 if (!hd->active_crtc) {
400 ALOGE("There is no active crtc for display %d", display);
401 return -ENOENT;
402 }
403
404 /*
405 * TODO: We can only support one hw layer atm, so choose either the
406 * first one or the framebuffer target.
407 */
408 if (!display_contents->numHwLayers) {
409 return 0;
410 } else if (display_contents->numHwLayers == 1) {
411 layer = &display_contents->hwLayers[0];
412 } else {
413 for (i = 0; i < (int)display_contents->numHwLayers; i++) {
414 layer = &display_contents->hwLayers[i];
415 if (layer->compositionType == HWC_FRAMEBUFFER_TARGET)
416 break;
417 }
418 if (i == (int)display_contents->numHwLayers) {
419 ALOGE("Could not find a suitable layer for display %d",
420 display);
421 }
422 }
423
Sean Paul3bc48e82015-01-23 01:41:13 -0500424 ret = hwc_create_bo_from_import(ctx->fd, ctx->import_ctx, layer->handle,
425 &buf);
426 if (ret) {
427 ALOGE("Failed to import handle to drm bo %d", ret);
428 return ret;
429 }
430 buf.acquire_fence_fd = layer->acquireFenceFd;
Sean Paul3bc48e82015-01-23 01:41:13 -0500431
Sean Paul9aa5ad32015-01-22 15:47:54 -0500432 ret = pthread_mutex_lock(&hd->set_worker.lock);
Sean Paule0c4c3d2015-01-20 16:56:04 -0500433 if (ret) {
Sean Paul9aa5ad32015-01-22 15:47:54 -0500434 ALOGE("Failed to lock set lock in set() %d", ret);
435 return ret;
436 }
Sean Paulf1dc1912015-01-24 01:34:31 -0500437
438 /*
439 * TODO: Retire and release can use the same sync point here b/c hwc is
440 * restricted to one layer. Once that is no longer true, this will need
441 * to change
442 */
443 hd->timeline_next++;
444 display_contents->retireFenceFd = sw_sync_fence_create(hd->timeline_fd,
445 "drm_hwc_retire", hd->timeline_next);
446 layer->releaseFenceFd = sw_sync_fence_create(hd->timeline_fd,
447 "drm_hwc_release", hd->timeline_next);
Sean Paul9b1bb842015-01-23 01:11:58 -0500448 hd->buf_queue.push(buf);
449
Sean Paul9aa5ad32015-01-22 15:47:54 -0500450 ret = pthread_cond_signal(&hd->set_worker.cond);
451 if (ret) {
452 ALOGE("Failed to signal set worker %d", ret);
453 goto out;
454 }
455
456 ret = pthread_mutex_unlock(&hd->set_worker.lock);
457 if (ret) {
458 ALOGE("Failed to unlock set lock in set() %d", ret);
459 return ret;
460 }
461
462 return ret;
463
Sean Paule0c4c3d2015-01-20 16:56:04 -0500464out:
Sean Paul9aa5ad32015-01-22 15:47:54 -0500465 if (pthread_mutex_unlock(&hd->set_worker.lock))
466 ALOGE("Failed to unlock set lock in set error handler");
467
Sean Paule0c4c3d2015-01-20 16:56:04 -0500468 return ret;
469}
470
471static int hwc_set(hwc_composer_device_1_t *dev, size_t num_displays,
472 hwc_display_contents_1_t** display_contents)
473{
474 struct hwc_context_t *ctx = (struct hwc_context_t *)&dev->common;
475 int ret = 0, i;
476
Sean Paule0c4c3d2015-01-20 16:56:04 -0500477 for (i = 0; i < (int)num_displays && i < MAX_NUM_DISPLAYS; i++) {
Sean Pauldffca952015-02-04 10:19:55 -0800478 if (display_contents[i])
479 ret = hwc_set_display(ctx, i, display_contents[i]);
Sean Paule0c4c3d2015-01-20 16:56:04 -0500480 }
481
482 return ret;
483}
484
Sean Pauleb9e75c2015-01-25 23:31:30 -0500485static int hwc_wait_for_vsync(struct hwc_drm_display *hd)
Sean Paule0c4c3d2015-01-20 16:56:04 -0500486{
Sean Pauleb9e75c2015-01-25 23:31:30 -0500487 drmVBlank vblank;
488 int ret;
489 uint32_t high_crtc;
490 int64_t timestamp;
491
492 if (hd->active_pipe == -1)
493 return -EINVAL;
494
495 memset(&vblank, 0, sizeof(vblank));
496
497 high_crtc = (hd->active_pipe << DRM_VBLANK_HIGH_CRTC_SHIFT);
498 vblank.request.type = (drmVBlankSeqType)(DRM_VBLANK_RELATIVE |
499 (high_crtc & DRM_VBLANK_HIGH_CRTC_MASK));
500 vblank.request.sequence = 1;
501
502 ret = drmWaitVBlank(hd->ctx->fd, &vblank);
503 if (ret) {
504 ALOGE("Failed to wait for vblank %d", ret);
505 return ret;
506 }
507
508 if (hd->ctx->procs->vsync) {
509 timestamp = vblank.reply.tval_sec * 1000 * 1000 * 1000 +
510 vblank.reply.tval_usec * 1000;
511 hd->ctx->procs->vsync(hd->ctx->procs, hd->display, timestamp);
512 }
513
514 return 0;
515}
516
517static void *hwc_vsync_worker(void *arg)
518{
519 struct hwc_drm_display *hd = (struct hwc_drm_display *)arg;
520 struct hwc_worker *w = &hd->vsync_worker;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500521 int ret;
522
Sean Pauleb9e75c2015-01-25 23:31:30 -0500523 setpriority(PRIO_PROCESS, 0, HAL_PRIORITY_URGENT_DISPLAY);
524
525 do {
526 ret = pthread_mutex_lock(&w->lock);
527 if (ret) {
528 ALOGE("Failed to lock vsync lock %d", ret);
529 return NULL;
530 }
531
532 if (hd->active_pipe == -1) {
533 ALOGE("Pipe is no longer active, disable events");
534 hd->enable_vsync_events = false;
535 }
536
537 if (!hd->enable_vsync_events) {
538 ret = pthread_cond_wait(&w->cond, &w->lock);
539 if (ret) {
540 ALOGE("Failed to wait on vsync cond %d", ret);
541 break;
542 }
543 }
544
545 if (w->exit)
546 break;
547
548 ret = pthread_mutex_unlock(&w->lock);
549 if (ret) {
550 ALOGE("Failed to unlock vsync lock %d", ret);
551 return NULL;
552 }
553
554 if (!hd->enable_vsync_events)
555 continue;
556
557 ret = hwc_wait_for_vsync(hd);
558 if (ret)
559 ALOGE("Failed to wait for vsync %d", ret);
560
561 } while (true);
562
563out:
564 ret = pthread_mutex_unlock(&hd->set_worker.lock);
565 if (ret)
566 ALOGE("Failed to unlock set lock while exiting %d", ret);
567
568 return NULL;
569}
570
571static int hwc_event_control(struct hwc_composer_device_1* dev, int display,
572 int event, int enabled)
573{
574 struct hwc_context_t *ctx = (struct hwc_context_t *)&dev->common;
575 struct hwc_drm_display *hd = NULL;
576 int ret;
577
578 ret = hwc_get_drm_display(ctx, display, &hd);
579 if (ret)
580 return ret;
581
582 if (event != HWC_EVENT_VSYNC || (enabled != 0 && enabled != 1))
583 return -EINVAL;
584
585 if (hd->active_pipe == -1) {
586 ALOGD("Can't service events for display %d, no pipe", display);
587 return -EINVAL;
588 }
589
590 ret = pthread_mutex_lock(&hd->vsync_worker.lock);
591 if (ret) {
592 ALOGE("Failed to lock vsync lock %d", ret);
593 return ret;
594 }
595
596 hd->enable_vsync_events = !!enabled;
597
598 ret = pthread_cond_signal(&hd->vsync_worker.cond);
599 if (ret) {
600 ALOGE("Failed to signal vsync thread %d", ret);
601 goto out;
602 }
603
604 ret = pthread_mutex_unlock(&hd->vsync_worker.lock);
605 if (ret) {
606 ALOGE("Failed to unlock vsync lock %d", ret);
607 return ret;
608 }
609
Sean Paule0c4c3d2015-01-20 16:56:04 -0500610 return 0;
Sean Pauleb9e75c2015-01-25 23:31:30 -0500611
612out:
613 if (pthread_mutex_unlock(&hd->vsync_worker.lock))
614 ALOGE("Failed to unlock vsync worker in error path");
615
616 return ret;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500617}
618
619static int hwc_set_power_mode(struct hwc_composer_device_1* dev, int display,
620 int mode)
621{
622 struct hwc_context_t *ctx = (struct hwc_context_t *)&dev->common;
623 struct hwc_drm_display *hd = NULL;
624 drmModeConnectorPtr c;
625 int ret, i;
626 uint32_t dpms_prop = 0;
627 uint64_t dpms_value = 0;
628
629 ret = hwc_get_drm_display(ctx, display, &hd);
630 if (ret)
631 return ret;
632
633 c = drmModeGetConnector(ctx->fd, hd->connector_id);
634 if (!c) {
635 ALOGE("Failed to get connector %d", display);
636 return -ENODEV;
637 }
638
639 for (i = 0; !dpms_prop && i < c->count_props; i++) {
640 drmModePropertyPtr p;
641
642 p = drmModeGetProperty(ctx->fd, c->props[i]);
643 if (!p)
644 continue;
645
646 if (!strcmp(p->name, "DPMS"))
647 dpms_prop = c->props[i];
648
649 drmModeFreeProperty(p);
650 }
651 if (!dpms_prop) {
652 ALOGE("Failed to get DPMS property from display %d", display);
653 ret = -ENOENT;
654 goto out;
655 }
656
657 switch(mode) {
658 case HWC_POWER_MODE_OFF:
659 dpms_value = DRM_MODE_DPMS_OFF;
660 break;
661
662 /* We can't support dozing right now, so go full on */
663 case HWC_POWER_MODE_DOZE:
664 case HWC_POWER_MODE_DOZE_SUSPEND:
665 case HWC_POWER_MODE_NORMAL:
666 dpms_value = DRM_MODE_DPMS_ON;
667 break;
668 };
669
670 ret = drmModeConnectorSetProperty(ctx->fd, c->connector_id,
671 dpms_prop, dpms_value);
672 if (ret) {
673 ALOGE("Failed to set DPMS property for display %d", display);
674 goto out;
675 }
676
677out:
678 drmModeFreeConnector(c);
679 return ret;
680}
681
682static int hwc_query(struct hwc_composer_device_1 */* dev */, int what,
683 int *value)
684{
685 switch(what) {
686 case HWC_BACKGROUND_LAYER_SUPPORTED:
687 *value = 0; /* TODO: We should do this */
688 break;
689 case HWC_VSYNC_PERIOD:
690 ALOGW("Query for deprecated vsync value, returning 60Hz");
691 *value = 1000 * 1000 * 1000 / 60;
692 break;
693 case HWC_DISPLAY_TYPES_SUPPORTED:
694 *value = HWC_DISPLAY_PRIMARY | HWC_DISPLAY_EXTERNAL;
695 break;
696 }
697 return 0;
698}
699
700static void hwc_register_procs(struct hwc_composer_device_1* dev,
701 hwc_procs_t const* procs)
702{
703 struct hwc_context_t *ctx = (struct hwc_context_t *)&dev->common;
704
705 ctx->procs = procs;
706}
707
708static int hwc_get_display_configs(struct hwc_composer_device_1* dev,
709 int display, uint32_t* configs, size_t* numConfigs)
710{
711 struct hwc_context_t *ctx = (struct hwc_context_t *)&dev->common;
712 struct hwc_drm_display *hd = NULL;
713 drmModeConnectorPtr c;
714 int ret = 0, i;
715
716 if (!*numConfigs)
717 return 0;
718
719 ret = hwc_get_drm_display(ctx, display, &hd);
720 if (ret)
721 return ret;
722
723 c = drmModeGetConnector(ctx->fd, hd->connector_id);
724 if (!c) {
725 ALOGE("Failed to get connector %d", display);
726 return -ENODEV;
727 }
728
Sean Paula4283c52015-02-04 10:08:00 -0800729 if (hd->configs) {
Sean Paule0c4c3d2015-01-20 16:56:04 -0500730 free(hd->configs);
Sean Paula4283c52015-02-04 10:08:00 -0800731 hd->configs = NULL;
732 }
733
734 if (c->connection == DRM_MODE_DISCONNECTED) {
735 ret = -ENODEV;
736 goto out;
737 }
Sean Paule0c4c3d2015-01-20 16:56:04 -0500738
Sean Paule0c4c3d2015-01-20 16:56:04 -0500739 hd->configs = (drmModeModeInfoPtr)calloc(c->count_modes,
740 sizeof(*hd->configs));
741 if (!hd->configs) {
742 ALOGE("Failed to allocate config list for display %d", display);
743 ret = -ENOMEM;
744 hd->num_configs = 0;
745 goto out;
746 }
747
748 for (i = 0; i < c->count_modes; i++) {
749 drmModeModeInfoPtr m = &hd->configs[i];
750
751 memcpy(m, &c->modes[i], sizeof(*m));
752
753 if (i < (int)*numConfigs)
754 configs[i] = i;
755 }
756
757 hd->num_configs = c->count_modes;
758 *numConfigs = MIN(c->count_modes, *numConfigs);
759
760out:
761 drmModeFreeConnector(c);
762 return ret;
763}
764
765static int hwc_check_config_valid(struct hwc_context_t *ctx,
766 drmModeConnectorPtr connector, int display,
767 int config_idx)
768{
769 struct hwc_drm_display *hd = NULL;
770 drmModeModeInfoPtr m = NULL;
771 int ret = 0, i;
772
773 ret = hwc_get_drm_display(ctx, display, &hd);
774 if (ret)
775 return ret;
776
777 /* Make sure the requested config is still valid for the display */
778 for (i = 0; i < connector->count_modes; i++) {
779 if (hwc_mode_is_equal(&connector->modes[i],
780 &hd->configs[config_idx])) {
781 m = &hd->configs[config_idx];
782 break;
783 }
784 }
785 if (!m)
786 return -ENOENT;
787
788 return 0;
789}
790
791static int hwc_get_display_attributes(struct hwc_composer_device_1* dev,
792 int display, uint32_t config, const uint32_t* attributes,
793 int32_t* values)
794{
795 struct hwc_context_t *ctx = (struct hwc_context_t *)&dev->common;
796 struct hwc_drm_display *hd = NULL;
797 drmModeConnectorPtr c;
798 drmModeModeInfoPtr m;
799 int ret, i;
800
801 ret = hwc_get_drm_display(ctx, display, &hd);
802 if (ret)
803 return ret;
804
805 if (config >= hd->num_configs) {
806 ALOGE("Requested config is out-of-bounds %d %d", config,
807 hd->num_configs);
808 return -EINVAL;
809 }
810
811 c = drmModeGetConnector(ctx->fd, hd->connector_id);
812 if (!c) {
813 ALOGE("Failed to get connector %d", display);
814 return -ENODEV;
815 }
816
817 ret = hwc_check_config_valid(ctx, c, display, (int)config);
818 if (ret) {
819 ALOGE("Provided config is no longer valid %u", config);
820 goto out;
821 }
822
823 m = &hd->configs[config];
824 for (i = 0; attributes[i] != HWC_DISPLAY_NO_ATTRIBUTE; i++) {
825 switch(attributes[i]) {
826 case HWC_DISPLAY_VSYNC_PERIOD:
827 values[i] = 1000 * 1000 * 1000 / m->vrefresh;
828 break;
829 case HWC_DISPLAY_WIDTH:
830 values[i] = m->hdisplay;
831 break;
832 case HWC_DISPLAY_HEIGHT:
833 values[i] = m->vdisplay;
834 break;
835 case HWC_DISPLAY_DPI_X:
836 /* Dots per 1000 inches */
837 values[i] = c->mmWidth ?
838 (m->hdisplay * UM_PER_INCH) / c->mmWidth : 0;
839 break;
840 case HWC_DISPLAY_DPI_Y:
841 /* Dots per 1000 inches */
842 values[i] = c->mmHeight ?
843 (m->vdisplay * UM_PER_INCH) / c->mmHeight : 0;
844 break;
845 }
846 }
847
848out:
849 drmModeFreeConnector(c);
850 return ret;
851}
852
853static int hwc_get_active_config(struct hwc_composer_device_1* dev, int display)
854{
855 struct hwc_context_t *ctx = (struct hwc_context_t *)&dev->common;
856 struct hwc_drm_display *hd = NULL;
Sean Paulfa406a12015-02-04 10:05:44 -0800857 int ret, i, index = -1;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500858
859 ret = hwc_get_drm_display(ctx, display, &hd);
860 if (ret)
861 return ret;
862
Sean Paulfa406a12015-02-04 10:05:44 -0800863 /* Find the current mode in the config list */
864 for (i = 0; i < (int)hd->num_configs; i++) {
865 if (hwc_mode_is_equal(&hd->configs[i], &hd->active_mode)) {
866 index = i;
867 break;
868 }
Sean Paule0c4c3d2015-01-20 16:56:04 -0500869 }
870
Sean Paulfa406a12015-02-04 10:05:44 -0800871 return index;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500872}
873
874static bool hwc_crtc_is_bound(struct hwc_context_t *ctx, uint32_t crtc_id)
875{
876 int i;
877
878 for (i = 0; i < MAX_NUM_DISPLAYS; i++) {
879 if (ctx->displays[i].active_crtc == crtc_id)
880 return true;
881 }
882 return false;
883}
884
885static int hwc_try_encoder(struct hwc_context_t *ctx, drmModeResPtr r,
886 uint32_t encoder_id, uint32_t *crtc_id)
887{
888 drmModeEncoderPtr e;
889 int ret, i;
890
891 e = drmModeGetEncoder(ctx->fd, encoder_id);
892 if (!e) {
893 ALOGE("Failed to get encoder for connector %d", encoder_id);
894 return -ENODEV;
895 }
896
897 /* First try to use the currently-bound crtc */
898 if (e->crtc_id) {
899 if (!hwc_crtc_is_bound(ctx, e->crtc_id)) {
900 *crtc_id = e->crtc_id;
901 ret = 0;
902 goto out;
903 }
904 }
905
906 /* Try to find a possible crtc which will work */
907 for (i = 0; i < r->count_crtcs; i++) {
908 if (!(e->possible_crtcs & (1 << i)))
909 continue;
910
911 /* We've already tried this earlier */
912 if (e->crtc_id == r->crtcs[i])
913 continue;
914
915 if (!hwc_crtc_is_bound(ctx, r->crtcs[i])) {
916 *crtc_id = r->crtcs[i];
917 ret = 0;
918 goto out;
919 }
920 }
921
922 /* We can't use the encoder, but nothing went wrong, try another one */
923 ret = -EAGAIN;
924
925out:
926 drmModeFreeEncoder(e);
927 return ret;
928}
929
930static int hwc_set_active_config(struct hwc_composer_device_1* dev, int display,
931 int index)
932{
933 struct hwc_context_t *ctx = (struct hwc_context_t *)&dev->common;
934 struct hwc_drm_display *hd = NULL;
935 drmModeResPtr r = NULL;
936 drmModeConnectorPtr c;
937 uint32_t crtc_id = 0;
938 int ret, i;
939 bool new_crtc, new_encoder;
940
941 ret = hwc_get_drm_display(ctx, display, &hd);
942 if (ret)
943 return ret;
944
945 c = drmModeGetConnector(ctx->fd, hd->connector_id);
946 if (!c) {
947 ALOGE("Failed to get connector %d", display);
948 return -ENODEV;
949 }
950
951 if (c->connection == DRM_MODE_DISCONNECTED) {
952 ALOGE("Tried to configure a disconnected display %d", display);
953 ret = -ENODEV;
954 goto out;
955 }
956
Sean Paulfa406a12015-02-04 10:05:44 -0800957 if (index >= c->count_modes) {
958 ALOGE("Index is out-of-bounds %d/%d", index, c->count_modes);
Sean Paule0c4c3d2015-01-20 16:56:04 -0500959 ret = -ENOENT;
960 goto out;
961 }
962
963 r = drmModeGetResources(ctx->fd);
964 if (!r) {
965 ALOGE("Failed to get drm resources");
966 goto out;
967 }
968
969 /* We no longer have an active_crtc */
970 hd->active_crtc = 0;
Sean Pauleb9e75c2015-01-25 23:31:30 -0500971 hd->active_pipe = -1;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500972
973 /* First, try to use the currently-connected encoder */
974 if (c->encoder_id) {
975 ret = hwc_try_encoder(ctx, r, c->encoder_id, &crtc_id);
976 if (ret && ret != -EAGAIN) {
977 ALOGE("Encoder try failed %d", ret);
978 goto out;
979 }
980 }
981
982 /* We couldn't find a crtc with the attached encoder, try the others */
983 if (!crtc_id) {
984 for (i = 0; i < c->count_encoders; i++) {
985 ret = hwc_try_encoder(ctx, r, c->encoders[i], &crtc_id);
986 if (!ret) {
987 break;
988 } else if (ret != -EAGAIN) {
989 ALOGE("Encoder try failed %d", ret);
990 goto out;
991 }
992 }
993 if (!crtc_id) {
994 ALOGE("Couldn't find valid crtc to modeset");
995 ret = -EINVAL;
996 goto out;
997 }
998 }
999
1000 hd->active_crtc = crtc_id;
Sean Paulfa406a12015-02-04 10:05:44 -08001001
1002 memcpy(&hd->active_mode, &hd->configs[index], sizeof(hd->active_mode));
Sean Paule0c4c3d2015-01-20 16:56:04 -05001003
Sean Pauleb9e75c2015-01-25 23:31:30 -05001004 /* Find the pipe corresponding to the crtc_id */
1005 for (i = 0; i < r->count_crtcs; i++) {
1006 /* We've already tried this earlier */
1007 if (r->crtcs[i] == crtc_id) {
1008 hd->active_pipe = i;
1009 break;
1010 }
1011 }
1012 /* This should never happen... hehehe */
1013 if (hd->active_pipe == -1) {
1014 ALOGE("Active crtc was not found in resources!!");
1015 ret = -ENODEV;
1016 goto out;
1017 }
1018
Sean Paule0c4c3d2015-01-20 16:56:04 -05001019 /* TODO: Once we have atomic, set the crtc timing info here */
1020
1021out:
1022 if (r)
1023 drmModeFreeResources(r);
1024
1025 drmModeFreeConnector(c);
1026 return ret;
1027}
1028
Sean Paul9aa5ad32015-01-22 15:47:54 -05001029static int hwc_destroy_worker(struct hwc_worker *worker)
1030{
1031 int ret;
1032
1033 ret = pthread_mutex_lock(&worker->lock);
1034 if (ret) {
1035 ALOGE("Failed to lock in destroy() %d", ret);
1036 return ret;
1037 }
1038
1039 worker->exit = true;
1040
1041 ret |= pthread_cond_signal(&worker->cond);
1042 if (ret)
1043 ALOGE("Failed to signal cond in destroy() %d", ret);
1044
1045 ret |= pthread_mutex_unlock(&worker->lock);
1046 if (ret)
1047 ALOGE("Failed to unlock in destroy() %d", ret);
1048
1049 ret |= pthread_join(worker->thread, NULL);
1050 if (ret && ret != ESRCH)
1051 ALOGE("Failed to join thread in destroy() %d", ret);
1052
1053 return ret;
1054}
1055
1056static void hwc_destroy_display(struct hwc_drm_display *hd)
1057{
1058 int ret;
1059
1060 if (hwc_destroy_worker(&hd->set_worker))
1061 ALOGE("Destroy set worker failed");
Sean Pauleb9e75c2015-01-25 23:31:30 -05001062
1063 if (hwc_destroy_worker(&hd->vsync_worker))
1064 ALOGE("Destroy vsync worker failed");
Sean Paul9aa5ad32015-01-22 15:47:54 -05001065}
1066
Sean Paule0c4c3d2015-01-20 16:56:04 -05001067static int hwc_device_close(struct hw_device_t *dev)
1068{
1069 struct hwc_context_t *ctx = (struct hwc_context_t *)dev;
Sean Paulcd36a9e2015-01-22 18:01:18 -05001070 int ret, i;
Sean Paule0c4c3d2015-01-20 16:56:04 -05001071
Sean Paul9aa5ad32015-01-22 15:47:54 -05001072 for (i = 0; i < MAX_NUM_DISPLAYS; i++)
1073 hwc_destroy_display(&ctx->displays[i]);
1074
1075 drmClose(ctx->fd);
Sean Paulcd36a9e2015-01-22 18:01:18 -05001076
1077 ret = hwc_import_destroy(ctx->import_ctx);
1078 if (ret)
1079 ALOGE("Could not destroy import %d", ret);
1080
Sean Paule0c4c3d2015-01-20 16:56:04 -05001081 free(ctx);
1082
1083 return 0;
1084}
1085
Sean Paul9aa5ad32015-01-22 15:47:54 -05001086static int hwc_initialize_worker(struct hwc_drm_display *hd,
1087 struct hwc_worker *worker, void *(*routine)(void*))
1088{
1089 int ret;
1090
1091 ret = pthread_cond_init(&worker->cond, NULL);
1092 if (ret) {
1093 ALOGE("Failed to create worker condition %d", ret);
1094 return ret;
1095 }
1096
1097 ret = pthread_mutex_init(&worker->lock, NULL);
1098 if (ret) {
1099 ALOGE("Failed to initialize worker lock %d", ret);
1100 goto err_cond;
1101 }
1102
1103 worker->exit = false;
1104
1105 ret = pthread_create(&worker->thread, NULL, routine, hd);
1106 if (ret) {
1107 ALOGE("Could not create worker thread %d", ret);
1108 goto err_lock;
1109 }
1110 return 0;
1111
1112err_lock:
1113 pthread_mutex_destroy(&worker->lock);
1114err_cond:
1115 pthread_cond_destroy(&worker->cond);
1116 return ret;
1117}
1118
Sean Paule0c4c3d2015-01-20 16:56:04 -05001119static int hwc_initialize_display(struct hwc_context_t *ctx, int display,
1120 uint32_t connector_id)
1121{
1122 struct hwc_drm_display *hd = NULL;
1123 int ret;
1124
1125 ret = hwc_get_drm_display(ctx, display, &hd);
1126 if (ret)
1127 return ret;
1128
Sean Paul9aa5ad32015-01-22 15:47:54 -05001129 hd->ctx = ctx;
1130 hd->display = display;
Sean Pauleb9e75c2015-01-25 23:31:30 -05001131 hd->active_pipe = -1;
Sean Paulefb20cb2015-02-04 09:29:15 -08001132 hd->initial_modeset_required = true;
Sean Paule0c4c3d2015-01-20 16:56:04 -05001133 hd->connector_id = connector_id;
1134
Sean Paulf1dc1912015-01-24 01:34:31 -05001135 ret = sw_sync_timeline_create();
1136 if (ret < 0) {
1137 ALOGE("Failed to create sw sync timeline %d", ret);
1138 return ret;
1139 }
1140 hd->timeline_fd = ret;
1141
Sean Paul9aa5ad32015-01-22 15:47:54 -05001142 ret = hwc_initialize_worker(hd, &hd->set_worker, hwc_set_worker);
1143 if (ret) {
1144 ALOGE("Failed to create set worker %d\n", ret);
1145 return ret;
1146 }
1147
Sean Pauleb9e75c2015-01-25 23:31:30 -05001148 ret = hwc_initialize_worker(hd, &hd->vsync_worker, hwc_vsync_worker);
1149 if (ret) {
1150 ALOGE("Failed to create vsync worker %d", ret);
1151 goto err;
1152 }
1153
Sean Paule0c4c3d2015-01-20 16:56:04 -05001154 return 0;
Sean Pauleb9e75c2015-01-25 23:31:30 -05001155
1156err:
1157 if (hwc_destroy_worker(&hd->set_worker))
1158 ALOGE("Failed to destroy set worker");
1159
1160 return ret;
Sean Paule0c4c3d2015-01-20 16:56:04 -05001161}
1162
1163static int hwc_enumerate_displays(struct hwc_context_t *ctx)
1164{
1165 struct hwc_drm_display *panel_hd;
1166 drmModeResPtr res;
1167 drmModeConnectorPtr *conn_list;
1168 int ret = 0, i, j;
1169
1170 res = drmModeGetResources(ctx->fd);
1171 if (!res) {
1172 ALOGE("Failed to get drm resources");
1173 return -ENODEV;
1174 }
1175
1176 conn_list = (drmModeConnector **)calloc(res->count_connectors,
1177 sizeof(*conn_list));
1178 if (!conn_list) {
1179 ALOGE("Failed to allocate connector list");
1180 ret = -ENOMEM;
1181 goto out;
1182 }
1183
1184 for (i = 0; i < res->count_connectors; i++) {
1185 conn_list[i] = drmModeGetConnector(ctx->fd, res->connectors[i]);
1186 if (!conn_list[i]) {
1187 ALOGE("Failed to get connector %d", res->connectors[i]);
1188 ret = -ENODEV;
1189 goto out;
1190 }
1191 }
1192
1193 ctx->num_displays = 0;
1194
1195 /* Find a connected, panel type connector for display 0 */
1196 for (i = 0; i < res->count_connectors; i++) {
1197 drmModeConnectorPtr c = conn_list[i];
1198
1199 for (j = 0; j < ARRAY_SIZE(panel_types); j++) {
1200 if (c->connector_type == panel_types[j] &&
1201 c->connection == DRM_MODE_CONNECTED)
1202 break;
1203 }
1204 if (j == ARRAY_SIZE(panel_types))
1205 continue;
1206
1207 hwc_initialize_display(ctx, ctx->num_displays, c->connector_id);
1208 ctx->num_displays++;
1209 break;
1210 }
1211
1212 ret = hwc_get_drm_display(ctx, 0, &panel_hd);
1213 if (ret)
1214 goto out;
1215
1216 /* Fill in the other displays */
1217 for (i = 0; i < res->count_connectors; i++) {
1218 drmModeConnectorPtr c = conn_list[i];
1219
1220 if (panel_hd->connector_id == c->connector_id)
1221 continue;
1222
1223 hwc_initialize_display(ctx, ctx->num_displays, c->connector_id);
1224 ctx->num_displays++;
1225 }
1226
1227out:
1228 for (i = 0; i < res->count_connectors; i++) {
1229 if (conn_list[i])
1230 drmModeFreeConnector(conn_list[i]);
1231 }
1232 free(conn_list);
1233
1234 if (res)
1235 drmModeFreeResources(res);
1236
1237 return ret;
1238}
1239
1240static int hwc_device_open(const struct hw_module_t* module, const char* name,
1241 struct hw_device_t** dev)
1242{
1243 int ret = 0;
1244 struct hwc_context_t *ctx;
1245
1246 if (strcmp(name, HWC_HARDWARE_COMPOSER)) {
1247 ALOGE("Invalid module name- %s", name);
1248 return -EINVAL;
1249 }
1250
Sean Paul9b1bb842015-01-23 01:11:58 -05001251 ctx = new hwc_context_t();
Sean Paule0c4c3d2015-01-20 16:56:04 -05001252 if (!ctx) {
1253 ALOGE("Failed to allocate hwc context");
1254 return -ENOMEM;
1255 }
1256
Sean Paulcd36a9e2015-01-22 18:01:18 -05001257 ret = hwc_import_init(&ctx->import_ctx);
Sean Paule0c4c3d2015-01-20 16:56:04 -05001258 if (ret) {
Sean Paulcd36a9e2015-01-22 18:01:18 -05001259 ALOGE("Failed to initialize import context");
Sean Paule0c4c3d2015-01-20 16:56:04 -05001260 goto out;
1261 }
1262
1263 /* TODO: Use drmOpenControl here instead */
1264 ctx->fd = open(HWCOMPOSER_DRM_DEVICE, O_RDWR);
1265 if (ctx->fd < 0) {
1266 ALOGE("Failed to open dri- %s", strerror(-errno));
1267 goto out;
1268 }
1269
1270 ret = drmSetMaster(ctx->fd);
1271 if (ret) {
1272 ALOGE("Failed to set hwcomposer as drm master %d", ret);
1273 goto out;
1274 }
1275
1276 ret = hwc_enumerate_displays(ctx);
1277 if (ret) {
1278 ALOGE("Failed to enumerate displays: %s", strerror(ret));
1279 goto out;
1280 }
1281
1282 ctx->device.common.tag = HARDWARE_DEVICE_TAG;
1283 ctx->device.common.version = HWC_DEVICE_API_VERSION_1_4;
1284 ctx->device.common.module = const_cast<hw_module_t*>(module);
1285 ctx->device.common.close = hwc_device_close;
1286
1287 ctx->device.prepare = hwc_prepare;
1288 ctx->device.set = hwc_set;
1289 ctx->device.eventControl = hwc_event_control;
1290 ctx->device.setPowerMode = hwc_set_power_mode;
1291 ctx->device.query = hwc_query;
1292 ctx->device.registerProcs = hwc_register_procs;
1293 ctx->device.getDisplayConfigs = hwc_get_display_configs;
1294 ctx->device.getDisplayAttributes = hwc_get_display_attributes;
1295 ctx->device.getActiveConfig = hwc_get_active_config;
1296 ctx->device.setActiveConfig = hwc_set_active_config;
1297 ctx->device.setCursorPositionAsync = NULL; /* TODO: Add cursor */
1298
1299 *dev = &ctx->device.common;
1300
1301 return 0;
1302out:
1303 if (ctx->fd >= 0)
1304 close(ctx->fd);
1305
1306 free(ctx);
1307 return ret;
1308}
1309
1310static struct hw_module_methods_t hwc_module_methods = {
1311 open: hwc_device_open
1312};
1313
1314hwc_module_t HAL_MODULE_INFO_SYM = {
1315 common: {
1316 tag: HARDWARE_MODULE_TAG,
1317 version_major: 1,
1318 version_minor: 0,
1319 id: HWC_HARDWARE_MODULE_ID,
1320 name: "DRM hwcomposer module",
1321 author: "The Android Open Source Project",
1322 methods: &hwc_module_methods,
1323 dso: NULL,
1324 reserved: { 0 },
1325 }
1326};