blob: a7c9e43644d81c67cfc2e18a75eefb945560b004 [file] [log] [blame]
Sean Paule0c4c3d2015-01-20 16:56:04 -05001/*
2 * Copyright (C) 2015 The Android Open Source Project
3 *
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
7 *
8 * http://www.apache.org/licenses/LICENSE-2.0
9 *
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
15 */
16
Stéphane Marchesinbe98c8c2015-06-23 16:18:10 -070017#define ATRACE_TAG ATRACE_TAG_GRAPHICS
Sean Paule0c4c3d2015-01-20 16:56:04 -050018#define LOG_TAG "hwcomposer-drm"
19
Sean Paulef8f1f92015-04-29 16:05:23 -040020#include "drm_hwcomposer.h"
Sean Paul6a55e9f2015-04-30 15:31:06 -040021#include "drmresources.h"
Sean Paulda6270d2015-06-01 14:11:52 -040022#include "importer.h"
Haixia Shid21f5282015-10-05 14:35:09 -070023#include "virtualcompositorworker.h"
Sean Paul4057be32015-05-13 06:23:09 -070024#include "vsyncworker.h"
Sean Paulef8f1f92015-04-29 16:05:23 -040025
Zach Reizner09807052015-08-13 14:53:41 -070026#include <stdlib.h>
27
28#include <map>
29#include <vector>
Zach Reizner4a253652015-09-10 18:30:54 -070030#include <sstream>
Zach Reizner09807052015-08-13 14:53:41 -070031
Sean Paule0c4c3d2015-01-20 16:56:04 -050032#include <errno.h>
Sean Paulef8f1f92015-04-29 16:05:23 -040033#include <fcntl.h>
Sean Paulef8f1f92015-04-29 16:05:23 -040034#include <pthread.h>
Sean Paule0c4c3d2015-01-20 16:56:04 -050035#include <sys/param.h>
Sean Paul9aa5ad32015-01-22 15:47:54 -050036#include <sys/resource.h>
Sean Paule0c4c3d2015-01-20 16:56:04 -050037#include <xf86drm.h>
38#include <xf86drmMode.h>
Sean Paule0c4c3d2015-01-20 16:56:04 -050039
Sean Paulef8f1f92015-04-29 16:05:23 -040040#include <cutils/log.h>
41#include <cutils/properties.h>
Sean Paule0c4c3d2015-01-20 16:56:04 -050042#include <hardware/hardware.h>
43#include <hardware/hwcomposer.h>
Zach Reizner4a253652015-09-10 18:30:54 -070044#include <sw_sync.h>
45#include <sync/sync.h>
Stéphane Marchesinbe98c8c2015-06-23 16:18:10 -070046#include <utils/Trace.h>
Sean Paule0c4c3d2015-01-20 16:56:04 -050047
Sean Paule0c4c3d2015-01-20 16:56:04 -050048#define UM_PER_INCH 25400
Stéphane Marchesincb3f9842015-06-19 14:50:45 -070049#define HWC_FB_BUFFERS 3
Sean Paule0c4c3d2015-01-20 16:56:04 -050050
Sean Paul6a55e9f2015-04-30 15:31:06 -040051namespace android {
Sean Paule0c4c3d2015-01-20 16:56:04 -050052
Zach Reizner4a253652015-09-10 18:30:54 -070053class DummySwSyncTimeline {
54 public:
55 int Init() {
56 int ret = timeline_fd_.Set(sw_sync_timeline_create());
57 if (ret < 0)
58 return ret;
59 return 0;
60 }
61
62 UniqueFd CreateDummyFence() {
63 int ret = sw_sync_fence_create(timeline_fd_.get(), "dummy fence",
64 timeline_pt_ + 1);
65 if (ret < 0) {
66 ALOGE("Failed to create dummy fence %d", ret);
67 return ret;
68 }
69
70 UniqueFd ret_fd(ret);
71
72 ret = sw_sync_timeline_inc(timeline_fd_.get(), 1);
73 if (ret) {
74 ALOGE("Failed to increment dummy sync timeline %d", ret);
75 return ret;
76 }
77
78 ++timeline_pt_;
79 return ret_fd;
80 }
81
82 private:
83 UniqueFd timeline_fd_;
84 int timeline_pt_ = 0;
85};
86
87struct CheckedOutputFd {
88 CheckedOutputFd(int *fd, const char *description,
89 DummySwSyncTimeline &timeline)
90 : fd_(fd), description_(description), timeline_(timeline) {
91 }
92 CheckedOutputFd(CheckedOutputFd &&rhs)
93 : description_(rhs.description_), timeline_(rhs.timeline_) {
94 std::swap(fd_, rhs.fd_);
95 }
96
97 CheckedOutputFd &operator=(const CheckedOutputFd &rhs) = delete;
98
99 ~CheckedOutputFd() {
100 if (fd_ == NULL)
101 return;
102
103 if (*fd_ >= 0)
104 return;
105
106 *fd_ = timeline_.CreateDummyFence().Release();
107
108 if (*fd_ < 0)
109 ALOGE("Failed to fill %s (%p == %d) before destruction",
110 description_.c_str(), fd_, *fd_);
111 }
112
113 private:
114 int *fd_ = NULL;
115 std::string description_;
116 DummySwSyncTimeline &timeline_;
117};
118
Sean Paule42febf2015-05-07 11:35:29 -0700119typedef struct hwc_drm_display {
Sean Paulef8f1f92015-04-29 16:05:23 -0400120 struct hwc_context_t *ctx;
121 int display;
Sean Paul9aa5ad32015-01-22 15:47:54 -0500122
Sean Paul6a55e9f2015-04-30 15:31:06 -0400123 std::vector<uint32_t> config_ids;
Sean Paul9aa5ad32015-01-22 15:47:54 -0500124
Sean Paul4057be32015-05-13 06:23:09 -0700125 VSyncWorker vsync_worker;
Sean Paule42febf2015-05-07 11:35:29 -0700126} hwc_drm_display_t;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500127
128struct hwc_context_t {
Sean Paule42febf2015-05-07 11:35:29 -0700129 // map of display:hwc_drm_display_t
130 typedef std::map<int, hwc_drm_display_t> DisplayMap;
131 typedef DisplayMap::iterator DisplayMapIter;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500132
Zach Reizner1946fa72015-08-14 11:14:38 -0700133 hwc_context_t() : procs(NULL), importer(NULL), use_framebuffer_target(false) {
Sean Paulda6270d2015-06-01 14:11:52 -0400134 }
135
136 ~hwc_context_t() {
Haixia Shid21f5282015-10-05 14:35:09 -0700137 virtual_compositor_worker.Exit();
Sean Paulda6270d2015-06-01 14:11:52 -0400138 delete importer;
139 }
140
Sean Paule42febf2015-05-07 11:35:29 -0700141 hwc_composer_device_1_t device;
Sean Paulef8f1f92015-04-29 16:05:23 -0400142 hwc_procs_t const *procs;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500143
Sean Paule42febf2015-05-07 11:35:29 -0700144 DisplayMap displays;
Sean Paul6a55e9f2015-04-30 15:31:06 -0400145 DrmResources drm;
Sean Paulda6270d2015-06-01 14:11:52 -0400146 Importer *importer;
Zach Reizner4a253652015-09-10 18:30:54 -0700147 const gralloc_module_t *gralloc;
148 DummySwSyncTimeline dummy_timeline;
Zach Reizner1946fa72015-08-14 11:14:38 -0700149 bool use_framebuffer_target;
Haixia Shid21f5282015-10-05 14:35:09 -0700150 VirtualCompositorWorker virtual_compositor_worker;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500151};
152
Zach Reizner4a253652015-09-10 18:30:54 -0700153static native_handle_t *dup_buffer_handle(buffer_handle_t handle) {
154 native_handle_t *new_handle =
155 native_handle_create(handle->numFds, handle->numInts);
156 if (new_handle == NULL)
157 return NULL;
158
159 const int *old_data = handle->data;
160 int *new_data = new_handle->data;
161 for (int i = 0; i < handle->numFds; i++) {
162 *new_data = dup(*old_data);
163 old_data++;
164 new_data++;
165 }
166 memcpy(new_data, old_data, sizeof(int) * handle->numInts);
167
168 return new_handle;
169}
170
171static void free_buffer_handle(native_handle_t *handle) {
172 int ret = native_handle_close(handle);
173 if (ret)
174 ALOGE("Failed to close native handle %d", ret);
175 ret = native_handle_delete(handle);
176 if (ret)
177 ALOGE("Failed to delete native handle %d", ret);
178}
179
180OutputFd &OutputFd::operator=(OutputFd &&rhs) {
181 if (fd_ == NULL) {
182 std::swap(fd_, rhs.fd_);
183 } else {
184 if (*fd_ < 0) {
185 ALOGE("Failed to fill OutputFd %p before assignment", fd_);
186 }
187 fd_ = rhs.fd_;
188 rhs.fd_ = NULL;
189 }
190
191 return *this;
192}
193
194hwc_drm_bo *DrmHwcBuffer::operator->() {
195 if (importer_ == NULL) {
196 ALOGE("Access of none existent BO");
197 exit(1);
198 return NULL;
199 }
200 return &bo_;
201}
202
203void DrmHwcBuffer::Clear() {
204 if (importer_ != NULL) {
205 importer_->ReleaseBuffer(&bo_);
206 importer_ = NULL;
207 }
208}
209
210int DrmHwcBuffer::ImportBuffer(buffer_handle_t handle, Importer *importer) {
211 hwc_drm_bo tmp_bo;
212
213 int ret = importer->ImportBuffer(handle, &tmp_bo);
214 if (ret)
215 return ret;
216
217 if (importer_ != NULL) {
218 importer_->ReleaseBuffer(&bo_);
219 }
220
221 importer_ = importer;
222
223 bo_ = tmp_bo;
224
225 return 0;
226}
227
228int DrmHwcNativeHandle::CopyBufferHandle(buffer_handle_t handle,
229 const gralloc_module_t *gralloc) {
230 native_handle_t *handle_copy = dup_buffer_handle(handle);
231 if (handle_copy == NULL) {
232 ALOGE("Failed to duplicate handle");
233 return -ENOMEM;
234 }
235
236 int ret = gralloc->registerBuffer(gralloc, handle_copy);
237 if (ret) {
238 ALOGE("Failed to register buffer handle %d", ret);
239 free_buffer_handle(handle_copy);
240 return ret;
241 }
242
243 Clear();
244
245 gralloc_ = gralloc;
246 handle_ = handle_copy;
247
248 return 0;
249}
250
251DrmHwcNativeHandle::~DrmHwcNativeHandle() {
252 Clear();
253}
254
255void DrmHwcNativeHandle::Clear() {
256 if (gralloc_ != NULL && handle_ != NULL) {
257 gralloc_->unregisterBuffer(gralloc_, handle_);
258 free_buffer_handle(handle_);
259 gralloc_ = NULL;
260 handle_ = NULL;
261 }
262}
263
264int DrmHwcLayer::InitFromHwcLayer(hwc_layer_1_t *sf_layer, Importer *importer,
265 const gralloc_module_t *gralloc) {
266 sf_handle = sf_layer->handle;
267 int ret = buffer.ImportBuffer(sf_layer->handle, importer);
268 if (ret)
269 return ret;
270
271 ret = handle.CopyBufferHandle(sf_layer->handle, gralloc);
272 if (ret)
273 return ret;
274
275 alpha = sf_layer->planeAlpha;
276
277 switch (sf_layer->transform) {
278 case 0:
279 transform = DrmHwcTransform::kIdentity;
280 break;
281 case HWC_TRANSFORM_FLIP_H:
282 transform = DrmHwcTransform::kFlipH;
283 break;
284 case HWC_TRANSFORM_FLIP_V:
285 transform = DrmHwcTransform::kFlipV;
286 break;
287 case HWC_TRANSFORM_ROT_90:
288 transform = DrmHwcTransform::kRotate90;
289 break;
290 case HWC_TRANSFORM_ROT_180:
291 transform = DrmHwcTransform::kRotate180;
292 break;
293 case HWC_TRANSFORM_ROT_270:
294 transform = DrmHwcTransform::kRotate270;
295 break;
296 default:
297 ALOGE("Invalid transform in hwc_layer_1_t %d", sf_layer->transform);
298 return -EINVAL;
299 }
300
301 switch (sf_layer->blending) {
302 case HWC_BLENDING_NONE:
303 blending = DrmHwcBlending::kNone;
304 break;
305 case HWC_BLENDING_PREMULT:
306 blending = DrmHwcBlending::kPreMult;
307 break;
308 case HWC_BLENDING_COVERAGE:
309 blending = DrmHwcBlending::kCoverage;
310 break;
311 default:
312 ALOGE("Invalid blending in hwc_layer_1_t %d", sf_layer->blending);
313 return -EINVAL;
314 }
315
316 source_crop = DrmHwcRect<float>(
317 sf_layer->sourceCropf.left, sf_layer->sourceCropf.top,
318 sf_layer->sourceCropf.right, sf_layer->sourceCropf.bottom);
319 display_frame = DrmHwcRect<int>(
320 sf_layer->displayFrame.left, sf_layer->displayFrame.top,
321 sf_layer->displayFrame.right, sf_layer->displayFrame.bottom);
322
323 return 0;
324}
325
Zach Reiznerc6520e42015-08-13 14:32:09 -0700326static void hwc_dump(struct hwc_composer_device_1 *dev, char *buff,
Sean Paul9046c642015-06-10 17:27:47 -0400327 int buff_len) {
328 struct hwc_context_t *ctx = (struct hwc_context_t *)&dev->common;
329 std::ostringstream out;
330
331 ctx->drm.compositor()->Dump(&out);
332 std::string out_str = out.str();
333 strncpy(buff, out_str.c_str(), std::min((size_t)buff_len, out_str.length()));
334}
335
Sean Paulb386f1b2015-05-13 06:33:23 -0700336static int hwc_prepare(hwc_composer_device_1_t *dev, size_t num_displays,
Sean Paulef8f1f92015-04-29 16:05:23 -0400337 hwc_display_contents_1_t **display_contents) {
Sean Paulb386f1b2015-05-13 06:33:23 -0700338 struct hwc_context_t *ctx = (struct hwc_context_t *)&dev->common;
Zach Reizner1946fa72015-08-14 11:14:38 -0700339
340 char use_framebuffer_target[PROPERTY_VALUE_MAX];
341 property_get("hwc.drm.use_framebuffer_target", use_framebuffer_target, "0");
342 bool new_use_framebuffer_target = atoi(use_framebuffer_target);
343 if (ctx->use_framebuffer_target != new_use_framebuffer_target)
344 ALOGW("Starting to %s HWC_FRAMEBUFFER_TARGET",
345 new_use_framebuffer_target ? "use" : "not use");
346 ctx->use_framebuffer_target = new_use_framebuffer_target;
347
Sean Paule42febf2015-05-07 11:35:29 -0700348 for (int i = 0; i < (int)num_displays; ++i) {
Sean Paulef8f1f92015-04-29 16:05:23 -0400349 if (!display_contents[i])
350 continue;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500351
Haixia Shid21f5282015-10-05 14:35:09 -0700352 bool use_framebuffer_target = ctx->use_framebuffer_target;
353 if (i == HWC_DISPLAY_VIRTUAL) {
354 use_framebuffer_target = true;
355 } else {
356 DrmCrtc *crtc = ctx->drm.GetCrtcForDisplay(i);
357 if (!crtc) {
358 ALOGE("No crtc for display %d", i);
359 return -ENODEV;
360 }
Sean Paulb386f1b2015-05-13 06:33:23 -0700361 }
Sean Paulb386f1b2015-05-13 06:33:23 -0700362
Zach Reizner45624d32015-06-10 16:03:01 -0700363 int num_layers = display_contents[i]->numHwLayers;
364 for (int j = 0; j < num_layers; j++) {
Sean Paulb386f1b2015-05-13 06:33:23 -0700365 hwc_layer_1_t *layer = &display_contents[i]->hwLayers[j];
Zach Reizner45624d32015-06-10 16:03:01 -0700366
Haixia Shid21f5282015-10-05 14:35:09 -0700367 if (!use_framebuffer_target) {
Zach Reizner1946fa72015-08-14 11:14:38 -0700368 if (layer->compositionType == HWC_FRAMEBUFFER)
369 layer->compositionType = HWC_OVERLAY;
370 } else {
371 switch (layer->compositionType) {
372 case HWC_OVERLAY:
373 case HWC_BACKGROUND:
374 case HWC_SIDEBAND:
375 case HWC_CURSOR_OVERLAY:
376 layer->compositionType = HWC_FRAMEBUFFER;
377 break;
378 }
379 }
Sean Paulef8f1f92015-04-29 16:05:23 -0400380 }
381 }
Sean Pauldffca952015-02-04 10:19:55 -0800382
Sean Paulef8f1f92015-04-29 16:05:23 -0400383 return 0;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500384}
385
Zach Reizner09807052015-08-13 14:53:41 -0700386static void hwc_add_layer_to_retire_fence(
387 hwc_layer_1_t *layer, hwc_display_contents_1_t *display_contents) {
Sean Paul04206122015-07-16 15:59:24 -0400388 if (layer->releaseFenceFd < 0)
389 return;
390
391 if (display_contents->retireFenceFd >= 0) {
392 int old_retire_fence = display_contents->retireFenceFd;
Zach Reiznerc6520e42015-08-13 14:32:09 -0700393 display_contents->retireFenceFd =
394 sync_merge("dc_retire", old_retire_fence, layer->releaseFenceFd);
Sean Paul04206122015-07-16 15:59:24 -0400395 close(old_retire_fence);
396 } else {
397 display_contents->retireFenceFd = dup(layer->releaseFenceFd);
398 }
399}
400
Sean Paule0c4c3d2015-01-20 16:56:04 -0500401static int hwc_set(hwc_composer_device_1_t *dev, size_t num_displays,
Zach Reizner4a253652015-09-10 18:30:54 -0700402 hwc_display_contents_1_t **sf_display_contents) {
Stéphane Marchesinbe98c8c2015-06-23 16:18:10 -0700403 ATRACE_CALL();
Sean Paulef8f1f92015-04-29 16:05:23 -0400404 struct hwc_context_t *ctx = (struct hwc_context_t *)&dev->common;
Zach Reizner4a253652015-09-10 18:30:54 -0700405 int ret = 0;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500406
Zach Reizner4a253652015-09-10 18:30:54 -0700407 std::vector<CheckedOutputFd> checked_output_fences;
408 std::vector<DrmHwcDisplayContents> displays_contents;
Zach Reizner09807052015-08-13 14:53:41 -0700409 std::vector<DrmCompositionDisplayLayersMap> layers_map;
410 std::vector<std::vector<size_t>> layers_indices;
Zach Reizner4a253652015-09-10 18:30:54 -0700411 displays_contents.reserve(num_displays);
412 // layers_map.reserve(num_displays);
Zach Reizner09807052015-08-13 14:53:41 -0700413 layers_indices.reserve(num_displays);
414
Zach Reizner4a253652015-09-10 18:30:54 -0700415 // Phase one does nothing that would cause errors. Only take ownership of FDs.
416 for (size_t i = 0; i < num_displays; ++i) {
417 hwc_display_contents_1_t *dc = sf_display_contents[i];
418 displays_contents.emplace_back();
419 DrmHwcDisplayContents &display_contents = displays_contents.back();
Haixia Shi7acc59b2015-09-30 10:57:54 -0700420 layers_indices.emplace_back();
421 std::vector<size_t> &indices_to_composite = layers_indices.back();
Zach Reizner4a253652015-09-10 18:30:54 -0700422
423 if (!sf_display_contents[i])
Sean Paulb386f1b2015-05-13 06:33:23 -0700424 continue;
Zach Reizner09807052015-08-13 14:53:41 -0700425
Haixia Shid21f5282015-10-05 14:35:09 -0700426 if (i == HWC_DISPLAY_VIRTUAL) {
427 ctx->virtual_compositor_worker.QueueComposite(dc);
428 continue;
429 }
430
Zach Reizner4a253652015-09-10 18:30:54 -0700431 std::ostringstream display_index_formatter;
432 display_index_formatter << "retire fence for display " << i;
433 std::string display_fence_description(display_index_formatter.str());
434 checked_output_fences.emplace_back(&dc->retireFenceFd,
435 display_fence_description.c_str(),
436 ctx->dummy_timeline);
437 display_contents.retire_fence = OutputFd(&dc->retireFenceFd);
Zach Reizner09807052015-08-13 14:53:41 -0700438
Zach Reizner4a253652015-09-10 18:30:54 -0700439 size_t num_dc_layers = dc->numHwLayers;
Haixia Shi1034bb72015-09-09 12:08:20 -0700440 int framebuffer_target_index = -1;
Zach Reizner4a253652015-09-10 18:30:54 -0700441 for (size_t j = 0; j < num_dc_layers; ++j) {
442 hwc_layer_1_t *sf_layer = &dc->hwLayers[j];
443
444 display_contents.layers.emplace_back();
445 DrmHwcLayer &layer = display_contents.layers.back();
446
447 if (sf_layer->flags & HWC_SKIP_LAYER)
Sean Paulb386f1b2015-05-13 06:33:23 -0700448 continue;
Zach Reizner4a253652015-09-10 18:30:54 -0700449
Zach Reizner1946fa72015-08-14 11:14:38 -0700450 if (!ctx->use_framebuffer_target) {
Zach Reizner4a253652015-09-10 18:30:54 -0700451 if (sf_layer->compositionType == HWC_OVERLAY)
Zach Reizner1946fa72015-08-14 11:14:38 -0700452 indices_to_composite.push_back(j);
Zach Reizner4a253652015-09-10 18:30:54 -0700453 if (sf_layer->compositionType == HWC_FRAMEBUFFER_TARGET)
Haixia Shi1034bb72015-09-09 12:08:20 -0700454 framebuffer_target_index = j;
Zach Reizner1946fa72015-08-14 11:14:38 -0700455 } else {
Zach Reizner4a253652015-09-10 18:30:54 -0700456 if (sf_layer->compositionType == HWC_FRAMEBUFFER_TARGET)
Zach Reizner1946fa72015-08-14 11:14:38 -0700457 indices_to_composite.push_back(j);
458 }
Zach Reizner4a253652015-09-10 18:30:54 -0700459
460 layer.acquire_fence.Set(sf_layer->acquireFenceFd);
461 sf_layer->acquireFenceFd = -1;
462
463 std::ostringstream layer_fence_formatter;
464 layer_fence_formatter << "release fence for layer " << j << " of display "
465 << i;
466 std::string layer_fence_description(layer_fence_formatter.str());
467 checked_output_fences.emplace_back(&sf_layer->releaseFenceFd,
468 layer_fence_description.c_str(),
469 ctx->dummy_timeline);
470 layer.release_fence = OutputFd(&sf_layer->releaseFenceFd);
Zach Reizner1946fa72015-08-14 11:14:38 -0700471 }
Zach Reizner4a253652015-09-10 18:30:54 -0700472
Zach Reizner1946fa72015-08-14 11:14:38 -0700473 if (ctx->use_framebuffer_target) {
474 if (indices_to_composite.size() != 1) {
475 ALOGE("Expected 1 (got %d) layer with HWC_FRAMEBUFFER_TARGET",
476 indices_to_composite.size());
Zach Reizner4a253652015-09-10 18:30:54 -0700477 ret = -EINVAL;
Zach Reizner1946fa72015-08-14 11:14:38 -0700478 }
Haixia Shi1034bb72015-09-09 12:08:20 -0700479 } else {
480 if (indices_to_composite.empty() && framebuffer_target_index >= 0) {
Zach Reizner4a253652015-09-10 18:30:54 -0700481 hwc_layer_1_t *sf_layer = &dc->hwLayers[framebuffer_target_index];
482 if (!sf_layer->handle || (sf_layer->flags & HWC_SKIP_LAYER)) {
483 ALOGE(
484 "Expected valid layer with HWC_FRAMEBUFFER_TARGET when all "
485 "HWC_OVERLAY layers are skipped.");
486 ret = -EINVAL;
Haixia Shi1034bb72015-09-09 12:08:20 -0700487 }
488 indices_to_composite.push_back(framebuffer_target_index);
489 }
Zach Reizner45624d32015-06-10 16:03:01 -0700490 }
Zach Reizner4a253652015-09-10 18:30:54 -0700491 }
Zach Reizner45624d32015-06-10 16:03:01 -0700492
Zach Reizner4a253652015-09-10 18:30:54 -0700493 if (ret)
494 return ret;
495
496 for (size_t i = 0; i < num_displays; ++i) {
497 hwc_display_contents_1_t *dc = sf_display_contents[i];
498 DrmHwcDisplayContents &display_contents = displays_contents[i];
499 if (!sf_display_contents[i])
500 continue;
501
502 layers_map.emplace_back();
503 DrmCompositionDisplayLayersMap &map = layers_map.back();
504 std::vector<size_t> &indices_to_composite = layers_indices[i];
505 for (size_t j : indices_to_composite) {
506 hwc_layer_1_t *sf_layer = &dc->hwLayers[j];
507
508 DrmHwcLayer &layer = display_contents.layers[j];
509
510 layer.InitFromHwcLayer(sf_layer, ctx->importer, ctx->gralloc);
511 map.layers.emplace_back(std::move(layer));
512 }
513 }
514
515 std::unique_ptr<DrmComposition> composition(
516 ctx->drm.compositor()->CreateComposition(ctx->importer));
517 if (!composition) {
518 ALOGE("Drm composition init failed");
519 return -EINVAL;
Zach Reizner09807052015-08-13 14:53:41 -0700520 }
Zach Reizner45624d32015-06-10 16:03:01 -0700521
Zach Reizner09807052015-08-13 14:53:41 -0700522 ret = composition->SetLayers(layers_map.size(), layers_map.data());
523 if (ret) {
Zach Reizner09807052015-08-13 14:53:41 -0700524 return -EINVAL;
525 }
Zach Reizner45624d32015-06-10 16:03:01 -0700526
Zach Reizner09807052015-08-13 14:53:41 -0700527 ret = ctx->drm.compositor()->QueueComposition(std::move(composition));
528 if (ret) {
Zach Reizner09807052015-08-13 14:53:41 -0700529 return -EINVAL;
530 }
531
Zach Reizner566da2b2015-10-06 15:39:09 -0700532 for (size_t i = 0; i < num_displays; ++i) {
533 hwc_display_contents_1_t *dc = sf_display_contents[i];
534 if (!dc)
535 continue;
536
537 size_t num_dc_layers = dc->numHwLayers;
538 for (size_t j = 0; j < num_dc_layers; ++j) {
539 hwc_layer_1_t *layer = &dc->hwLayers[j];
540 if (layer->flags & HWC_SKIP_LAYER)
541 continue;
542 hwc_add_layer_to_retire_fence(layer, dc);
543 }
544 }
545
Zach Reizner09807052015-08-13 14:53:41 -0700546 composition.reset(NULL);
547
Sean Paulef8f1f92015-04-29 16:05:23 -0400548 return ret;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500549}
550
Sean Paulef8f1f92015-04-29 16:05:23 -0400551static int hwc_event_control(struct hwc_composer_device_1 *dev, int display,
552 int event, int enabled) {
Sean Paulef8f1f92015-04-29 16:05:23 -0400553 if (event != HWC_EVENT_VSYNC || (enabled != 0 && enabled != 1))
554 return -EINVAL;
Sean Pauleb9e75c2015-01-25 23:31:30 -0500555
Sean Paul4057be32015-05-13 06:23:09 -0700556 struct hwc_context_t *ctx = (struct hwc_context_t *)&dev->common;
557 hwc_drm_display_t *hd = &ctx->displays[display];
558 return hd->vsync_worker.VSyncControl(enabled);
Sean Paule0c4c3d2015-01-20 16:56:04 -0500559}
560
Sean Paulef8f1f92015-04-29 16:05:23 -0400561static int hwc_set_power_mode(struct hwc_composer_device_1 *dev, int display,
562 int mode) {
563 struct hwc_context_t *ctx = (struct hwc_context_t *)&dev->common;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500564
Sean Paul6a55e9f2015-04-30 15:31:06 -0400565 uint64_t dpmsValue = 0;
Sean Paulef8f1f92015-04-29 16:05:23 -0400566 switch (mode) {
567 case HWC_POWER_MODE_OFF:
Sean Paul6a55e9f2015-04-30 15:31:06 -0400568 dpmsValue = DRM_MODE_DPMS_OFF;
Sean Paulef8f1f92015-04-29 16:05:23 -0400569 break;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500570
Sean Paulef8f1f92015-04-29 16:05:23 -0400571 /* We can't support dozing right now, so go full on */
572 case HWC_POWER_MODE_DOZE:
573 case HWC_POWER_MODE_DOZE_SUSPEND:
574 case HWC_POWER_MODE_NORMAL:
Sean Paul6a55e9f2015-04-30 15:31:06 -0400575 dpmsValue = DRM_MODE_DPMS_ON;
Sean Paulef8f1f92015-04-29 16:05:23 -0400576 break;
577 };
Sean Paul6a55e9f2015-04-30 15:31:06 -0400578 return ctx->drm.SetDpmsMode(display, dpmsValue);
Sean Paule0c4c3d2015-01-20 16:56:04 -0500579}
580
Sean Paulef8f1f92015-04-29 16:05:23 -0400581static int hwc_query(struct hwc_composer_device_1 * /* dev */, int what,
582 int *value) {
583 switch (what) {
584 case HWC_BACKGROUND_LAYER_SUPPORTED:
585 *value = 0; /* TODO: We should do this */
586 break;
587 case HWC_VSYNC_PERIOD:
588 ALOGW("Query for deprecated vsync value, returning 60Hz");
589 *value = 1000 * 1000 * 1000 / 60;
590 break;
591 case HWC_DISPLAY_TYPES_SUPPORTED:
Haixia Shid21f5282015-10-05 14:35:09 -0700592 *value = HWC_DISPLAY_PRIMARY | HWC_DISPLAY_EXTERNAL | HWC_DISPLAY_VIRTUAL;
Sean Paulef8f1f92015-04-29 16:05:23 -0400593 break;
594 }
595 return 0;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500596}
597
Sean Paulef8f1f92015-04-29 16:05:23 -0400598static void hwc_register_procs(struct hwc_composer_device_1 *dev,
599 hwc_procs_t const *procs) {
600 struct hwc_context_t *ctx = (struct hwc_context_t *)&dev->common;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500601
Sean Paulef8f1f92015-04-29 16:05:23 -0400602 ctx->procs = procs;
Sean Paul4057be32015-05-13 06:23:09 -0700603
604 for (hwc_context_t::DisplayMapIter iter = ctx->displays.begin();
605 iter != ctx->displays.end(); ++iter) {
606 iter->second.vsync_worker.SetProcs(procs);
607 }
Sean Paule0c4c3d2015-01-20 16:56:04 -0500608}
609
Sean Paulef8f1f92015-04-29 16:05:23 -0400610static int hwc_get_display_configs(struct hwc_composer_device_1 *dev,
611 int display, uint32_t *configs,
Sean Paul6a55e9f2015-04-30 15:31:06 -0400612 size_t *num_configs) {
613 if (!*num_configs)
Sean Paulef8f1f92015-04-29 16:05:23 -0400614 return 0;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500615
Sean Paulef8f1f92015-04-29 16:05:23 -0400616 struct hwc_context_t *ctx = (struct hwc_context_t *)&dev->common;
Sean Paule42febf2015-05-07 11:35:29 -0700617 hwc_drm_display_t *hd = &ctx->displays[display];
Sean Paul6a55e9f2015-04-30 15:31:06 -0400618 hd->config_ids.clear();
619
620 DrmConnector *connector = ctx->drm.GetConnectorForDisplay(display);
621 if (!connector) {
622 ALOGE("Failed to get connector for display %d", display);
Sean Paulef8f1f92015-04-29 16:05:23 -0400623 return -ENODEV;
624 }
Sean Paule0c4c3d2015-01-20 16:56:04 -0500625
Sean Paule42febf2015-05-07 11:35:29 -0700626 int ret = connector->UpdateModes();
Sean Paul6a55e9f2015-04-30 15:31:06 -0400627 if (ret) {
628 ALOGE("Failed to update display modes %d", ret);
Sean Paulef8f1f92015-04-29 16:05:23 -0400629 return ret;
Sean Paulef8f1f92015-04-29 16:05:23 -0400630 }
Sean Paule0c4c3d2015-01-20 16:56:04 -0500631
Sean Paul6a55e9f2015-04-30 15:31:06 -0400632 for (DrmConnector::ModeIter iter = connector->begin_modes();
633 iter != connector->end_modes(); ++iter) {
634 size_t idx = hd->config_ids.size();
635 if (idx == *num_configs)
636 break;
637 hd->config_ids.push_back(iter->id());
638 configs[idx] = iter->id();
639 }
640 *num_configs = hd->config_ids.size();
641 return *num_configs == 0 ? -1 : 0;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500642}
643
Sean Paulef8f1f92015-04-29 16:05:23 -0400644static int hwc_get_display_attributes(struct hwc_composer_device_1 *dev,
645 int display, uint32_t config,
646 const uint32_t *attributes,
647 int32_t *values) {
648 struct hwc_context_t *ctx = (struct hwc_context_t *)&dev->common;
Sean Paul6a55e9f2015-04-30 15:31:06 -0400649 DrmConnector *c = ctx->drm.GetConnectorForDisplay(display);
Sean Paulef8f1f92015-04-29 16:05:23 -0400650 if (!c) {
Sean Paul6a55e9f2015-04-30 15:31:06 -0400651 ALOGE("Failed to get DrmConnector for display %d", display);
Sean Paulef8f1f92015-04-29 16:05:23 -0400652 return -ENODEV;
653 }
Sean Paul6a55e9f2015-04-30 15:31:06 -0400654 DrmMode mode;
655 for (DrmConnector::ModeIter iter = c->begin_modes(); iter != c->end_modes();
656 ++iter) {
657 if (iter->id() == config) {
658 mode = *iter;
659 break;
660 }
661 }
662 if (mode.id() == 0) {
663 ALOGE("Failed to find active mode for display %d", display);
664 return -ENOENT;
Sean Paulef8f1f92015-04-29 16:05:23 -0400665 }
Sean Paule0c4c3d2015-01-20 16:56:04 -0500666
Sean Paul6a55e9f2015-04-30 15:31:06 -0400667 uint32_t mm_width = c->mm_width();
668 uint32_t mm_height = c->mm_height();
Sean Paulef8f1f92015-04-29 16:05:23 -0400669 for (int i = 0; attributes[i] != HWC_DISPLAY_NO_ATTRIBUTE; ++i) {
670 switch (attributes[i]) {
671 case HWC_DISPLAY_VSYNC_PERIOD:
Sean Paul6a55e9f2015-04-30 15:31:06 -0400672 values[i] = 1000 * 1000 * 1000 / mode.v_refresh();
Sean Paulef8f1f92015-04-29 16:05:23 -0400673 break;
674 case HWC_DISPLAY_WIDTH:
Sean Paul6a55e9f2015-04-30 15:31:06 -0400675 values[i] = mode.h_display();
Sean Paulef8f1f92015-04-29 16:05:23 -0400676 break;
677 case HWC_DISPLAY_HEIGHT:
Sean Paul6a55e9f2015-04-30 15:31:06 -0400678 values[i] = mode.v_display();
Sean Paulef8f1f92015-04-29 16:05:23 -0400679 break;
680 case HWC_DISPLAY_DPI_X:
681 /* Dots per 1000 inches */
Sean Paul6a55e9f2015-04-30 15:31:06 -0400682 values[i] = mm_width ? (mode.h_display() * UM_PER_INCH) / mm_width : 0;
Sean Paulef8f1f92015-04-29 16:05:23 -0400683 break;
684 case HWC_DISPLAY_DPI_Y:
685 /* Dots per 1000 inches */
Sean Paul6a55e9f2015-04-30 15:31:06 -0400686 values[i] =
687 mm_height ? (mode.v_display() * UM_PER_INCH) / mm_height : 0;
Sean Paulef8f1f92015-04-29 16:05:23 -0400688 break;
689 }
690 }
Sean Paulef8f1f92015-04-29 16:05:23 -0400691 return 0;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500692}
693
Sean Paulef8f1f92015-04-29 16:05:23 -0400694static int hwc_get_active_config(struct hwc_composer_device_1 *dev,
695 int display) {
696 struct hwc_context_t *ctx = (struct hwc_context_t *)&dev->common;
Sean Paul6a55e9f2015-04-30 15:31:06 -0400697 DrmConnector *c = ctx->drm.GetConnectorForDisplay(display);
698 if (!c) {
699 ALOGE("Failed to get DrmConnector for display %d", display);
Sean Paulef8f1f92015-04-29 16:05:23 -0400700 return -ENODEV;
701 }
Sean Paule0c4c3d2015-01-20 16:56:04 -0500702
Sean Paul6a55e9f2015-04-30 15:31:06 -0400703 DrmMode mode = c->active_mode();
Sean Paule42febf2015-05-07 11:35:29 -0700704 hwc_drm_display_t *hd = &ctx->displays[display];
Sean Paul6a55e9f2015-04-30 15:31:06 -0400705 for (size_t i = 0; i < hd->config_ids.size(); ++i) {
706 if (hd->config_ids[i] == mode.id())
707 return i;
Sean Paulef8f1f92015-04-29 16:05:23 -0400708 }
Sean Paul6a55e9f2015-04-30 15:31:06 -0400709 return -1;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500710}
711
Sean Paulef8f1f92015-04-29 16:05:23 -0400712static int hwc_set_active_config(struct hwc_composer_device_1 *dev, int display,
713 int index) {
714 struct hwc_context_t *ctx = (struct hwc_context_t *)&dev->common;
Sean Paule42febf2015-05-07 11:35:29 -0700715 hwc_drm_display_t *hd = &ctx->displays[display];
Sean Paul6a55e9f2015-04-30 15:31:06 -0400716 if (index >= (int)hd->config_ids.size()) {
717 ALOGE("Invalid config index %d passed in", index);
718 return -EINVAL;
Sean Paulef8f1f92015-04-29 16:05:23 -0400719 }
Sean Paule0c4c3d2015-01-20 16:56:04 -0500720
Sean Paul877be972015-06-03 14:08:27 -0400721 DrmConnector *c = ctx->drm.GetConnectorForDisplay(display);
722 if (!c) {
723 ALOGE("Failed to get connector for display %d", display);
724 return -ENODEV;
725 }
726 DrmMode mode;
727 for (DrmConnector::ModeIter iter = c->begin_modes(); iter != c->end_modes();
728 ++iter) {
729 if (iter->id() == hd->config_ids[index]) {
730 mode = *iter;
731 break;
732 }
733 }
734 if (mode.id() != hd->config_ids[index]) {
735 ALOGE("Could not find active mode for %d/%d", index, hd->config_ids[index]);
736 return -ENOENT;
737 }
738 int ret = ctx->drm.SetDisplayActiveMode(display, mode);
Sean Paul6a55e9f2015-04-30 15:31:06 -0400739 if (ret) {
Sean Paul877be972015-06-03 14:08:27 -0400740 ALOGE("Failed to set active config %d", ret);
Sean Paul6a55e9f2015-04-30 15:31:06 -0400741 return ret;
Sean Paulef8f1f92015-04-29 16:05:23 -0400742 }
Sean Paul6a55e9f2015-04-30 15:31:06 -0400743 return ret;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500744}
745
Sean Paulef8f1f92015-04-29 16:05:23 -0400746static int hwc_device_close(struct hw_device_t *dev) {
747 struct hwc_context_t *ctx = (struct hwc_context_t *)dev;
Sean Paulef8f1f92015-04-29 16:05:23 -0400748 delete ctx;
Sean Paulef8f1f92015-04-29 16:05:23 -0400749 return 0;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500750}
751
Sean Paul24a26e32015-02-04 10:34:47 -0800752/*
753 * TODO: This function sets the active config to the first one in the list. This
754 * should be fixed such that it selects the preferred mode for the display, or
755 * some other, saner, method of choosing the config.
756 */
Sean Paule42febf2015-05-07 11:35:29 -0700757static int hwc_set_initial_config(hwc_drm_display_t *hd) {
Sean Paulef8f1f92015-04-29 16:05:23 -0400758 uint32_t config;
759 size_t num_configs = 1;
760 int ret = hwc_get_display_configs(&hd->ctx->device, hd->display, &config,
761 &num_configs);
762 if (ret || !num_configs)
763 return 0;
Sean Paul24a26e32015-02-04 10:34:47 -0800764
Sean Paulef8f1f92015-04-29 16:05:23 -0400765 ret = hwc_set_active_config(&hd->ctx->device, hd->display, 0);
766 if (ret) {
767 ALOGE("Failed to set active config d=%d ret=%d", hd->display, ret);
768 return ret;
769 }
Sean Paul24a26e32015-02-04 10:34:47 -0800770
Sean Paulef8f1f92015-04-29 16:05:23 -0400771 return ret;
Sean Paul24a26e32015-02-04 10:34:47 -0800772}
773
Sean Paul6a55e9f2015-04-30 15:31:06 -0400774static int hwc_initialize_display(struct hwc_context_t *ctx, int display) {
Sean Paule42febf2015-05-07 11:35:29 -0700775 hwc_drm_display_t *hd = &ctx->displays[display];
Sean Paulef8f1f92015-04-29 16:05:23 -0400776 hd->ctx = ctx;
777 hd->display = display;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500778
Sean Paulb386f1b2015-05-13 06:33:23 -0700779 int ret = hwc_set_initial_config(hd);
Sean Paulef8f1f92015-04-29 16:05:23 -0400780 if (ret) {
781 ALOGE("Failed to set initial config for d=%d ret=%d", display, ret);
Sean Paulef8f1f92015-04-29 16:05:23 -0400782 return ret;
783 }
Sean Paul24a26e32015-02-04 10:34:47 -0800784
Sean Paul4057be32015-05-13 06:23:09 -0700785 ret = hd->vsync_worker.Init(&ctx->drm, display);
786 if (ret) {
787 ALOGE("Failed to create event worker for display %d %d\n", display, ret);
788 return ret;
789 }
790
Sean Paulef8f1f92015-04-29 16:05:23 -0400791 return 0;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500792}
793
Sean Paulef8f1f92015-04-29 16:05:23 -0400794static int hwc_enumerate_displays(struct hwc_context_t *ctx) {
Sean Paul6a55e9f2015-04-30 15:31:06 -0400795 int ret;
796 for (DrmResources::ConnectorIter c = ctx->drm.begin_connectors();
797 c != ctx->drm.end_connectors(); ++c) {
798 ret = hwc_initialize_display(ctx, (*c)->display());
799 if (ret) {
800 ALOGE("Failed to initialize display %d", (*c)->display());
801 return ret;
Sean Paulef8f1f92015-04-29 16:05:23 -0400802 }
803 }
Sean Paulef8f1f92015-04-29 16:05:23 -0400804
Haixia Shid21f5282015-10-05 14:35:09 -0700805 ret = ctx->virtual_compositor_worker.Init();
806 if (ret) {
807 ALOGE("Failed to initialize virtual compositor worker");
808 return ret;
809 }
Sean Paulef8f1f92015-04-29 16:05:23 -0400810 return 0;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500811}
812
Sean Paulef8f1f92015-04-29 16:05:23 -0400813static int hwc_device_open(const struct hw_module_t *module, const char *name,
814 struct hw_device_t **dev) {
815 if (strcmp(name, HWC_HARDWARE_COMPOSER)) {
816 ALOGE("Invalid module name- %s", name);
817 return -EINVAL;
818 }
819
820 struct hwc_context_t *ctx = new hwc_context_t();
821 if (!ctx) {
822 ALOGE("Failed to allocate hwc context");
823 return -ENOMEM;
824 }
825
Sean Paul6a55e9f2015-04-30 15:31:06 -0400826 int ret = ctx->drm.Init();
827 if (ret) {
828 ALOGE("Can't initialize Drm object %d", ret);
829 delete ctx;
830 return ret;
831 }
832
Zach Reizner4a253652015-09-10 18:30:54 -0700833 ret = hw_get_module(GRALLOC_HARDWARE_MODULE_ID,
834 (const hw_module_t **)&ctx->gralloc);
835 if (ret) {
836 ALOGE("Failed to open gralloc module %d", ret);
837 delete ctx;
838 return ret;
839 }
840
841 ret = ctx->dummy_timeline.Init();
842 if (ret) {
843 ALOGE("Failed to create dummy sw sync timeline %d", ret);
844 return ret;
845 }
846
Sean Paulda6270d2015-06-01 14:11:52 -0400847 ctx->importer = Importer::CreateInstance(&ctx->drm);
848 if (!ctx->importer) {
849 ALOGE("Failed to create importer instance");
Sean Paulef8f1f92015-04-29 16:05:23 -0400850 delete ctx;
851 return ret;
852 }
853
Sean Paulef8f1f92015-04-29 16:05:23 -0400854 ret = hwc_enumerate_displays(ctx);
855 if (ret) {
856 ALOGE("Failed to enumerate displays: %s", strerror(ret));
Sean Paul6a55e9f2015-04-30 15:31:06 -0400857 delete ctx;
858 return ret;
859 }
860
Sean Paulef8f1f92015-04-29 16:05:23 -0400861 ctx->device.common.tag = HARDWARE_DEVICE_TAG;
862 ctx->device.common.version = HWC_DEVICE_API_VERSION_1_4;
863 ctx->device.common.module = const_cast<hw_module_t *>(module);
864 ctx->device.common.close = hwc_device_close;
865
Sean Paul9046c642015-06-10 17:27:47 -0400866 ctx->device.dump = hwc_dump;
Sean Paulef8f1f92015-04-29 16:05:23 -0400867 ctx->device.prepare = hwc_prepare;
868 ctx->device.set = hwc_set;
869 ctx->device.eventControl = hwc_event_control;
870 ctx->device.setPowerMode = hwc_set_power_mode;
871 ctx->device.query = hwc_query;
872 ctx->device.registerProcs = hwc_register_procs;
873 ctx->device.getDisplayConfigs = hwc_get_display_configs;
874 ctx->device.getDisplayAttributes = hwc_get_display_attributes;
875 ctx->device.getActiveConfig = hwc_get_active_config;
876 ctx->device.setActiveConfig = hwc_set_active_config;
877 ctx->device.setCursorPositionAsync = NULL; /* TODO: Add cursor */
878
879 *dev = &ctx->device.common;
880
881 return 0;
882}
Sean Paul6a55e9f2015-04-30 15:31:06 -0400883}
Sean Paulef8f1f92015-04-29 16:05:23 -0400884
Sean Paul6a55e9f2015-04-30 15:31:06 -0400885static struct hw_module_methods_t hwc_module_methods = {
886 open : android::hwc_device_open
887};
Sean Paule0c4c3d2015-01-20 16:56:04 -0500888
889hwc_module_t HAL_MODULE_INFO_SYM = {
Sean Paulef8f1f92015-04-29 16:05:23 -0400890 common : {
891 tag : HARDWARE_MODULE_TAG,
892 version_major : 1,
893 version_minor : 0,
894 id : HWC_HARDWARE_MODULE_ID,
895 name : "DRM hwcomposer module",
896 author : "The Android Open Source Project",
897 methods : &hwc_module_methods,
898 dso : NULL,
899 reserved : {0},
900 }
Sean Paule0c4c3d2015-01-20 16:56:04 -0500901};