blob: 7fec244347e6bb1df94621233bef9120af0fa1b6 [file] [log] [blame]
Sean Paule0c4c3d2015-01-20 16:56:04 -05001/*
2 * Copyright (C) 2015 The Android Open Source Project
3 *
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
7 *
8 * http://www.apache.org/licenses/LICENSE-2.0
9 *
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
15 */
16
Stéphane Marchesinbe98c8c2015-06-23 16:18:10 -070017#define ATRACE_TAG ATRACE_TAG_GRAPHICS
Sean Paule0c4c3d2015-01-20 16:56:04 -050018#define LOG_TAG "hwcomposer-drm"
19
Sean Paulef8f1f92015-04-29 16:05:23 -040020#include "drm_hwcomposer.h"
Sean Paul6a55e9f2015-04-30 15:31:06 -040021#include "drmresources.h"
Sean Paulda6270d2015-06-01 14:11:52 -040022#include "importer.h"
Haixia Shid21f5282015-10-05 14:35:09 -070023#include "virtualcompositorworker.h"
Sean Paul4057be32015-05-13 06:23:09 -070024#include "vsyncworker.h"
Sean Paulef8f1f92015-04-29 16:05:23 -040025
Zach Reizner09807052015-08-13 14:53:41 -070026#include <stdlib.h>
27
28#include <map>
29#include <vector>
Zach Reizner4a253652015-09-10 18:30:54 -070030#include <sstream>
Zach Reizner09807052015-08-13 14:53:41 -070031
Sean Paule0c4c3d2015-01-20 16:56:04 -050032#include <errno.h>
Sean Paulef8f1f92015-04-29 16:05:23 -040033#include <fcntl.h>
Sean Paulef8f1f92015-04-29 16:05:23 -040034#include <pthread.h>
Sean Paule0c4c3d2015-01-20 16:56:04 -050035#include <sys/param.h>
Sean Paul9aa5ad32015-01-22 15:47:54 -050036#include <sys/resource.h>
Sean Paule0c4c3d2015-01-20 16:56:04 -050037#include <xf86drm.h>
38#include <xf86drmMode.h>
Sean Paule0c4c3d2015-01-20 16:56:04 -050039
Sean Paulef8f1f92015-04-29 16:05:23 -040040#include <cutils/log.h>
41#include <cutils/properties.h>
Sean Paule0c4c3d2015-01-20 16:56:04 -050042#include <hardware/hardware.h>
43#include <hardware/hwcomposer.h>
Zach Reizner4a253652015-09-10 18:30:54 -070044#include <sw_sync.h>
45#include <sync/sync.h>
Stéphane Marchesinbe98c8c2015-06-23 16:18:10 -070046#include <utils/Trace.h>
Sean Paule0c4c3d2015-01-20 16:56:04 -050047
Sean Paule0c4c3d2015-01-20 16:56:04 -050048#define UM_PER_INCH 25400
Stéphane Marchesincb3f9842015-06-19 14:50:45 -070049#define HWC_FB_BUFFERS 3
Sean Paule0c4c3d2015-01-20 16:56:04 -050050
Sean Paul6a55e9f2015-04-30 15:31:06 -040051namespace android {
Sean Paule0c4c3d2015-01-20 16:56:04 -050052
Zach Reizner4a253652015-09-10 18:30:54 -070053class DummySwSyncTimeline {
54 public:
55 int Init() {
56 int ret = timeline_fd_.Set(sw_sync_timeline_create());
57 if (ret < 0)
58 return ret;
59 return 0;
60 }
61
62 UniqueFd CreateDummyFence() {
63 int ret = sw_sync_fence_create(timeline_fd_.get(), "dummy fence",
64 timeline_pt_ + 1);
65 if (ret < 0) {
66 ALOGE("Failed to create dummy fence %d", ret);
67 return ret;
68 }
69
70 UniqueFd ret_fd(ret);
71
72 ret = sw_sync_timeline_inc(timeline_fd_.get(), 1);
73 if (ret) {
74 ALOGE("Failed to increment dummy sync timeline %d", ret);
75 return ret;
76 }
77
78 ++timeline_pt_;
79 return ret_fd;
80 }
81
82 private:
83 UniqueFd timeline_fd_;
84 int timeline_pt_ = 0;
85};
86
87struct CheckedOutputFd {
88 CheckedOutputFd(int *fd, const char *description,
89 DummySwSyncTimeline &timeline)
90 : fd_(fd), description_(description), timeline_(timeline) {
91 }
92 CheckedOutputFd(CheckedOutputFd &&rhs)
93 : description_(rhs.description_), timeline_(rhs.timeline_) {
94 std::swap(fd_, rhs.fd_);
95 }
96
97 CheckedOutputFd &operator=(const CheckedOutputFd &rhs) = delete;
98
99 ~CheckedOutputFd() {
100 if (fd_ == NULL)
101 return;
102
103 if (*fd_ >= 0)
104 return;
105
106 *fd_ = timeline_.CreateDummyFence().Release();
107
108 if (*fd_ < 0)
109 ALOGE("Failed to fill %s (%p == %d) before destruction",
110 description_.c_str(), fd_, *fd_);
111 }
112
113 private:
114 int *fd_ = NULL;
115 std::string description_;
116 DummySwSyncTimeline &timeline_;
117};
118
Sean Paule42febf2015-05-07 11:35:29 -0700119typedef struct hwc_drm_display {
Sean Paulef8f1f92015-04-29 16:05:23 -0400120 struct hwc_context_t *ctx;
121 int display;
Sean Paul9aa5ad32015-01-22 15:47:54 -0500122
Sean Paul6a55e9f2015-04-30 15:31:06 -0400123 std::vector<uint32_t> config_ids;
Sean Paul9aa5ad32015-01-22 15:47:54 -0500124
Sean Paul4057be32015-05-13 06:23:09 -0700125 VSyncWorker vsync_worker;
Sean Paule42febf2015-05-07 11:35:29 -0700126} hwc_drm_display_t;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500127
128struct hwc_context_t {
Sean Paule42febf2015-05-07 11:35:29 -0700129 // map of display:hwc_drm_display_t
130 typedef std::map<int, hwc_drm_display_t> DisplayMap;
131 typedef DisplayMap::iterator DisplayMapIter;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500132
Sean Paul6f82f1d2015-10-21 20:05:05 -0400133 hwc_context_t() : procs(NULL), importer(NULL) {
Sean Paulda6270d2015-06-01 14:11:52 -0400134 }
135
136 ~hwc_context_t() {
Haixia Shid21f5282015-10-05 14:35:09 -0700137 virtual_compositor_worker.Exit();
Sean Paulda6270d2015-06-01 14:11:52 -0400138 delete importer;
139 }
140
Sean Paule42febf2015-05-07 11:35:29 -0700141 hwc_composer_device_1_t device;
Sean Paulef8f1f92015-04-29 16:05:23 -0400142 hwc_procs_t const *procs;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500143
Sean Paule42febf2015-05-07 11:35:29 -0700144 DisplayMap displays;
Sean Paul6a55e9f2015-04-30 15:31:06 -0400145 DrmResources drm;
Sean Paulda6270d2015-06-01 14:11:52 -0400146 Importer *importer;
Zach Reizner4a253652015-09-10 18:30:54 -0700147 const gralloc_module_t *gralloc;
148 DummySwSyncTimeline dummy_timeline;
Haixia Shid21f5282015-10-05 14:35:09 -0700149 VirtualCompositorWorker virtual_compositor_worker;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500150};
151
Zach Reizner4a253652015-09-10 18:30:54 -0700152static native_handle_t *dup_buffer_handle(buffer_handle_t handle) {
153 native_handle_t *new_handle =
154 native_handle_create(handle->numFds, handle->numInts);
155 if (new_handle == NULL)
156 return NULL;
157
158 const int *old_data = handle->data;
159 int *new_data = new_handle->data;
160 for (int i = 0; i < handle->numFds; i++) {
161 *new_data = dup(*old_data);
162 old_data++;
163 new_data++;
164 }
165 memcpy(new_data, old_data, sizeof(int) * handle->numInts);
166
167 return new_handle;
168}
169
170static void free_buffer_handle(native_handle_t *handle) {
171 int ret = native_handle_close(handle);
172 if (ret)
173 ALOGE("Failed to close native handle %d", ret);
174 ret = native_handle_delete(handle);
175 if (ret)
176 ALOGE("Failed to delete native handle %d", ret);
177}
178
179OutputFd &OutputFd::operator=(OutputFd &&rhs) {
180 if (fd_ == NULL) {
181 std::swap(fd_, rhs.fd_);
182 } else {
183 if (*fd_ < 0) {
184 ALOGE("Failed to fill OutputFd %p before assignment", fd_);
185 }
186 fd_ = rhs.fd_;
187 rhs.fd_ = NULL;
188 }
189
190 return *this;
191}
192
Zach Reiznerf99d53f2015-10-09 13:02:55 -0700193const hwc_drm_bo *DrmHwcBuffer::operator->() const {
Zach Reizner4a253652015-09-10 18:30:54 -0700194 if (importer_ == NULL) {
Zach Reiznerf99d53f2015-10-09 13:02:55 -0700195 ALOGE("Access of non-existent BO");
Zach Reizner4a253652015-09-10 18:30:54 -0700196 exit(1);
197 return NULL;
198 }
199 return &bo_;
200}
201
202void DrmHwcBuffer::Clear() {
203 if (importer_ != NULL) {
204 importer_->ReleaseBuffer(&bo_);
205 importer_ = NULL;
206 }
207}
208
209int DrmHwcBuffer::ImportBuffer(buffer_handle_t handle, Importer *importer) {
210 hwc_drm_bo tmp_bo;
211
212 int ret = importer->ImportBuffer(handle, &tmp_bo);
213 if (ret)
214 return ret;
215
216 if (importer_ != NULL) {
217 importer_->ReleaseBuffer(&bo_);
218 }
219
220 importer_ = importer;
221
222 bo_ = tmp_bo;
223
224 return 0;
225}
226
227int DrmHwcNativeHandle::CopyBufferHandle(buffer_handle_t handle,
228 const gralloc_module_t *gralloc) {
229 native_handle_t *handle_copy = dup_buffer_handle(handle);
230 if (handle_copy == NULL) {
231 ALOGE("Failed to duplicate handle");
232 return -ENOMEM;
233 }
234
235 int ret = gralloc->registerBuffer(gralloc, handle_copy);
236 if (ret) {
237 ALOGE("Failed to register buffer handle %d", ret);
238 free_buffer_handle(handle_copy);
239 return ret;
240 }
241
242 Clear();
243
244 gralloc_ = gralloc;
245 handle_ = handle_copy;
246
247 return 0;
248}
249
250DrmHwcNativeHandle::~DrmHwcNativeHandle() {
251 Clear();
252}
253
254void DrmHwcNativeHandle::Clear() {
255 if (gralloc_ != NULL && handle_ != NULL) {
256 gralloc_->unregisterBuffer(gralloc_, handle_);
257 free_buffer_handle(handle_);
258 gralloc_ = NULL;
259 handle_ = NULL;
260 }
261}
262
263int DrmHwcLayer::InitFromHwcLayer(hwc_layer_1_t *sf_layer, Importer *importer,
264 const gralloc_module_t *gralloc) {
265 sf_handle = sf_layer->handle;
Zach Reizner4a253652015-09-10 18:30:54 -0700266 alpha = sf_layer->planeAlpha;
267
Zach Reizner7e88be92015-10-12 15:20:33 -0700268 source_crop = DrmHwcRect<float>(
269 sf_layer->sourceCropf.left, sf_layer->sourceCropf.top,
270 sf_layer->sourceCropf.right, sf_layer->sourceCropf.bottom);
271 display_frame = DrmHwcRect<int>(
272 sf_layer->displayFrame.left, sf_layer->displayFrame.top,
273 sf_layer->displayFrame.right, sf_layer->displayFrame.bottom);
274
Zach Reizner4a253652015-09-10 18:30:54 -0700275 switch (sf_layer->transform) {
276 case 0:
277 transform = DrmHwcTransform::kIdentity;
278 break;
279 case HWC_TRANSFORM_FLIP_H:
280 transform = DrmHwcTransform::kFlipH;
281 break;
282 case HWC_TRANSFORM_FLIP_V:
283 transform = DrmHwcTransform::kFlipV;
284 break;
285 case HWC_TRANSFORM_ROT_90:
286 transform = DrmHwcTransform::kRotate90;
287 break;
288 case HWC_TRANSFORM_ROT_180:
289 transform = DrmHwcTransform::kRotate180;
290 break;
291 case HWC_TRANSFORM_ROT_270:
292 transform = DrmHwcTransform::kRotate270;
293 break;
294 default:
295 ALOGE("Invalid transform in hwc_layer_1_t %d", sf_layer->transform);
296 return -EINVAL;
297 }
298
299 switch (sf_layer->blending) {
300 case HWC_BLENDING_NONE:
301 blending = DrmHwcBlending::kNone;
302 break;
303 case HWC_BLENDING_PREMULT:
304 blending = DrmHwcBlending::kPreMult;
305 break;
306 case HWC_BLENDING_COVERAGE:
307 blending = DrmHwcBlending::kCoverage;
308 break;
309 default:
310 ALOGE("Invalid blending in hwc_layer_1_t %d", sf_layer->blending);
311 return -EINVAL;
312 }
313
Zach Reizner7e88be92015-10-12 15:20:33 -0700314 int ret = buffer.ImportBuffer(sf_layer->handle, importer);
315 if (ret)
316 return ret;
317
318 ret = handle.CopyBufferHandle(sf_layer->handle, gralloc);
319 if (ret)
320 return ret;
Zach Reizner4a253652015-09-10 18:30:54 -0700321
322 return 0;
323}
324
Zach Reiznerc6520e42015-08-13 14:32:09 -0700325static void hwc_dump(struct hwc_composer_device_1 *dev, char *buff,
Sean Paul9046c642015-06-10 17:27:47 -0400326 int buff_len) {
327 struct hwc_context_t *ctx = (struct hwc_context_t *)&dev->common;
328 std::ostringstream out;
329
330 ctx->drm.compositor()->Dump(&out);
331 std::string out_str = out.str();
Zach Reiznerfd6dc332015-10-13 21:12:48 -0700332 strncpy(buff, out_str.c_str(),
333 std::min((size_t)buff_len, out_str.length() + 1));
334 buff[buff_len - 1] = '\0';
Sean Paul9046c642015-06-10 17:27:47 -0400335}
336
Sean Paulb386f1b2015-05-13 06:33:23 -0700337static int hwc_prepare(hwc_composer_device_1_t *dev, size_t num_displays,
Sean Paulef8f1f92015-04-29 16:05:23 -0400338 hwc_display_contents_1_t **display_contents) {
Sean Paulb386f1b2015-05-13 06:33:23 -0700339 struct hwc_context_t *ctx = (struct hwc_context_t *)&dev->common;
Zach Reizner1946fa72015-08-14 11:14:38 -0700340
Sean Paule42febf2015-05-07 11:35:29 -0700341 for (int i = 0; i < (int)num_displays; ++i) {
Sean Paulef8f1f92015-04-29 16:05:23 -0400342 if (!display_contents[i])
343 continue;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500344
Sean Paul6f82f1d2015-10-21 20:05:05 -0400345 bool use_framebuffer_target = false;
Haixia Shid21f5282015-10-05 14:35:09 -0700346 if (i == HWC_DISPLAY_VIRTUAL) {
347 use_framebuffer_target = true;
348 } else {
349 DrmCrtc *crtc = ctx->drm.GetCrtcForDisplay(i);
350 if (!crtc) {
351 ALOGE("No crtc for display %d", i);
352 return -ENODEV;
353 }
Sean Paulb386f1b2015-05-13 06:33:23 -0700354 }
Sean Paulb386f1b2015-05-13 06:33:23 -0700355
Zach Reizner45624d32015-06-10 16:03:01 -0700356 int num_layers = display_contents[i]->numHwLayers;
357 for (int j = 0; j < num_layers; j++) {
Sean Paulb386f1b2015-05-13 06:33:23 -0700358 hwc_layer_1_t *layer = &display_contents[i]->hwLayers[j];
Zach Reizner45624d32015-06-10 16:03:01 -0700359
Haixia Shid21f5282015-10-05 14:35:09 -0700360 if (!use_framebuffer_target) {
Zach Reizner1946fa72015-08-14 11:14:38 -0700361 if (layer->compositionType == HWC_FRAMEBUFFER)
362 layer->compositionType = HWC_OVERLAY;
363 } else {
364 switch (layer->compositionType) {
365 case HWC_OVERLAY:
366 case HWC_BACKGROUND:
367 case HWC_SIDEBAND:
368 case HWC_CURSOR_OVERLAY:
369 layer->compositionType = HWC_FRAMEBUFFER;
370 break;
371 }
372 }
Sean Paulef8f1f92015-04-29 16:05:23 -0400373 }
374 }
Sean Pauldffca952015-02-04 10:19:55 -0800375
Sean Paulef8f1f92015-04-29 16:05:23 -0400376 return 0;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500377}
378
Zach Reizner09807052015-08-13 14:53:41 -0700379static void hwc_add_layer_to_retire_fence(
380 hwc_layer_1_t *layer, hwc_display_contents_1_t *display_contents) {
Sean Paul04206122015-07-16 15:59:24 -0400381 if (layer->releaseFenceFd < 0)
382 return;
383
384 if (display_contents->retireFenceFd >= 0) {
385 int old_retire_fence = display_contents->retireFenceFd;
Zach Reiznerc6520e42015-08-13 14:32:09 -0700386 display_contents->retireFenceFd =
387 sync_merge("dc_retire", old_retire_fence, layer->releaseFenceFd);
Sean Paul04206122015-07-16 15:59:24 -0400388 close(old_retire_fence);
389 } else {
390 display_contents->retireFenceFd = dup(layer->releaseFenceFd);
391 }
392}
393
Sean Paule0c4c3d2015-01-20 16:56:04 -0500394static int hwc_set(hwc_composer_device_1_t *dev, size_t num_displays,
Zach Reizner4a253652015-09-10 18:30:54 -0700395 hwc_display_contents_1_t **sf_display_contents) {
Stéphane Marchesinbe98c8c2015-06-23 16:18:10 -0700396 ATRACE_CALL();
Sean Paulef8f1f92015-04-29 16:05:23 -0400397 struct hwc_context_t *ctx = (struct hwc_context_t *)&dev->common;
Zach Reizner4a253652015-09-10 18:30:54 -0700398 int ret = 0;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500399
Zach Reizner4a253652015-09-10 18:30:54 -0700400 std::vector<CheckedOutputFd> checked_output_fences;
401 std::vector<DrmHwcDisplayContents> displays_contents;
Zach Reizner09807052015-08-13 14:53:41 -0700402 std::vector<DrmCompositionDisplayLayersMap> layers_map;
403 std::vector<std::vector<size_t>> layers_indices;
Zach Reizner4a253652015-09-10 18:30:54 -0700404 displays_contents.reserve(num_displays);
405 // layers_map.reserve(num_displays);
Zach Reizner09807052015-08-13 14:53:41 -0700406 layers_indices.reserve(num_displays);
407
Zach Reizner4a253652015-09-10 18:30:54 -0700408 // Phase one does nothing that would cause errors. Only take ownership of FDs.
409 for (size_t i = 0; i < num_displays; ++i) {
410 hwc_display_contents_1_t *dc = sf_display_contents[i];
411 displays_contents.emplace_back();
412 DrmHwcDisplayContents &display_contents = displays_contents.back();
Haixia Shi7acc59b2015-09-30 10:57:54 -0700413 layers_indices.emplace_back();
414 std::vector<size_t> &indices_to_composite = layers_indices.back();
Zach Reizner4a253652015-09-10 18:30:54 -0700415
416 if (!sf_display_contents[i])
Sean Paulb386f1b2015-05-13 06:33:23 -0700417 continue;
Zach Reizner09807052015-08-13 14:53:41 -0700418
Haixia Shid21f5282015-10-05 14:35:09 -0700419 if (i == HWC_DISPLAY_VIRTUAL) {
420 ctx->virtual_compositor_worker.QueueComposite(dc);
421 continue;
422 }
423
Zach Reizner4a253652015-09-10 18:30:54 -0700424 std::ostringstream display_index_formatter;
425 display_index_formatter << "retire fence for display " << i;
426 std::string display_fence_description(display_index_formatter.str());
427 checked_output_fences.emplace_back(&dc->retireFenceFd,
428 display_fence_description.c_str(),
429 ctx->dummy_timeline);
430 display_contents.retire_fence = OutputFd(&dc->retireFenceFd);
Zach Reizner09807052015-08-13 14:53:41 -0700431
Zach Reizner4a253652015-09-10 18:30:54 -0700432 size_t num_dc_layers = dc->numHwLayers;
Haixia Shi1034bb72015-09-09 12:08:20 -0700433 int framebuffer_target_index = -1;
Zach Reizner4a253652015-09-10 18:30:54 -0700434 for (size_t j = 0; j < num_dc_layers; ++j) {
435 hwc_layer_1_t *sf_layer = &dc->hwLayers[j];
436
437 display_contents.layers.emplace_back();
438 DrmHwcLayer &layer = display_contents.layers.back();
439
440 if (sf_layer->flags & HWC_SKIP_LAYER)
Sean Paulb386f1b2015-05-13 06:33:23 -0700441 continue;
Zach Reizner4a253652015-09-10 18:30:54 -0700442
Sean Paul6f82f1d2015-10-21 20:05:05 -0400443 if (sf_layer->compositionType == HWC_OVERLAY)
444 indices_to_composite.push_back(j);
445 if (sf_layer->compositionType == HWC_FRAMEBUFFER_TARGET)
446 framebuffer_target_index = j;
Zach Reizner4a253652015-09-10 18:30:54 -0700447
448 layer.acquire_fence.Set(sf_layer->acquireFenceFd);
449 sf_layer->acquireFenceFd = -1;
450
451 std::ostringstream layer_fence_formatter;
452 layer_fence_formatter << "release fence for layer " << j << " of display "
453 << i;
454 std::string layer_fence_description(layer_fence_formatter.str());
455 checked_output_fences.emplace_back(&sf_layer->releaseFenceFd,
456 layer_fence_description.c_str(),
457 ctx->dummy_timeline);
458 layer.release_fence = OutputFd(&sf_layer->releaseFenceFd);
Zach Reizner1946fa72015-08-14 11:14:38 -0700459 }
Zach Reizner4a253652015-09-10 18:30:54 -0700460
Sean Paul6f82f1d2015-10-21 20:05:05 -0400461 if (indices_to_composite.empty() && framebuffer_target_index >= 0) {
462 hwc_layer_1_t *sf_layer = &dc->hwLayers[framebuffer_target_index];
463 if (!sf_layer->handle || (sf_layer->flags & HWC_SKIP_LAYER)) {
464 ALOGE(
465 "Expected valid layer with HWC_FRAMEBUFFER_TARGET when all "
466 "HWC_OVERLAY layers are skipped.");
Zach Reizner4a253652015-09-10 18:30:54 -0700467 ret = -EINVAL;
Zach Reizner1946fa72015-08-14 11:14:38 -0700468 }
Sean Paul6f82f1d2015-10-21 20:05:05 -0400469 indices_to_composite.push_back(framebuffer_target_index);
Zach Reizner45624d32015-06-10 16:03:01 -0700470 }
Zach Reizner4a253652015-09-10 18:30:54 -0700471 }
Zach Reizner45624d32015-06-10 16:03:01 -0700472
Zach Reizner4a253652015-09-10 18:30:54 -0700473 if (ret)
474 return ret;
475
476 for (size_t i = 0; i < num_displays; ++i) {
477 hwc_display_contents_1_t *dc = sf_display_contents[i];
478 DrmHwcDisplayContents &display_contents = displays_contents[i];
Haixia Shi2fddd372015-10-15 16:21:48 -0700479 if (!sf_display_contents[i] || i == HWC_DISPLAY_VIRTUAL)
Zach Reizner4a253652015-09-10 18:30:54 -0700480 continue;
481
482 layers_map.emplace_back();
483 DrmCompositionDisplayLayersMap &map = layers_map.back();
Zach Reizneracba14b2015-10-13 18:19:26 -0700484 map.display = i;
Zach Reizner5757e822015-10-16 19:06:31 -0700485 map.geometry_changed =
486 (dc->flags & HWC_GEOMETRY_CHANGED) == HWC_GEOMETRY_CHANGED;
Zach Reizner4a253652015-09-10 18:30:54 -0700487 std::vector<size_t> &indices_to_composite = layers_indices[i];
488 for (size_t j : indices_to_composite) {
489 hwc_layer_1_t *sf_layer = &dc->hwLayers[j];
490
491 DrmHwcLayer &layer = display_contents.layers[j];
492
Zach Reizner7e88be92015-10-12 15:20:33 -0700493 ret = layer.InitFromHwcLayer(sf_layer, ctx->importer, ctx->gralloc);
494 if (ret) {
495 ALOGE("Failed to init composition from layer %d", ret);
496 return ret;
497 }
Zach Reizner4a253652015-09-10 18:30:54 -0700498 map.layers.emplace_back(std::move(layer));
499 }
500 }
501
502 std::unique_ptr<DrmComposition> composition(
503 ctx->drm.compositor()->CreateComposition(ctx->importer));
504 if (!composition) {
505 ALOGE("Drm composition init failed");
506 return -EINVAL;
Zach Reizner09807052015-08-13 14:53:41 -0700507 }
Zach Reizner45624d32015-06-10 16:03:01 -0700508
Zach Reizner09807052015-08-13 14:53:41 -0700509 ret = composition->SetLayers(layers_map.size(), layers_map.data());
510 if (ret) {
Zach Reizner09807052015-08-13 14:53:41 -0700511 return -EINVAL;
512 }
Zach Reizner45624d32015-06-10 16:03:01 -0700513
Zach Reizner09807052015-08-13 14:53:41 -0700514 ret = ctx->drm.compositor()->QueueComposition(std::move(composition));
515 if (ret) {
Zach Reizner09807052015-08-13 14:53:41 -0700516 return -EINVAL;
517 }
518
Zach Reizner566da2b2015-10-06 15:39:09 -0700519 for (size_t i = 0; i < num_displays; ++i) {
520 hwc_display_contents_1_t *dc = sf_display_contents[i];
521 if (!dc)
522 continue;
523
524 size_t num_dc_layers = dc->numHwLayers;
525 for (size_t j = 0; j < num_dc_layers; ++j) {
526 hwc_layer_1_t *layer = &dc->hwLayers[j];
527 if (layer->flags & HWC_SKIP_LAYER)
528 continue;
529 hwc_add_layer_to_retire_fence(layer, dc);
530 }
531 }
532
Zach Reizner09807052015-08-13 14:53:41 -0700533 composition.reset(NULL);
534
Sean Paulef8f1f92015-04-29 16:05:23 -0400535 return ret;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500536}
537
Sean Paulef8f1f92015-04-29 16:05:23 -0400538static int hwc_event_control(struct hwc_composer_device_1 *dev, int display,
539 int event, int enabled) {
Sean Paulef8f1f92015-04-29 16:05:23 -0400540 if (event != HWC_EVENT_VSYNC || (enabled != 0 && enabled != 1))
541 return -EINVAL;
Sean Pauleb9e75c2015-01-25 23:31:30 -0500542
Sean Paul4057be32015-05-13 06:23:09 -0700543 struct hwc_context_t *ctx = (struct hwc_context_t *)&dev->common;
544 hwc_drm_display_t *hd = &ctx->displays[display];
545 return hd->vsync_worker.VSyncControl(enabled);
Sean Paule0c4c3d2015-01-20 16:56:04 -0500546}
547
Sean Paulef8f1f92015-04-29 16:05:23 -0400548static int hwc_set_power_mode(struct hwc_composer_device_1 *dev, int display,
549 int mode) {
550 struct hwc_context_t *ctx = (struct hwc_context_t *)&dev->common;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500551
Sean Paul6a55e9f2015-04-30 15:31:06 -0400552 uint64_t dpmsValue = 0;
Sean Paulef8f1f92015-04-29 16:05:23 -0400553 switch (mode) {
554 case HWC_POWER_MODE_OFF:
Sean Paul6a55e9f2015-04-30 15:31:06 -0400555 dpmsValue = DRM_MODE_DPMS_OFF;
Sean Paulef8f1f92015-04-29 16:05:23 -0400556 break;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500557
Sean Paulef8f1f92015-04-29 16:05:23 -0400558 /* We can't support dozing right now, so go full on */
559 case HWC_POWER_MODE_DOZE:
560 case HWC_POWER_MODE_DOZE_SUSPEND:
561 case HWC_POWER_MODE_NORMAL:
Sean Paul6a55e9f2015-04-30 15:31:06 -0400562 dpmsValue = DRM_MODE_DPMS_ON;
Sean Paulef8f1f92015-04-29 16:05:23 -0400563 break;
564 };
Sean Paul6a55e9f2015-04-30 15:31:06 -0400565 return ctx->drm.SetDpmsMode(display, dpmsValue);
Sean Paule0c4c3d2015-01-20 16:56:04 -0500566}
567
Sean Paulef8f1f92015-04-29 16:05:23 -0400568static int hwc_query(struct hwc_composer_device_1 * /* dev */, int what,
569 int *value) {
570 switch (what) {
571 case HWC_BACKGROUND_LAYER_SUPPORTED:
572 *value = 0; /* TODO: We should do this */
573 break;
574 case HWC_VSYNC_PERIOD:
575 ALOGW("Query for deprecated vsync value, returning 60Hz");
576 *value = 1000 * 1000 * 1000 / 60;
577 break;
578 case HWC_DISPLAY_TYPES_SUPPORTED:
Haixia Shi2fddd372015-10-15 16:21:48 -0700579 *value = HWC_DISPLAY_PRIMARY_BIT | HWC_DISPLAY_EXTERNAL_BIT |
580 HWC_DISPLAY_VIRTUAL_BIT;
Sean Paulef8f1f92015-04-29 16:05:23 -0400581 break;
582 }
583 return 0;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500584}
585
Sean Paulef8f1f92015-04-29 16:05:23 -0400586static void hwc_register_procs(struct hwc_composer_device_1 *dev,
587 hwc_procs_t const *procs) {
588 struct hwc_context_t *ctx = (struct hwc_context_t *)&dev->common;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500589
Sean Paulef8f1f92015-04-29 16:05:23 -0400590 ctx->procs = procs;
Sean Paul4057be32015-05-13 06:23:09 -0700591
592 for (hwc_context_t::DisplayMapIter iter = ctx->displays.begin();
593 iter != ctx->displays.end(); ++iter) {
594 iter->second.vsync_worker.SetProcs(procs);
595 }
Sean Paule0c4c3d2015-01-20 16:56:04 -0500596}
597
Sean Paulef8f1f92015-04-29 16:05:23 -0400598static int hwc_get_display_configs(struct hwc_composer_device_1 *dev,
599 int display, uint32_t *configs,
Sean Paul6a55e9f2015-04-30 15:31:06 -0400600 size_t *num_configs) {
601 if (!*num_configs)
Sean Paulef8f1f92015-04-29 16:05:23 -0400602 return 0;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500603
Sean Paulef8f1f92015-04-29 16:05:23 -0400604 struct hwc_context_t *ctx = (struct hwc_context_t *)&dev->common;
Sean Paule42febf2015-05-07 11:35:29 -0700605 hwc_drm_display_t *hd = &ctx->displays[display];
Sean Paul6a55e9f2015-04-30 15:31:06 -0400606 hd->config_ids.clear();
607
608 DrmConnector *connector = ctx->drm.GetConnectorForDisplay(display);
609 if (!connector) {
610 ALOGE("Failed to get connector for display %d", display);
Sean Paulef8f1f92015-04-29 16:05:23 -0400611 return -ENODEV;
612 }
Sean Paule0c4c3d2015-01-20 16:56:04 -0500613
Sean Paule42febf2015-05-07 11:35:29 -0700614 int ret = connector->UpdateModes();
Sean Paul6a55e9f2015-04-30 15:31:06 -0400615 if (ret) {
616 ALOGE("Failed to update display modes %d", ret);
Sean Paulef8f1f92015-04-29 16:05:23 -0400617 return ret;
Sean Paulef8f1f92015-04-29 16:05:23 -0400618 }
Sean Paule0c4c3d2015-01-20 16:56:04 -0500619
Sean Paul6a55e9f2015-04-30 15:31:06 -0400620 for (DrmConnector::ModeIter iter = connector->begin_modes();
621 iter != connector->end_modes(); ++iter) {
622 size_t idx = hd->config_ids.size();
623 if (idx == *num_configs)
624 break;
625 hd->config_ids.push_back(iter->id());
626 configs[idx] = iter->id();
627 }
628 *num_configs = hd->config_ids.size();
629 return *num_configs == 0 ? -1 : 0;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500630}
631
Sean Paulef8f1f92015-04-29 16:05:23 -0400632static int hwc_get_display_attributes(struct hwc_composer_device_1 *dev,
633 int display, uint32_t config,
634 const uint32_t *attributes,
635 int32_t *values) {
636 struct hwc_context_t *ctx = (struct hwc_context_t *)&dev->common;
Sean Paul6a55e9f2015-04-30 15:31:06 -0400637 DrmConnector *c = ctx->drm.GetConnectorForDisplay(display);
Sean Paulef8f1f92015-04-29 16:05:23 -0400638 if (!c) {
Sean Paul6a55e9f2015-04-30 15:31:06 -0400639 ALOGE("Failed to get DrmConnector for display %d", display);
Sean Paulef8f1f92015-04-29 16:05:23 -0400640 return -ENODEV;
641 }
Sean Paul6a55e9f2015-04-30 15:31:06 -0400642 DrmMode mode;
643 for (DrmConnector::ModeIter iter = c->begin_modes(); iter != c->end_modes();
644 ++iter) {
645 if (iter->id() == config) {
646 mode = *iter;
647 break;
648 }
649 }
650 if (mode.id() == 0) {
651 ALOGE("Failed to find active mode for display %d", display);
652 return -ENOENT;
Sean Paulef8f1f92015-04-29 16:05:23 -0400653 }
Sean Paule0c4c3d2015-01-20 16:56:04 -0500654
Sean Paul6a55e9f2015-04-30 15:31:06 -0400655 uint32_t mm_width = c->mm_width();
656 uint32_t mm_height = c->mm_height();
Sean Paulef8f1f92015-04-29 16:05:23 -0400657 for (int i = 0; attributes[i] != HWC_DISPLAY_NO_ATTRIBUTE; ++i) {
658 switch (attributes[i]) {
659 case HWC_DISPLAY_VSYNC_PERIOD:
Sean Paul6a55e9f2015-04-30 15:31:06 -0400660 values[i] = 1000 * 1000 * 1000 / mode.v_refresh();
Sean Paulef8f1f92015-04-29 16:05:23 -0400661 break;
662 case HWC_DISPLAY_WIDTH:
Sean Paul6a55e9f2015-04-30 15:31:06 -0400663 values[i] = mode.h_display();
Sean Paulef8f1f92015-04-29 16:05:23 -0400664 break;
665 case HWC_DISPLAY_HEIGHT:
Sean Paul6a55e9f2015-04-30 15:31:06 -0400666 values[i] = mode.v_display();
Sean Paulef8f1f92015-04-29 16:05:23 -0400667 break;
668 case HWC_DISPLAY_DPI_X:
669 /* Dots per 1000 inches */
Sean Paul6a55e9f2015-04-30 15:31:06 -0400670 values[i] = mm_width ? (mode.h_display() * UM_PER_INCH) / mm_width : 0;
Sean Paulef8f1f92015-04-29 16:05:23 -0400671 break;
672 case HWC_DISPLAY_DPI_Y:
673 /* Dots per 1000 inches */
Sean Paul6a55e9f2015-04-30 15:31:06 -0400674 values[i] =
675 mm_height ? (mode.v_display() * UM_PER_INCH) / mm_height : 0;
Sean Paulef8f1f92015-04-29 16:05:23 -0400676 break;
677 }
678 }
Sean Paulef8f1f92015-04-29 16:05:23 -0400679 return 0;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500680}
681
Sean Paulef8f1f92015-04-29 16:05:23 -0400682static int hwc_get_active_config(struct hwc_composer_device_1 *dev,
683 int display) {
684 struct hwc_context_t *ctx = (struct hwc_context_t *)&dev->common;
Sean Paul6a55e9f2015-04-30 15:31:06 -0400685 DrmConnector *c = ctx->drm.GetConnectorForDisplay(display);
686 if (!c) {
687 ALOGE("Failed to get DrmConnector for display %d", display);
Sean Paulef8f1f92015-04-29 16:05:23 -0400688 return -ENODEV;
689 }
Sean Paule0c4c3d2015-01-20 16:56:04 -0500690
Sean Paul6a55e9f2015-04-30 15:31:06 -0400691 DrmMode mode = c->active_mode();
Sean Paule42febf2015-05-07 11:35:29 -0700692 hwc_drm_display_t *hd = &ctx->displays[display];
Sean Paul6a55e9f2015-04-30 15:31:06 -0400693 for (size_t i = 0; i < hd->config_ids.size(); ++i) {
694 if (hd->config_ids[i] == mode.id())
695 return i;
Sean Paulef8f1f92015-04-29 16:05:23 -0400696 }
Sean Paul6a55e9f2015-04-30 15:31:06 -0400697 return -1;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500698}
699
Sean Paulef8f1f92015-04-29 16:05:23 -0400700static int hwc_set_active_config(struct hwc_composer_device_1 *dev, int display,
701 int index) {
702 struct hwc_context_t *ctx = (struct hwc_context_t *)&dev->common;
Sean Paule42febf2015-05-07 11:35:29 -0700703 hwc_drm_display_t *hd = &ctx->displays[display];
Sean Paul6a55e9f2015-04-30 15:31:06 -0400704 if (index >= (int)hd->config_ids.size()) {
705 ALOGE("Invalid config index %d passed in", index);
706 return -EINVAL;
Sean Paulef8f1f92015-04-29 16:05:23 -0400707 }
Sean Paule0c4c3d2015-01-20 16:56:04 -0500708
Sean Paul877be972015-06-03 14:08:27 -0400709 DrmConnector *c = ctx->drm.GetConnectorForDisplay(display);
710 if (!c) {
711 ALOGE("Failed to get connector for display %d", display);
712 return -ENODEV;
713 }
714 DrmMode mode;
715 for (DrmConnector::ModeIter iter = c->begin_modes(); iter != c->end_modes();
716 ++iter) {
717 if (iter->id() == hd->config_ids[index]) {
718 mode = *iter;
719 break;
720 }
721 }
722 if (mode.id() != hd->config_ids[index]) {
723 ALOGE("Could not find active mode for %d/%d", index, hd->config_ids[index]);
724 return -ENOENT;
725 }
726 int ret = ctx->drm.SetDisplayActiveMode(display, mode);
Sean Paul6a55e9f2015-04-30 15:31:06 -0400727 if (ret) {
Sean Paul877be972015-06-03 14:08:27 -0400728 ALOGE("Failed to set active config %d", ret);
Sean Paul6a55e9f2015-04-30 15:31:06 -0400729 return ret;
Sean Paulef8f1f92015-04-29 16:05:23 -0400730 }
Sean Paul6a55e9f2015-04-30 15:31:06 -0400731 return ret;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500732}
733
Sean Paulef8f1f92015-04-29 16:05:23 -0400734static int hwc_device_close(struct hw_device_t *dev) {
735 struct hwc_context_t *ctx = (struct hwc_context_t *)dev;
Sean Paulef8f1f92015-04-29 16:05:23 -0400736 delete ctx;
Sean Paulef8f1f92015-04-29 16:05:23 -0400737 return 0;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500738}
739
Sean Paul24a26e32015-02-04 10:34:47 -0800740/*
741 * TODO: This function sets the active config to the first one in the list. This
742 * should be fixed such that it selects the preferred mode for the display, or
743 * some other, saner, method of choosing the config.
744 */
Sean Paule42febf2015-05-07 11:35:29 -0700745static int hwc_set_initial_config(hwc_drm_display_t *hd) {
Sean Paulef8f1f92015-04-29 16:05:23 -0400746 uint32_t config;
747 size_t num_configs = 1;
748 int ret = hwc_get_display_configs(&hd->ctx->device, hd->display, &config,
749 &num_configs);
750 if (ret || !num_configs)
751 return 0;
Sean Paul24a26e32015-02-04 10:34:47 -0800752
Sean Paulef8f1f92015-04-29 16:05:23 -0400753 ret = hwc_set_active_config(&hd->ctx->device, hd->display, 0);
754 if (ret) {
755 ALOGE("Failed to set active config d=%d ret=%d", hd->display, ret);
756 return ret;
757 }
Sean Paul24a26e32015-02-04 10:34:47 -0800758
Sean Paulef8f1f92015-04-29 16:05:23 -0400759 return ret;
Sean Paul24a26e32015-02-04 10:34:47 -0800760}
761
Sean Paul6a55e9f2015-04-30 15:31:06 -0400762static int hwc_initialize_display(struct hwc_context_t *ctx, int display) {
Sean Paule42febf2015-05-07 11:35:29 -0700763 hwc_drm_display_t *hd = &ctx->displays[display];
Sean Paulef8f1f92015-04-29 16:05:23 -0400764 hd->ctx = ctx;
765 hd->display = display;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500766
Sean Paulb386f1b2015-05-13 06:33:23 -0700767 int ret = hwc_set_initial_config(hd);
Sean Paulef8f1f92015-04-29 16:05:23 -0400768 if (ret) {
769 ALOGE("Failed to set initial config for d=%d ret=%d", display, ret);
Sean Paulef8f1f92015-04-29 16:05:23 -0400770 return ret;
771 }
Sean Paul24a26e32015-02-04 10:34:47 -0800772
Sean Paul4057be32015-05-13 06:23:09 -0700773 ret = hd->vsync_worker.Init(&ctx->drm, display);
774 if (ret) {
775 ALOGE("Failed to create event worker for display %d %d\n", display, ret);
776 return ret;
777 }
778
Sean Paulef8f1f92015-04-29 16:05:23 -0400779 return 0;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500780}
781
Sean Paulef8f1f92015-04-29 16:05:23 -0400782static int hwc_enumerate_displays(struct hwc_context_t *ctx) {
Sean Paul6a55e9f2015-04-30 15:31:06 -0400783 int ret;
784 for (DrmResources::ConnectorIter c = ctx->drm.begin_connectors();
785 c != ctx->drm.end_connectors(); ++c) {
786 ret = hwc_initialize_display(ctx, (*c)->display());
787 if (ret) {
788 ALOGE("Failed to initialize display %d", (*c)->display());
789 return ret;
Sean Paulef8f1f92015-04-29 16:05:23 -0400790 }
791 }
Sean Paulef8f1f92015-04-29 16:05:23 -0400792
Haixia Shid21f5282015-10-05 14:35:09 -0700793 ret = ctx->virtual_compositor_worker.Init();
794 if (ret) {
795 ALOGE("Failed to initialize virtual compositor worker");
796 return ret;
797 }
Sean Paulef8f1f92015-04-29 16:05:23 -0400798 return 0;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500799}
800
Sean Paulef8f1f92015-04-29 16:05:23 -0400801static int hwc_device_open(const struct hw_module_t *module, const char *name,
802 struct hw_device_t **dev) {
803 if (strcmp(name, HWC_HARDWARE_COMPOSER)) {
804 ALOGE("Invalid module name- %s", name);
805 return -EINVAL;
806 }
807
808 struct hwc_context_t *ctx = new hwc_context_t();
809 if (!ctx) {
810 ALOGE("Failed to allocate hwc context");
811 return -ENOMEM;
812 }
813
Sean Paul6a55e9f2015-04-30 15:31:06 -0400814 int ret = ctx->drm.Init();
815 if (ret) {
816 ALOGE("Can't initialize Drm object %d", ret);
817 delete ctx;
818 return ret;
819 }
820
Zach Reizner4a253652015-09-10 18:30:54 -0700821 ret = hw_get_module(GRALLOC_HARDWARE_MODULE_ID,
822 (const hw_module_t **)&ctx->gralloc);
823 if (ret) {
824 ALOGE("Failed to open gralloc module %d", ret);
825 delete ctx;
826 return ret;
827 }
828
829 ret = ctx->dummy_timeline.Init();
830 if (ret) {
831 ALOGE("Failed to create dummy sw sync timeline %d", ret);
832 return ret;
833 }
834
Sean Paulda6270d2015-06-01 14:11:52 -0400835 ctx->importer = Importer::CreateInstance(&ctx->drm);
836 if (!ctx->importer) {
837 ALOGE("Failed to create importer instance");
Sean Paulef8f1f92015-04-29 16:05:23 -0400838 delete ctx;
839 return ret;
840 }
841
Sean Paulef8f1f92015-04-29 16:05:23 -0400842 ret = hwc_enumerate_displays(ctx);
843 if (ret) {
844 ALOGE("Failed to enumerate displays: %s", strerror(ret));
Sean Paul6a55e9f2015-04-30 15:31:06 -0400845 delete ctx;
846 return ret;
847 }
848
Sean Paulef8f1f92015-04-29 16:05:23 -0400849 ctx->device.common.tag = HARDWARE_DEVICE_TAG;
850 ctx->device.common.version = HWC_DEVICE_API_VERSION_1_4;
851 ctx->device.common.module = const_cast<hw_module_t *>(module);
852 ctx->device.common.close = hwc_device_close;
853
Sean Paul9046c642015-06-10 17:27:47 -0400854 ctx->device.dump = hwc_dump;
Sean Paulef8f1f92015-04-29 16:05:23 -0400855 ctx->device.prepare = hwc_prepare;
856 ctx->device.set = hwc_set;
857 ctx->device.eventControl = hwc_event_control;
858 ctx->device.setPowerMode = hwc_set_power_mode;
859 ctx->device.query = hwc_query;
860 ctx->device.registerProcs = hwc_register_procs;
861 ctx->device.getDisplayConfigs = hwc_get_display_configs;
862 ctx->device.getDisplayAttributes = hwc_get_display_attributes;
863 ctx->device.getActiveConfig = hwc_get_active_config;
864 ctx->device.setActiveConfig = hwc_set_active_config;
865 ctx->device.setCursorPositionAsync = NULL; /* TODO: Add cursor */
866
867 *dev = &ctx->device.common;
868
869 return 0;
870}
Sean Paul6a55e9f2015-04-30 15:31:06 -0400871}
Sean Paulef8f1f92015-04-29 16:05:23 -0400872
Sean Paul6a55e9f2015-04-30 15:31:06 -0400873static struct hw_module_methods_t hwc_module_methods = {
874 open : android::hwc_device_open
875};
Sean Paule0c4c3d2015-01-20 16:56:04 -0500876
877hwc_module_t HAL_MODULE_INFO_SYM = {
Sean Paulef8f1f92015-04-29 16:05:23 -0400878 common : {
879 tag : HARDWARE_MODULE_TAG,
880 version_major : 1,
881 version_minor : 0,
882 id : HWC_HARDWARE_MODULE_ID,
883 name : "DRM hwcomposer module",
884 author : "The Android Open Source Project",
885 methods : &hwc_module_methods,
886 dso : NULL,
887 reserved : {0},
888 }
Sean Paule0c4c3d2015-01-20 16:56:04 -0500889};