blob: 8fccdaf15bbbcbd7e5650b087f7c8a1c6e23849b [file] [log] [blame]
Elliott Hughes180edef2023-11-02 00:08:05 +00001/*
2 * This file is auto-generated. Modifications will be lost.
3 *
4 * See https://android.googlesource.com/platform/bionic/+/master/libc/kernel/
5 * for more information.
6 */
Ben Cheng655a7c02013-10-16 16:09:24 -07007#ifndef _DRM_MODE_H
8#define _DRM_MODE_H
Christopher Ferris106b3a82016-08-24 12:15:38 -07009#include "drm.h"
10#ifdef __cplusplus
Christopher Ferris48fe0ae2019-01-10 15:59:33 -080011extern "C" {
Christopher Ferris106b3a82016-08-24 12:15:38 -070012#endif
Ben Cheng655a7c02013-10-16 16:09:24 -070013#define DRM_CONNECTOR_NAME_LEN 32
14#define DRM_DISPLAY_MODE_LEN 32
15#define DRM_PROP_NAME_LEN 32
Tao Baod7db5942015-01-28 10:07:51 -080016#define DRM_MODE_TYPE_BUILTIN (1 << 0)
Tao Baod7db5942015-01-28 10:07:51 -080017#define DRM_MODE_TYPE_CLOCK_C ((1 << 1) | DRM_MODE_TYPE_BUILTIN)
18#define DRM_MODE_TYPE_CRTC_C ((1 << 2) | DRM_MODE_TYPE_BUILTIN)
19#define DRM_MODE_TYPE_PREFERRED (1 << 3)
20#define DRM_MODE_TYPE_DEFAULT (1 << 4)
Tao Baod7db5942015-01-28 10:07:51 -080021#define DRM_MODE_TYPE_USERDEF (1 << 5)
22#define DRM_MODE_TYPE_DRIVER (1 << 6)
Christopher Ferris76a1d452018-06-27 14:12:29 -070023#define DRM_MODE_TYPE_ALL (DRM_MODE_TYPE_PREFERRED | DRM_MODE_TYPE_USERDEF | DRM_MODE_TYPE_DRIVER)
Tao Baod7db5942015-01-28 10:07:51 -080024#define DRM_MODE_FLAG_PHSYNC (1 << 0)
25#define DRM_MODE_FLAG_NHSYNC (1 << 1)
Tao Baod7db5942015-01-28 10:07:51 -080026#define DRM_MODE_FLAG_PVSYNC (1 << 2)
27#define DRM_MODE_FLAG_NVSYNC (1 << 3)
28#define DRM_MODE_FLAG_INTERLACE (1 << 4)
29#define DRM_MODE_FLAG_DBLSCAN (1 << 5)
Tao Baod7db5942015-01-28 10:07:51 -080030#define DRM_MODE_FLAG_CSYNC (1 << 6)
31#define DRM_MODE_FLAG_PCSYNC (1 << 7)
32#define DRM_MODE_FLAG_NCSYNC (1 << 8)
33#define DRM_MODE_FLAG_HSKEW (1 << 9)
Tao Baod7db5942015-01-28 10:07:51 -080034#define DRM_MODE_FLAG_BCAST (1 << 10)
35#define DRM_MODE_FLAG_PIXMUX (1 << 11)
36#define DRM_MODE_FLAG_DBLCLK (1 << 12)
37#define DRM_MODE_FLAG_CLKDIV2 (1 << 13)
Tao Baod7db5942015-01-28 10:07:51 -080038#define DRM_MODE_FLAG_3D_MASK (0x1f << 14)
39#define DRM_MODE_FLAG_3D_NONE (0 << 14)
40#define DRM_MODE_FLAG_3D_FRAME_PACKING (1 << 14)
41#define DRM_MODE_FLAG_3D_FIELD_ALTERNATIVE (2 << 14)
Tao Baod7db5942015-01-28 10:07:51 -080042#define DRM_MODE_FLAG_3D_LINE_ALTERNATIVE (3 << 14)
43#define DRM_MODE_FLAG_3D_SIDE_BY_SIDE_FULL (4 << 14)
44#define DRM_MODE_FLAG_3D_L_DEPTH (5 << 14)
45#define DRM_MODE_FLAG_3D_L_DEPTH_GFX_GFX_DEPTH (6 << 14)
Tao Baod7db5942015-01-28 10:07:51 -080046#define DRM_MODE_FLAG_3D_TOP_AND_BOTTOM (7 << 14)
47#define DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF (8 << 14)
Christopher Ferris82d75042015-01-26 10:57:07 -080048#define DRM_MODE_PICTURE_ASPECT_NONE 0
49#define DRM_MODE_PICTURE_ASPECT_4_3 1
Christopher Ferris82d75042015-01-26 10:57:07 -080050#define DRM_MODE_PICTURE_ASPECT_16_9 2
Christopher Ferris9ce28842018-10-25 12:11:39 -070051#define DRM_MODE_PICTURE_ASPECT_64_27 3
52#define DRM_MODE_PICTURE_ASPECT_256_135 4
53#define DRM_MODE_CONTENT_TYPE_NO_DATA 0
54#define DRM_MODE_CONTENT_TYPE_GRAPHICS 1
55#define DRM_MODE_CONTENT_TYPE_PHOTO 2
56#define DRM_MODE_CONTENT_TYPE_CINEMA 3
57#define DRM_MODE_CONTENT_TYPE_GAME 4
Christopher Ferris48af7cb2017-02-21 12:35:09 -080058#define DRM_MODE_FLAG_PIC_AR_MASK (0x0F << 19)
Christopher Ferris48af7cb2017-02-21 12:35:09 -080059#define DRM_MODE_FLAG_PIC_AR_NONE (DRM_MODE_PICTURE_ASPECT_NONE << 19)
60#define DRM_MODE_FLAG_PIC_AR_4_3 (DRM_MODE_PICTURE_ASPECT_4_3 << 19)
61#define DRM_MODE_FLAG_PIC_AR_16_9 (DRM_MODE_PICTURE_ASPECT_16_9 << 19)
Christopher Ferris9ce28842018-10-25 12:11:39 -070062#define DRM_MODE_FLAG_PIC_AR_64_27 (DRM_MODE_PICTURE_ASPECT_64_27 << 19)
63#define DRM_MODE_FLAG_PIC_AR_256_135 (DRM_MODE_PICTURE_ASPECT_256_135 << 19)
Christopher Ferris32ff3f82020-12-14 13:10:04 -080064#define DRM_MODE_FLAG_ALL (DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLSCAN | DRM_MODE_FLAG_CSYNC | DRM_MODE_FLAG_PCSYNC | DRM_MODE_FLAG_NCSYNC | DRM_MODE_FLAG_HSKEW | DRM_MODE_FLAG_DBLCLK | DRM_MODE_FLAG_CLKDIV2 | DRM_MODE_FLAG_3D_MASK)
Christopher Ferris48af7cb2017-02-21 12:35:09 -080065#define DRM_MODE_DPMS_ON 0
Christopher Ferris48af7cb2017-02-21 12:35:09 -080066#define DRM_MODE_DPMS_STANDBY 1
67#define DRM_MODE_DPMS_SUSPEND 2
68#define DRM_MODE_DPMS_OFF 3
69#define DRM_MODE_SCALE_NONE 0
Christopher Ferris48af7cb2017-02-21 12:35:09 -080070#define DRM_MODE_SCALE_FULLSCREEN 1
71#define DRM_MODE_SCALE_CENTER 2
72#define DRM_MODE_SCALE_ASPECT 3
Ben Cheng655a7c02013-10-16 16:09:24 -070073#define DRM_MODE_DITHERING_OFF 0
74#define DRM_MODE_DITHERING_ON 1
75#define DRM_MODE_DITHERING_AUTO 2
76#define DRM_MODE_DIRTY_OFF 0
Ben Cheng655a7c02013-10-16 16:09:24 -070077#define DRM_MODE_DIRTY_ON 1
78#define DRM_MODE_DIRTY_ANNOTATE 2
Christopher Ferris525ce912017-07-26 13:12:53 -070079#define DRM_MODE_LINK_STATUS_GOOD 0
80#define DRM_MODE_LINK_STATUS_BAD 1
Christopher Ferris1308ad32017-11-14 17:32:13 -080081#define DRM_MODE_ROTATE_0 (1 << 0)
82#define DRM_MODE_ROTATE_90 (1 << 1)
83#define DRM_MODE_ROTATE_180 (1 << 2)
84#define DRM_MODE_ROTATE_270 (1 << 3)
85#define DRM_MODE_ROTATE_MASK (DRM_MODE_ROTATE_0 | DRM_MODE_ROTATE_90 | DRM_MODE_ROTATE_180 | DRM_MODE_ROTATE_270)
86#define DRM_MODE_REFLECT_X (1 << 4)
87#define DRM_MODE_REFLECT_Y (1 << 5)
88#define DRM_MODE_REFLECT_MASK (DRM_MODE_REFLECT_X | DRM_MODE_REFLECT_Y)
Christopher Ferris76a1d452018-06-27 14:12:29 -070089#define DRM_MODE_CONTENT_PROTECTION_UNDESIRED 0
90#define DRM_MODE_CONTENT_PROTECTION_DESIRED 1
91#define DRM_MODE_CONTENT_PROTECTION_ENABLED 2
Ben Cheng655a7c02013-10-16 16:09:24 -070092struct drm_mode_modeinfo {
Tao Baod7db5942015-01-28 10:07:51 -080093 __u32 clock;
Christopher Ferris05d08e92016-02-04 13:16:38 -080094 __u16 hdisplay;
95 __u16 hsync_start;
96 __u16 hsync_end;
Christopher Ferris05d08e92016-02-04 13:16:38 -080097 __u16 htotal;
98 __u16 hskew;
99 __u16 vdisplay;
100 __u16 vsync_start;
Christopher Ferris05d08e92016-02-04 13:16:38 -0800101 __u16 vsync_end;
102 __u16 vtotal;
103 __u16 vscan;
Tao Baod7db5942015-01-28 10:07:51 -0800104 __u32 vrefresh;
Tao Baod7db5942015-01-28 10:07:51 -0800105 __u32 flags;
106 __u32 type;
107 char name[DRM_DISPLAY_MODE_LEN];
Ben Cheng655a7c02013-10-16 16:09:24 -0700108};
109struct drm_mode_card_res {
Tao Baod7db5942015-01-28 10:07:51 -0800110 __u64 fb_id_ptr;
111 __u64 crtc_id_ptr;
112 __u64 connector_id_ptr;
Tao Baod7db5942015-01-28 10:07:51 -0800113 __u64 encoder_id_ptr;
114 __u32 count_fbs;
115 __u32 count_crtcs;
116 __u32 count_connectors;
Tao Baod7db5942015-01-28 10:07:51 -0800117 __u32 count_encoders;
Christopher Ferris05d08e92016-02-04 13:16:38 -0800118 __u32 min_width;
119 __u32 max_width;
120 __u32 min_height;
Christopher Ferris05d08e92016-02-04 13:16:38 -0800121 __u32 max_height;
122};
Ben Cheng655a7c02013-10-16 16:09:24 -0700123struct drm_mode_crtc {
Tao Baod7db5942015-01-28 10:07:51 -0800124 __u64 set_connectors_ptr;
125 __u32 count_connectors;
126 __u32 crtc_id;
Tao Baod7db5942015-01-28 10:07:51 -0800127 __u32 fb_id;
Christopher Ferris05d08e92016-02-04 13:16:38 -0800128 __u32 x;
Christopher Ferris05d08e92016-02-04 13:16:38 -0800129 __u32 y;
Tao Baod7db5942015-01-28 10:07:51 -0800130 __u32 gamma_size;
131 __u32 mode_valid;
Tao Baod7db5942015-01-28 10:07:51 -0800132 struct drm_mode_modeinfo mode;
Ben Cheng655a7c02013-10-16 16:09:24 -0700133};
Tao Baod7db5942015-01-28 10:07:51 -0800134#define DRM_MODE_PRESENT_TOP_FIELD (1 << 0)
135#define DRM_MODE_PRESENT_BOTTOM_FIELD (1 << 1)
Ben Cheng655a7c02013-10-16 16:09:24 -0700136struct drm_mode_set_plane {
Tao Baod7db5942015-01-28 10:07:51 -0800137 __u32 plane_id;
138 __u32 crtc_id;
139 __u32 fb_id;
Tao Baod7db5942015-01-28 10:07:51 -0800140 __u32 flags;
Christopher Ferris05d08e92016-02-04 13:16:38 -0800141 __s32 crtc_x;
142 __s32 crtc_y;
143 __u32 crtc_w;
144 __u32 crtc_h;
Christopher Ferris05d08e92016-02-04 13:16:38 -0800145 __u32 src_x;
146 __u32 src_y;
147 __u32 src_h;
148 __u32 src_w;
Ben Cheng655a7c02013-10-16 16:09:24 -0700149};
150struct drm_mode_get_plane {
Tao Baod7db5942015-01-28 10:07:51 -0800151 __u32 plane_id;
Tao Baod7db5942015-01-28 10:07:51 -0800152 __u32 crtc_id;
153 __u32 fb_id;
154 __u32 possible_crtcs;
155 __u32 gamma_size;
Tao Baod7db5942015-01-28 10:07:51 -0800156 __u32 count_format_types;
157 __u64 format_type_ptr;
Ben Cheng655a7c02013-10-16 16:09:24 -0700158};
159struct drm_mode_get_plane_res {
Tao Baod7db5942015-01-28 10:07:51 -0800160 __u64 plane_id_ptr;
161 __u32 count_planes;
Ben Cheng655a7c02013-10-16 16:09:24 -0700162};
163#define DRM_MODE_ENCODER_NONE 0
164#define DRM_MODE_ENCODER_DAC 1
Ben Cheng655a7c02013-10-16 16:09:24 -0700165#define DRM_MODE_ENCODER_TMDS 2
166#define DRM_MODE_ENCODER_LVDS 3
167#define DRM_MODE_ENCODER_TVDAC 4
168#define DRM_MODE_ENCODER_VIRTUAL 5
Christopher Ferris38062f92014-07-09 15:33:25 -0700169#define DRM_MODE_ENCODER_DSI 6
Christopher Ferrisba8d4f42014-09-03 19:56:49 -0700170#define DRM_MODE_ENCODER_DPMST 7
Christopher Ferris106b3a82016-08-24 12:15:38 -0700171#define DRM_MODE_ENCODER_DPI 8
Christopher Ferrisba8d4f42014-09-03 19:56:49 -0700172struct drm_mode_get_encoder {
Tao Baod7db5942015-01-28 10:07:51 -0800173 __u32 encoder_id;
174 __u32 encoder_type;
175 __u32 crtc_id;
176 __u32 possible_crtcs;
Tao Baod7db5942015-01-28 10:07:51 -0800177 __u32 possible_clones;
Ben Cheng655a7c02013-10-16 16:09:24 -0700178};
Christopher Ferris48af7cb2017-02-21 12:35:09 -0800179enum drm_mode_subconnector {
180 DRM_MODE_SUBCONNECTOR_Automatic = 0,
181 DRM_MODE_SUBCONNECTOR_Unknown = 0,
Christopher Ferris32ff3f82020-12-14 13:10:04 -0800182 DRM_MODE_SUBCONNECTOR_VGA = 1,
Christopher Ferris48af7cb2017-02-21 12:35:09 -0800183 DRM_MODE_SUBCONNECTOR_DVID = 3,
Christopher Ferris48af7cb2017-02-21 12:35:09 -0800184 DRM_MODE_SUBCONNECTOR_DVIA = 4,
185 DRM_MODE_SUBCONNECTOR_Composite = 5,
186 DRM_MODE_SUBCONNECTOR_SVIDEO = 6,
187 DRM_MODE_SUBCONNECTOR_Component = 8,
Christopher Ferris48af7cb2017-02-21 12:35:09 -0800188 DRM_MODE_SUBCONNECTOR_SCART = 9,
Christopher Ferris32ff3f82020-12-14 13:10:04 -0800189 DRM_MODE_SUBCONNECTOR_DisplayPort = 10,
190 DRM_MODE_SUBCONNECTOR_HDMIA = 11,
191 DRM_MODE_SUBCONNECTOR_Native = 15,
192 DRM_MODE_SUBCONNECTOR_Wireless = 18,
Christopher Ferris48af7cb2017-02-21 12:35:09 -0800193};
Ben Cheng655a7c02013-10-16 16:09:24 -0700194#define DRM_MODE_CONNECTOR_Unknown 0
Christopher Ferrisba8d4f42014-09-03 19:56:49 -0700195#define DRM_MODE_CONNECTOR_VGA 1
Ben Cheng655a7c02013-10-16 16:09:24 -0700196#define DRM_MODE_CONNECTOR_DVII 2
197#define DRM_MODE_CONNECTOR_DVID 3
198#define DRM_MODE_CONNECTOR_DVIA 4
Christopher Ferrisba8d4f42014-09-03 19:56:49 -0700199#define DRM_MODE_CONNECTOR_Composite 5
Ben Cheng655a7c02013-10-16 16:09:24 -0700200#define DRM_MODE_CONNECTOR_SVIDEO 6
201#define DRM_MODE_CONNECTOR_LVDS 7
202#define DRM_MODE_CONNECTOR_Component 8
Christopher Ferrisba8d4f42014-09-03 19:56:49 -0700203#define DRM_MODE_CONNECTOR_9PinDIN 9
Ben Cheng655a7c02013-10-16 16:09:24 -0700204#define DRM_MODE_CONNECTOR_DisplayPort 10
205#define DRM_MODE_CONNECTOR_HDMIA 11
206#define DRM_MODE_CONNECTOR_HDMIB 12
Christopher Ferrisba8d4f42014-09-03 19:56:49 -0700207#define DRM_MODE_CONNECTOR_TV 13
Ben Cheng655a7c02013-10-16 16:09:24 -0700208#define DRM_MODE_CONNECTOR_eDP 14
209#define DRM_MODE_CONNECTOR_VIRTUAL 15
Christopher Ferris38062f92014-07-09 15:33:25 -0700210#define DRM_MODE_CONNECTOR_DSI 16
Christopher Ferris106b3a82016-08-24 12:15:38 -0700211#define DRM_MODE_CONNECTOR_DPI 17
Christopher Ferris9ce28842018-10-25 12:11:39 -0700212#define DRM_MODE_CONNECTOR_WRITEBACK 18
Christopher Ferris9584fa42019-12-09 15:36:13 -0800213#define DRM_MODE_CONNECTOR_SPI 19
Christopher Ferrisfcc3b4f2021-07-01 01:30:21 +0000214#define DRM_MODE_CONNECTOR_USB 20
Christopher Ferrisba8d4f42014-09-03 19:56:49 -0700215struct drm_mode_get_connector {
Tao Baod7db5942015-01-28 10:07:51 -0800216 __u64 encoders_ptr;
217 __u64 modes_ptr;
218 __u64 props_ptr;
219 __u64 prop_values_ptr;
Tao Baod7db5942015-01-28 10:07:51 -0800220 __u32 count_modes;
221 __u32 count_props;
222 __u32 count_encoders;
223 __u32 encoder_id;
Tao Baod7db5942015-01-28 10:07:51 -0800224 __u32 connector_id;
225 __u32 connector_type;
226 __u32 connector_type_id;
227 __u32 connection;
Christopher Ferris05d08e92016-02-04 13:16:38 -0800228 __u32 mm_width;
Christopher Ferris05d08e92016-02-04 13:16:38 -0800229 __u32 mm_height;
Tao Baod7db5942015-01-28 10:07:51 -0800230 __u32 subpixel;
231 __u32 pad;
Christopher Ferrisba8d4f42014-09-03 19:56:49 -0700232};
Tao Baod7db5942015-01-28 10:07:51 -0800233#define DRM_MODE_PROP_PENDING (1 << 0)
234#define DRM_MODE_PROP_RANGE (1 << 1)
235#define DRM_MODE_PROP_IMMUTABLE (1 << 2)
236#define DRM_MODE_PROP_ENUM (1 << 3)
Tao Baod7db5942015-01-28 10:07:51 -0800237#define DRM_MODE_PROP_BLOB (1 << 4)
238#define DRM_MODE_PROP_BITMASK (1 << 5)
239#define DRM_MODE_PROP_LEGACY_TYPE (DRM_MODE_PROP_RANGE | DRM_MODE_PROP_ENUM | DRM_MODE_PROP_BLOB | DRM_MODE_PROP_BITMASK)
Christopher Ferrisba8d4f42014-09-03 19:56:49 -0700240#define DRM_MODE_PROP_EXTENDED_TYPE 0x0000ffc0
241#define DRM_MODE_PROP_TYPE(n) ((n) << 6)
242#define DRM_MODE_PROP_OBJECT DRM_MODE_PROP_TYPE(1)
243#define DRM_MODE_PROP_SIGNED_RANGE DRM_MODE_PROP_TYPE(2)
Christopher Ferris05d08e92016-02-04 13:16:38 -0800244#define DRM_MODE_PROP_ATOMIC 0x80000000
Christopher Ferris05d08e92016-02-04 13:16:38 -0800245struct drm_mode_property_enum {
Tao Baod7db5942015-01-28 10:07:51 -0800246 __u64 value;
247 char name[DRM_PROP_NAME_LEN];
Ben Cheng655a7c02013-10-16 16:09:24 -0700248};
Christopher Ferris05d08e92016-02-04 13:16:38 -0800249struct drm_mode_get_property {
Tao Baod7db5942015-01-28 10:07:51 -0800250 __u64 values_ptr;
251 __u64 enum_blob_ptr;
252 __u32 prop_id;
Christopher Ferris05d08e92016-02-04 13:16:38 -0800253 __u32 flags;
Tao Baod7db5942015-01-28 10:07:51 -0800254 char name[DRM_PROP_NAME_LEN];
255 __u32 count_values;
256 __u32 count_enum_blobs;
Christopher Ferris05d08e92016-02-04 13:16:38 -0800257};
Ben Cheng655a7c02013-10-16 16:09:24 -0700258struct drm_mode_connector_set_property {
Tao Baod7db5942015-01-28 10:07:51 -0800259 __u64 value;
260 __u32 prop_id;
Christopher Ferris05d08e92016-02-04 13:16:38 -0800261 __u32 connector_id;
Ben Cheng655a7c02013-10-16 16:09:24 -0700262};
Christopher Ferris106b3a82016-08-24 12:15:38 -0700263#define DRM_MODE_OBJECT_CRTC 0xcccccccc
264#define DRM_MODE_OBJECT_CONNECTOR 0xc0c0c0c0
Christopher Ferris106b3a82016-08-24 12:15:38 -0700265#define DRM_MODE_OBJECT_ENCODER 0xe0e0e0e0
266#define DRM_MODE_OBJECT_MODE 0xdededede
267#define DRM_MODE_OBJECT_PROPERTY 0xb0b0b0b0
268#define DRM_MODE_OBJECT_FB 0xfbfbfbfb
Christopher Ferris106b3a82016-08-24 12:15:38 -0700269#define DRM_MODE_OBJECT_BLOB 0xbbbbbbbb
270#define DRM_MODE_OBJECT_PLANE 0xeeeeeeee
271#define DRM_MODE_OBJECT_ANY 0
272struct drm_mode_obj_get_properties {
Christopher Ferris106b3a82016-08-24 12:15:38 -0700273 __u64 props_ptr;
Christopher Ferris05d08e92016-02-04 13:16:38 -0800274 __u64 prop_values_ptr;
Tao Baod7db5942015-01-28 10:07:51 -0800275 __u32 count_props;
276 __u32 obj_id;
Christopher Ferris106b3a82016-08-24 12:15:38 -0700277 __u32 obj_type;
Christopher Ferris05d08e92016-02-04 13:16:38 -0800278};
Ben Cheng655a7c02013-10-16 16:09:24 -0700279struct drm_mode_obj_set_property {
Tao Baod7db5942015-01-28 10:07:51 -0800280 __u64 value;
Christopher Ferris106b3a82016-08-24 12:15:38 -0700281 __u32 prop_id;
Christopher Ferris05d08e92016-02-04 13:16:38 -0800282 __u32 obj_id;
Tao Baod7db5942015-01-28 10:07:51 -0800283 __u32 obj_type;
Christopher Ferris38062f92014-07-09 15:33:25 -0700284};
Christopher Ferris106b3a82016-08-24 12:15:38 -0700285struct drm_mode_get_blob {
Christopher Ferris05d08e92016-02-04 13:16:38 -0800286 __u32 blob_id;
Tao Baod7db5942015-01-28 10:07:51 -0800287 __u32 length;
288 __u64 data;
Christopher Ferris106b3a82016-08-24 12:15:38 -0700289};
Christopher Ferris05d08e92016-02-04 13:16:38 -0800290struct drm_mode_fb_cmd {
Tao Baod7db5942015-01-28 10:07:51 -0800291 __u32 fb_id;
Christopher Ferris05d08e92016-02-04 13:16:38 -0800292 __u32 width;
Christopher Ferris106b3a82016-08-24 12:15:38 -0700293 __u32 height;
Tao Baod7db5942015-01-28 10:07:51 -0800294 __u32 pitch;
295 __u32 bpp;
Tao Baod7db5942015-01-28 10:07:51 -0800296 __u32 depth;
Christopher Ferris106b3a82016-08-24 12:15:38 -0700297 __u32 handle;
Ben Cheng655a7c02013-10-16 16:09:24 -0700298};
Tao Baod7db5942015-01-28 10:07:51 -0800299#define DRM_MODE_FB_INTERLACED (1 << 0)
Christopher Ferris05d08e92016-02-04 13:16:38 -0800300#define DRM_MODE_FB_MODIFIERS (1 << 1)
Christopher Ferris106b3a82016-08-24 12:15:38 -0700301struct drm_mode_fb_cmd2 {
Tao Baod7db5942015-01-28 10:07:51 -0800302 __u32 fb_id;
Christopher Ferris05d08e92016-02-04 13:16:38 -0800303 __u32 width;
304 __u32 height;
Christopher Ferris106b3a82016-08-24 12:15:38 -0700305 __u32 pixel_format;
Tao Baod7db5942015-01-28 10:07:51 -0800306 __u32 flags;
307 __u32 handles[4];
308 __u32 pitches[4];
Christopher Ferris106b3a82016-08-24 12:15:38 -0700309 __u32 offsets[4];
Christopher Ferris05d08e92016-02-04 13:16:38 -0800310 __u64 modifier[4];
Ben Cheng655a7c02013-10-16 16:09:24 -0700311};
Christopher Ferris38062f92014-07-09 15:33:25 -0700312#define DRM_MODE_FB_DIRTY_ANNOTATE_COPY 0x01
Christopher Ferris106b3a82016-08-24 12:15:38 -0700313#define DRM_MODE_FB_DIRTY_ANNOTATE_FILL 0x02
Christopher Ferris05d08e92016-02-04 13:16:38 -0800314#define DRM_MODE_FB_DIRTY_FLAGS 0x03
Ben Cheng655a7c02013-10-16 16:09:24 -0700315#define DRM_MODE_FB_DIRTY_MAX_CLIPS 256
Christopher Ferris38062f92014-07-09 15:33:25 -0700316struct drm_mode_fb_dirty_cmd {
Christopher Ferris106b3a82016-08-24 12:15:38 -0700317 __u32 fb_id;
Christopher Ferris05d08e92016-02-04 13:16:38 -0800318 __u32 flags;
Tao Baod7db5942015-01-28 10:07:51 -0800319 __u32 color;
320 __u32 num_clips;
Christopher Ferris106b3a82016-08-24 12:15:38 -0700321 __u64 clips_ptr;
Christopher Ferris05d08e92016-02-04 13:16:38 -0800322};
Ben Cheng655a7c02013-10-16 16:09:24 -0700323struct drm_mode_mode_cmd {
Tao Baod7db5942015-01-28 10:07:51 -0800324 __u32 connector_id;
Christopher Ferris106b3a82016-08-24 12:15:38 -0700325 struct drm_mode_modeinfo mode;
Christopher Ferris05d08e92016-02-04 13:16:38 -0800326};
Ben Cheng655a7c02013-10-16 16:09:24 -0700327#define DRM_MODE_CURSOR_BO 0x01
Christopher Ferris38062f92014-07-09 15:33:25 -0700328#define DRM_MODE_CURSOR_MOVE 0x02
Christopher Ferris106b3a82016-08-24 12:15:38 -0700329#define DRM_MODE_CURSOR_FLAGS 0x03
Christopher Ferris05d08e92016-02-04 13:16:38 -0800330struct drm_mode_cursor {
Tao Baod7db5942015-01-28 10:07:51 -0800331 __u32 flags;
332 __u32 crtc_id;
Christopher Ferris106b3a82016-08-24 12:15:38 -0700333 __s32 x;
Christopher Ferris05d08e92016-02-04 13:16:38 -0800334 __s32 y;
Tao Baod7db5942015-01-28 10:07:51 -0800335 __u32 width;
336 __u32 height;
Christopher Ferris106b3a82016-08-24 12:15:38 -0700337 __u32 handle;
Christopher Ferris05d08e92016-02-04 13:16:38 -0800338};
Christopher Ferris38062f92014-07-09 15:33:25 -0700339struct drm_mode_cursor2 {
Tao Baod7db5942015-01-28 10:07:51 -0800340 __u32 flags;
Christopher Ferris106b3a82016-08-24 12:15:38 -0700341 __u32 crtc_id;
Christopher Ferris05d08e92016-02-04 13:16:38 -0800342 __s32 x;
Tao Baod7db5942015-01-28 10:07:51 -0800343 __s32 y;
344 __u32 width;
Christopher Ferris106b3a82016-08-24 12:15:38 -0700345 __u32 height;
Christopher Ferris05d08e92016-02-04 13:16:38 -0800346 __u32 handle;
Tao Baod7db5942015-01-28 10:07:51 -0800347 __s32 hot_x;
348 __s32 hot_y;
Christopher Ferris106b3a82016-08-24 12:15:38 -0700349};
Christopher Ferris05d08e92016-02-04 13:16:38 -0800350struct drm_mode_crtc_lut {
Tao Baod7db5942015-01-28 10:07:51 -0800351 __u32 crtc_id;
352 __u32 gamma_size;
Christopher Ferris106b3a82016-08-24 12:15:38 -0700353 __u64 red;
Christopher Ferris05d08e92016-02-04 13:16:38 -0800354 __u64 green;
Tao Baod7db5942015-01-28 10:07:51 -0800355 __u64 blue;
Elliott Hughes8cb52b02013-11-21 13:43:23 -0800356};
Christopher Ferris106b3a82016-08-24 12:15:38 -0700357struct drm_color_ctm {
Christopher Ferris76a1d452018-06-27 14:12:29 -0700358 __u64 matrix[9];
Christopher Ferris106b3a82016-08-24 12:15:38 -0700359};
Priyanka Advani (xWF)a8050342024-09-25 19:07:32 +0000360struct drm_color_ctm_3x4 {
361 __u64 matrix[12];
362};
Christopher Ferris106b3a82016-08-24 12:15:38 -0700363struct drm_color_lut {
Christopher Ferris106b3a82016-08-24 12:15:38 -0700364 __u16 red;
365 __u16 green;
366 __u16 blue;
367 __u16 reserved;
Christopher Ferris106b3a82016-08-24 12:15:38 -0700368};
Christopher Ferris7ac54f52024-08-07 21:07:12 +0000369struct drm_plane_size_hint {
370 __u16 width;
371 __u16 height;
372};
Christopher Ferrisb8a95e22019-10-02 18:29:20 -0700373struct hdr_metadata_infoframe {
374 __u8 eotf;
375 __u8 metadata_type;
376 struct {
377 __u16 x, y;
378 } display_primaries[3];
379 struct {
380 __u16 x, y;
381 } white_point;
382 __u16 max_display_mastering_luminance;
383 __u16 min_display_mastering_luminance;
384 __u16 max_cll;
385 __u16 max_fall;
386};
387struct hdr_output_metadata {
388 __u32 metadata_type;
389 union {
390 struct hdr_metadata_infoframe hdmi_metadata_type1;
391 };
392};
Christopher Ferris106b3a82016-08-24 12:15:38 -0700393#define DRM_MODE_PAGE_FLIP_EVENT 0x01
Christopher Ferris05d08e92016-02-04 13:16:38 -0800394#define DRM_MODE_PAGE_FLIP_ASYNC 0x02
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800395#define DRM_MODE_PAGE_FLIP_TARGET_ABSOLUTE 0x4
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800396#define DRM_MODE_PAGE_FLIP_TARGET_RELATIVE 0x8
397#define DRM_MODE_PAGE_FLIP_TARGET (DRM_MODE_PAGE_FLIP_TARGET_ABSOLUTE | DRM_MODE_PAGE_FLIP_TARGET_RELATIVE)
398#define DRM_MODE_PAGE_FLIP_FLAGS (DRM_MODE_PAGE_FLIP_EVENT | DRM_MODE_PAGE_FLIP_ASYNC | DRM_MODE_PAGE_FLIP_TARGET)
Christopher Ferris38062f92014-07-09 15:33:25 -0700399struct drm_mode_crtc_page_flip {
Tao Baod7db5942015-01-28 10:07:51 -0800400 __u32 crtc_id;
Christopher Ferris05d08e92016-02-04 13:16:38 -0800401 __u32 fb_id;
Tao Baod7db5942015-01-28 10:07:51 -0800402 __u32 flags;
403 __u32 reserved;
404 __u64 user_data;
Christopher Ferris05d08e92016-02-04 13:16:38 -0800405};
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800406struct drm_mode_crtc_page_flip_target {
407 __u32 crtc_id;
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800408 __u32 fb_id;
409 __u32 flags;
410 __u32 sequence;
411 __u64 user_data;
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800412};
Ben Cheng655a7c02013-10-16 16:09:24 -0700413struct drm_mode_create_dumb {
Christopher Ferris106b3a82016-08-24 12:15:38 -0700414 __u32 height;
415 __u32 width;
416 __u32 bpp;
Christopher Ferris05d08e92016-02-04 13:16:38 -0800417 __u32 flags;
Christopher Ferris106b3a82016-08-24 12:15:38 -0700418 __u32 handle;
419 __u32 pitch;
420 __u64 size;
421};
Christopher Ferris106b3a82016-08-24 12:15:38 -0700422struct drm_mode_map_dumb {
423 __u32 handle;
424 __u32 pad;
425 __u64 offset;
Christopher Ferris106b3a82016-08-24 12:15:38 -0700426};
427struct drm_mode_destroy_dumb {
428 __u32 handle;
429};
Christopher Ferris106b3a82016-08-24 12:15:38 -0700430#define DRM_MODE_ATOMIC_TEST_ONLY 0x0100
431#define DRM_MODE_ATOMIC_NONBLOCK 0x0200
432#define DRM_MODE_ATOMIC_ALLOW_MODESET 0x0400
433#define DRM_MODE_ATOMIC_FLAGS (DRM_MODE_PAGE_FLIP_EVENT | DRM_MODE_PAGE_FLIP_ASYNC | DRM_MODE_ATOMIC_TEST_ONLY | DRM_MODE_ATOMIC_NONBLOCK | DRM_MODE_ATOMIC_ALLOW_MODESET)
Christopher Ferris106b3a82016-08-24 12:15:38 -0700434struct drm_mode_atomic {
435 __u32 flags;
Christopher Ferris05d08e92016-02-04 13:16:38 -0800436 __u32 count_objs;
437 __u64 objs_ptr;
438 __u64 count_props_ptr;
439 __u64 props_ptr;
Christopher Ferris05d08e92016-02-04 13:16:38 -0800440 __u64 prop_values_ptr;
441 __u64 reserved;
442 __u64 user_data;
443};
Christopher Ferris1308ad32017-11-14 17:32:13 -0800444struct drm_format_modifier_blob {
445#define FORMAT_BLOB_CURRENT 1
446 __u32 version;
447 __u32 flags;
448 __u32 count_formats;
449 __u32 formats_offset;
450 __u32 count_modifiers;
451 __u32 modifiers_offset;
452};
453struct drm_format_modifier {
454 __u64 formats;
455 __u32 offset;
456 __u32 pad;
457 __u64 modifier;
458};
Christopher Ferris05d08e92016-02-04 13:16:38 -0800459struct drm_mode_create_blob {
460 __u64 data;
461 __u32 length;
462 __u32 blob_id;
Ben Cheng655a7c02013-10-16 16:09:24 -0700463};
Christopher Ferris05d08e92016-02-04 13:16:38 -0800464struct drm_mode_destroy_blob {
465 __u32 blob_id;
466};
Christopher Ferris934ec942018-01-31 15:29:16 -0800467struct drm_mode_create_lease {
468 __u64 object_ids;
469 __u32 object_count;
470 __u32 flags;
471 __u32 lessee_id;
472 __u32 fd;
473};
474struct drm_mode_list_lessees {
475 __u32 count_lessees;
476 __u32 pad;
477 __u64 lessees_ptr;
478};
479struct drm_mode_get_lease {
480 __u32 count_objects;
481 __u32 pad;
482 __u64 objects_ptr;
483};
484struct drm_mode_revoke_lease {
485 __u32 lessee_id;
486};
Christopher Ferrisd842e432019-03-07 10:21:59 -0800487struct drm_mode_rect {
488 __s32 x1;
489 __s32 y1;
490 __s32 x2;
491 __s32 y2;
492};
Christopher Ferrisb830ddf2024-03-28 11:48:08 -0700493struct drm_mode_closefb {
494 __u32 fb_id;
495 __u32 pad;
496};
Christopher Ferris106b3a82016-08-24 12:15:38 -0700497#ifdef __cplusplus
Christopher Ferris48fe0ae2019-01-10 15:59:33 -0800498}
Christopher Ferris106b3a82016-08-24 12:15:38 -0700499#endif
Christopher Ferris38062f92014-07-09 15:33:25 -0700500#endif