Update to v5.10 kernel headers.

Kernel headers coming from:

Git: https://android.googlesource.com/kernel/common/
Branch: android-mainline
Tag: android-mainline-5.10

Test: Built cuttlefish and flame images. Ran bionic unit tests on both.
Change-Id: I37ffc850970adcce1febbe2269c202632fce763a
diff --git a/libc/kernel/uapi/drm/drm_mode.h b/libc/kernel/uapi/drm/drm_mode.h
index be5cbad..643ae98 100644
--- a/libc/kernel/uapi/drm/drm_mode.h
+++ b/libc/kernel/uapi/drm/drm_mode.h
@@ -73,12 +73,7 @@
 #define DRM_MODE_FLAG_PIC_AR_16_9 (DRM_MODE_PICTURE_ASPECT_16_9 << 19)
 #define DRM_MODE_FLAG_PIC_AR_64_27 (DRM_MODE_PICTURE_ASPECT_64_27 << 19)
 #define DRM_MODE_FLAG_PIC_AR_256_135 (DRM_MODE_PICTURE_ASPECT_256_135 << 19)
-#define DRM_MODE_FLAG_SUPPORTS_RGB (1 << 27)
-#define DRM_MODE_FLAG_SUPPORTS_YUV (1 << 28)
-#define DRM_MODE_FLAG_VID_MODE_PANEL (1 << 29)
-#define DRM_MODE_FLAG_CMD_MODE_PANEL (1 << 30)
-#define DRM_MODE_FLAG_SEAMLESS (1 << 31)
-#define DRM_MODE_FLAG_ALL (DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLSCAN | DRM_MODE_FLAG_CSYNC | DRM_MODE_FLAG_PCSYNC | DRM_MODE_FLAG_NCSYNC | DRM_MODE_FLAG_HSKEW | DRM_MODE_FLAG_DBLCLK | DRM_MODE_FLAG_CLKDIV2 | DRM_MODE_FLAG_SUPPORTS_RGB | DRM_MODE_FLAG_SUPPORTS_YUV | DRM_MODE_FLAG_VID_MODE_PANEL | DRM_MODE_FLAG_CMD_MODE_PANEL | DRM_MODE_FLAG_3D_MASK)
+#define DRM_MODE_FLAG_ALL (DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLSCAN | DRM_MODE_FLAG_CSYNC | DRM_MODE_FLAG_PCSYNC | DRM_MODE_FLAG_NCSYNC | DRM_MODE_FLAG_HSKEW | DRM_MODE_FLAG_DBLCLK | DRM_MODE_FLAG_CLKDIV2 | DRM_MODE_FLAG_3D_MASK)
 #define DRM_MODE_DPMS_ON 0
 #define DRM_MODE_DPMS_STANDBY 1
 #define DRM_MODE_DPMS_SUSPEND 2
@@ -196,12 +191,17 @@
 enum drm_mode_subconnector {
   DRM_MODE_SUBCONNECTOR_Automatic = 0,
   DRM_MODE_SUBCONNECTOR_Unknown = 0,
+  DRM_MODE_SUBCONNECTOR_VGA = 1,
   DRM_MODE_SUBCONNECTOR_DVID = 3,
   DRM_MODE_SUBCONNECTOR_DVIA = 4,
   DRM_MODE_SUBCONNECTOR_Composite = 5,
   DRM_MODE_SUBCONNECTOR_SVIDEO = 6,
   DRM_MODE_SUBCONNECTOR_Component = 8,
   DRM_MODE_SUBCONNECTOR_SCART = 9,
+  DRM_MODE_SUBCONNECTOR_DisplayPort = 10,
+  DRM_MODE_SUBCONNECTOR_HDMIA = 11,
+  DRM_MODE_SUBCONNECTOR_Native = 15,
+  DRM_MODE_SUBCONNECTOR_Wireless = 18,
 };
 #define DRM_MODE_CONNECTOR_Unknown 0
 #define DRM_MODE_CONNECTOR_VGA 1
@@ -309,7 +309,6 @@
 };
 #define DRM_MODE_FB_INTERLACED (1 << 0)
 #define DRM_MODE_FB_MODIFIERS (1 << 1)
-#define DRM_MODE_FB_SECURE (1 << 2)
 struct drm_mode_fb_cmd2 {
   __u32 fb_id;
   __u32 width;