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Sean Paule0c4c3d2015-01-20 16:56:04 -05001/*
2 * Copyright (C) 2015 The Android Open Source Project
3 *
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
7 *
8 * http://www.apache.org/licenses/LICENSE-2.0
9 *
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
15 */
16
Stéphane Marchesinbe98c8c2015-06-23 16:18:10 -070017#define ATRACE_TAG ATRACE_TAG_GRAPHICS
Sean Paule0c4c3d2015-01-20 16:56:04 -050018#define LOG_TAG "hwcomposer-drm"
19
Zach Reizner7642c922015-10-29 10:11:16 -070020#include "drmhwcomposer.h"
Sean Paul6a55e9f2015-04-30 15:31:06 -040021#include "drmresources.h"
Sean Paulda6270d2015-06-01 14:11:52 -040022#include "importer.h"
Haixia Shid21f5282015-10-05 14:35:09 -070023#include "virtualcompositorworker.h"
Sean Paul4057be32015-05-13 06:23:09 -070024#include "vsyncworker.h"
Sean Paulef8f1f92015-04-29 16:05:23 -040025
Zach Reizner09807052015-08-13 14:53:41 -070026#include <stdlib.h>
27
28#include <map>
29#include <vector>
Zach Reizner4a253652015-09-10 18:30:54 -070030#include <sstream>
Zach Reizner09807052015-08-13 14:53:41 -070031
Sean Paule0c4c3d2015-01-20 16:56:04 -050032#include <errno.h>
Sean Paulef8f1f92015-04-29 16:05:23 -040033#include <fcntl.h>
Sean Paulef8f1f92015-04-29 16:05:23 -040034#include <pthread.h>
Sean Paule0c4c3d2015-01-20 16:56:04 -050035#include <sys/param.h>
Sean Paul9aa5ad32015-01-22 15:47:54 -050036#include <sys/resource.h>
Sean Paule0c4c3d2015-01-20 16:56:04 -050037#include <xf86drm.h>
38#include <xf86drmMode.h>
Sean Paule0c4c3d2015-01-20 16:56:04 -050039
Sean Paulef8f1f92015-04-29 16:05:23 -040040#include <cutils/log.h>
41#include <cutils/properties.h>
Sean Paule0c4c3d2015-01-20 16:56:04 -050042#include <hardware/hardware.h>
43#include <hardware/hwcomposer.h>
Zach Reizner4a253652015-09-10 18:30:54 -070044#include <sw_sync.h>
45#include <sync/sync.h>
Stéphane Marchesinbe98c8c2015-06-23 16:18:10 -070046#include <utils/Trace.h>
Sean Paule0c4c3d2015-01-20 16:56:04 -050047
Sean Paule0c4c3d2015-01-20 16:56:04 -050048#define UM_PER_INCH 25400
49
Sean Paul6a55e9f2015-04-30 15:31:06 -040050namespace android {
Sean Paule0c4c3d2015-01-20 16:56:04 -050051
Zach Reizner4a253652015-09-10 18:30:54 -070052class DummySwSyncTimeline {
53 public:
54 int Init() {
55 int ret = timeline_fd_.Set(sw_sync_timeline_create());
56 if (ret < 0)
57 return ret;
58 return 0;
59 }
60
61 UniqueFd CreateDummyFence() {
62 int ret = sw_sync_fence_create(timeline_fd_.get(), "dummy fence",
63 timeline_pt_ + 1);
64 if (ret < 0) {
65 ALOGE("Failed to create dummy fence %d", ret);
66 return ret;
67 }
68
69 UniqueFd ret_fd(ret);
70
71 ret = sw_sync_timeline_inc(timeline_fd_.get(), 1);
72 if (ret) {
73 ALOGE("Failed to increment dummy sync timeline %d", ret);
74 return ret;
75 }
76
77 ++timeline_pt_;
78 return ret_fd;
79 }
80
81 private:
82 UniqueFd timeline_fd_;
83 int timeline_pt_ = 0;
84};
85
86struct CheckedOutputFd {
87 CheckedOutputFd(int *fd, const char *description,
88 DummySwSyncTimeline &timeline)
89 : fd_(fd), description_(description), timeline_(timeline) {
90 }
91 CheckedOutputFd(CheckedOutputFd &&rhs)
92 : description_(rhs.description_), timeline_(rhs.timeline_) {
93 std::swap(fd_, rhs.fd_);
94 }
95
96 CheckedOutputFd &operator=(const CheckedOutputFd &rhs) = delete;
97
98 ~CheckedOutputFd() {
99 if (fd_ == NULL)
100 return;
101
102 if (*fd_ >= 0)
103 return;
104
105 *fd_ = timeline_.CreateDummyFence().Release();
106
107 if (*fd_ < 0)
108 ALOGE("Failed to fill %s (%p == %d) before destruction",
109 description_.c_str(), fd_, *fd_);
110 }
111
112 private:
113 int *fd_ = NULL;
114 std::string description_;
115 DummySwSyncTimeline &timeline_;
116};
117
Sean Paule42febf2015-05-07 11:35:29 -0700118typedef struct hwc_drm_display {
Sean Paulef8f1f92015-04-29 16:05:23 -0400119 struct hwc_context_t *ctx;
120 int display;
Sean Paul9aa5ad32015-01-22 15:47:54 -0500121
Sean Paul6a55e9f2015-04-30 15:31:06 -0400122 std::vector<uint32_t> config_ids;
Sean Paul9aa5ad32015-01-22 15:47:54 -0500123
Sean Paul4057be32015-05-13 06:23:09 -0700124 VSyncWorker vsync_worker;
Sean Paule42febf2015-05-07 11:35:29 -0700125} hwc_drm_display_t;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500126
127struct hwc_context_t {
Sean Paule42febf2015-05-07 11:35:29 -0700128 // map of display:hwc_drm_display_t
129 typedef std::map<int, hwc_drm_display_t> DisplayMap;
Sean Paulda6270d2015-06-01 14:11:52 -0400130
131 ~hwc_context_t() {
Haixia Shid21f5282015-10-05 14:35:09 -0700132 virtual_compositor_worker.Exit();
Sean Paulda6270d2015-06-01 14:11:52 -0400133 }
134
Sean Paule42febf2015-05-07 11:35:29 -0700135 hwc_composer_device_1_t device;
Zach Reiznerff30b522015-10-28 19:08:45 -0700136 hwc_procs_t const *procs = NULL;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500137
Sean Paule42febf2015-05-07 11:35:29 -0700138 DisplayMap displays;
Sean Paul6a55e9f2015-04-30 15:31:06 -0400139 DrmResources drm;
Zach Reiznerff30b522015-10-28 19:08:45 -0700140 std::unique_ptr<Importer> importer;
Zach Reizner4a253652015-09-10 18:30:54 -0700141 const gralloc_module_t *gralloc;
142 DummySwSyncTimeline dummy_timeline;
Haixia Shid21f5282015-10-05 14:35:09 -0700143 VirtualCompositorWorker virtual_compositor_worker;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500144};
145
Zach Reizner4a253652015-09-10 18:30:54 -0700146static native_handle_t *dup_buffer_handle(buffer_handle_t handle) {
147 native_handle_t *new_handle =
148 native_handle_create(handle->numFds, handle->numInts);
149 if (new_handle == NULL)
150 return NULL;
151
152 const int *old_data = handle->data;
153 int *new_data = new_handle->data;
154 for (int i = 0; i < handle->numFds; i++) {
155 *new_data = dup(*old_data);
156 old_data++;
157 new_data++;
158 }
159 memcpy(new_data, old_data, sizeof(int) * handle->numInts);
160
161 return new_handle;
162}
163
164static void free_buffer_handle(native_handle_t *handle) {
165 int ret = native_handle_close(handle);
166 if (ret)
167 ALOGE("Failed to close native handle %d", ret);
168 ret = native_handle_delete(handle);
169 if (ret)
170 ALOGE("Failed to delete native handle %d", ret);
171}
172
Zach Reiznerf99d53f2015-10-09 13:02:55 -0700173const hwc_drm_bo *DrmHwcBuffer::operator->() const {
Zach Reizner4a253652015-09-10 18:30:54 -0700174 if (importer_ == NULL) {
Zach Reiznerf99d53f2015-10-09 13:02:55 -0700175 ALOGE("Access of non-existent BO");
Zach Reizner4a253652015-09-10 18:30:54 -0700176 exit(1);
177 return NULL;
178 }
179 return &bo_;
180}
181
182void DrmHwcBuffer::Clear() {
183 if (importer_ != NULL) {
184 importer_->ReleaseBuffer(&bo_);
185 importer_ = NULL;
186 }
187}
188
189int DrmHwcBuffer::ImportBuffer(buffer_handle_t handle, Importer *importer) {
190 hwc_drm_bo tmp_bo;
191
192 int ret = importer->ImportBuffer(handle, &tmp_bo);
193 if (ret)
194 return ret;
195
196 if (importer_ != NULL) {
197 importer_->ReleaseBuffer(&bo_);
198 }
199
200 importer_ = importer;
201
202 bo_ = tmp_bo;
203
204 return 0;
205}
206
207int DrmHwcNativeHandle::CopyBufferHandle(buffer_handle_t handle,
208 const gralloc_module_t *gralloc) {
209 native_handle_t *handle_copy = dup_buffer_handle(handle);
210 if (handle_copy == NULL) {
211 ALOGE("Failed to duplicate handle");
212 return -ENOMEM;
213 }
214
215 int ret = gralloc->registerBuffer(gralloc, handle_copy);
216 if (ret) {
217 ALOGE("Failed to register buffer handle %d", ret);
218 free_buffer_handle(handle_copy);
219 return ret;
220 }
221
222 Clear();
223
224 gralloc_ = gralloc;
225 handle_ = handle_copy;
226
227 return 0;
228}
229
230DrmHwcNativeHandle::~DrmHwcNativeHandle() {
231 Clear();
232}
233
234void DrmHwcNativeHandle::Clear() {
235 if (gralloc_ != NULL && handle_ != NULL) {
236 gralloc_->unregisterBuffer(gralloc_, handle_);
237 free_buffer_handle(handle_);
238 gralloc_ = NULL;
239 handle_ = NULL;
240 }
241}
242
243int DrmHwcLayer::InitFromHwcLayer(hwc_layer_1_t *sf_layer, Importer *importer,
244 const gralloc_module_t *gralloc) {
245 sf_handle = sf_layer->handle;
Zach Reizner4a253652015-09-10 18:30:54 -0700246 alpha = sf_layer->planeAlpha;
247
Zach Reizner7e88be92015-10-12 15:20:33 -0700248 source_crop = DrmHwcRect<float>(
249 sf_layer->sourceCropf.left, sf_layer->sourceCropf.top,
250 sf_layer->sourceCropf.right, sf_layer->sourceCropf.bottom);
251 display_frame = DrmHwcRect<int>(
252 sf_layer->displayFrame.left, sf_layer->displayFrame.top,
253 sf_layer->displayFrame.right, sf_layer->displayFrame.bottom);
254
Sean Paul04b47ea2015-11-19 21:46:11 -0500255 transform = 0;
256 // 270* and 180* cannot be combined with flips. More specifically, they
257 // already contain both horizontal and vertical flips, so those fields are
258 // redundant in this case. 90* rotation can be combined with either horizontal
259 // flip or vertical flip, so treat it differently
260 if (sf_layer->transform == HWC_TRANSFORM_ROT_270) {
261 transform = DrmHwcTransform::kRotate270;
262 } else if (sf_layer->transform == HWC_TRANSFORM_ROT_180) {
263 transform = DrmHwcTransform::kRotate180;
264 } else {
265 if (sf_layer->transform & HWC_TRANSFORM_FLIP_H)
266 transform |= DrmHwcTransform::kFlipH;
267 if (sf_layer->transform & HWC_TRANSFORM_FLIP_V)
268 transform |= DrmHwcTransform::kFlipV;
269 if (sf_layer->transform & HWC_TRANSFORM_ROT_90)
270 transform |= DrmHwcTransform::kRotate90;
Zach Reizner4a253652015-09-10 18:30:54 -0700271 }
272
273 switch (sf_layer->blending) {
274 case HWC_BLENDING_NONE:
275 blending = DrmHwcBlending::kNone;
276 break;
277 case HWC_BLENDING_PREMULT:
278 blending = DrmHwcBlending::kPreMult;
279 break;
280 case HWC_BLENDING_COVERAGE:
281 blending = DrmHwcBlending::kCoverage;
282 break;
283 default:
284 ALOGE("Invalid blending in hwc_layer_1_t %d", sf_layer->blending);
285 return -EINVAL;
286 }
287
Zach Reizner7e88be92015-10-12 15:20:33 -0700288 int ret = buffer.ImportBuffer(sf_layer->handle, importer);
289 if (ret)
290 return ret;
291
292 ret = handle.CopyBufferHandle(sf_layer->handle, gralloc);
293 if (ret)
294 return ret;
Zach Reizner4a253652015-09-10 18:30:54 -0700295
Zach Reizner36d7c6e2015-10-20 10:58:19 -0700296 ret = gralloc->perform(gralloc, GRALLOC_MODULE_PERFORM_GET_USAGE,
297 handle.get(), &gralloc_buffer_usage);
298 if (ret) {
Zach Reizner36d7c6e2015-10-20 10:58:19 -0700299 ALOGE("Failed to get usage for buffer %p (%d)", handle.get(), ret);
300 return ret;
Zach Reizner36d7c6e2015-10-20 10:58:19 -0700301 }
302
Zach Reizner4a253652015-09-10 18:30:54 -0700303 return 0;
304}
305
Zach Reiznerc6520e42015-08-13 14:32:09 -0700306static void hwc_dump(struct hwc_composer_device_1 *dev, char *buff,
Sean Paul9046c642015-06-10 17:27:47 -0400307 int buff_len) {
308 struct hwc_context_t *ctx = (struct hwc_context_t *)&dev->common;
309 std::ostringstream out;
310
311 ctx->drm.compositor()->Dump(&out);
312 std::string out_str = out.str();
Zach Reiznerfd6dc332015-10-13 21:12:48 -0700313 strncpy(buff, out_str.c_str(),
314 std::min((size_t)buff_len, out_str.length() + 1));
315 buff[buff_len - 1] = '\0';
Sean Paul9046c642015-06-10 17:27:47 -0400316}
317
Sean Paulbd61c8d2015-10-29 15:00:17 -0400318static bool hwc_skip_layer(const std::pair<int, int> &indices, int i) {
319 return indices.first >= 0 && i >= indices.first && i <= indices.second;
320}
321
Sean Paulb386f1b2015-05-13 06:33:23 -0700322static int hwc_prepare(hwc_composer_device_1_t *dev, size_t num_displays,
Sean Paulef8f1f92015-04-29 16:05:23 -0400323 hwc_display_contents_1_t **display_contents) {
Sean Paulb386f1b2015-05-13 06:33:23 -0700324 struct hwc_context_t *ctx = (struct hwc_context_t *)&dev->common;
Zach Reizner1946fa72015-08-14 11:14:38 -0700325
Sean Paule42febf2015-05-07 11:35:29 -0700326 for (int i = 0; i < (int)num_displays; ++i) {
Sean Paulef8f1f92015-04-29 16:05:23 -0400327 if (!display_contents[i])
328 continue;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500329
Sean Paul6f82f1d2015-10-21 20:05:05 -0400330 bool use_framebuffer_target = false;
Haixia Shid21f5282015-10-05 14:35:09 -0700331 if (i == HWC_DISPLAY_VIRTUAL) {
332 use_framebuffer_target = true;
333 } else {
334 DrmCrtc *crtc = ctx->drm.GetCrtcForDisplay(i);
335 if (!crtc) {
336 ALOGE("No crtc for display %d", i);
337 return -ENODEV;
338 }
Sean Paulb386f1b2015-05-13 06:33:23 -0700339 }
Sean Paulb386f1b2015-05-13 06:33:23 -0700340
Sean Paulbd61c8d2015-10-29 15:00:17 -0400341 // Since we can't composite HWC_SKIP_LAYERs by ourselves, we'll let SF
342 // handle all layers in between the first and last skip layers. So find the
343 // outer indices and mark everything in between as HWC_FRAMEBUFFER
344 std::pair<int, int> skip_layer_indices(-1, -1);
Zach Reizner45624d32015-06-10 16:03:01 -0700345 int num_layers = display_contents[i]->numHwLayers;
Sean Paulbd61c8d2015-10-29 15:00:17 -0400346 for (int j = 0; !use_framebuffer_target && j < num_layers; ++j) {
Sean Paulb386f1b2015-05-13 06:33:23 -0700347 hwc_layer_1_t *layer = &display_contents[i]->hwLayers[j];
Zach Reizner45624d32015-06-10 16:03:01 -0700348
Sean Paulbd61c8d2015-10-29 15:00:17 -0400349 if (!(layer->flags & HWC_SKIP_LAYER))
350 continue;
351
352 if (skip_layer_indices.first == -1)
353 skip_layer_indices.first = j;
354 skip_layer_indices.second = j;
355 }
356
357 for (int j = 0; j < num_layers; ++j) {
358 hwc_layer_1_t *layer = &display_contents[i]->hwLayers[j];
359
360 if (!use_framebuffer_target && !hwc_skip_layer(skip_layer_indices, j)) {
Zach Reizner1946fa72015-08-14 11:14:38 -0700361 if (layer->compositionType == HWC_FRAMEBUFFER)
362 layer->compositionType = HWC_OVERLAY;
363 } else {
364 switch (layer->compositionType) {
365 case HWC_OVERLAY:
366 case HWC_BACKGROUND:
367 case HWC_SIDEBAND:
368 case HWC_CURSOR_OVERLAY:
369 layer->compositionType = HWC_FRAMEBUFFER;
370 break;
371 }
372 }
Sean Paulef8f1f92015-04-29 16:05:23 -0400373 }
374 }
Sean Pauldffca952015-02-04 10:19:55 -0800375
Sean Paulef8f1f92015-04-29 16:05:23 -0400376 return 0;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500377}
378
Zach Reizner09807052015-08-13 14:53:41 -0700379static void hwc_add_layer_to_retire_fence(
380 hwc_layer_1_t *layer, hwc_display_contents_1_t *display_contents) {
Sean Paul04206122015-07-16 15:59:24 -0400381 if (layer->releaseFenceFd < 0)
382 return;
383
384 if (display_contents->retireFenceFd >= 0) {
385 int old_retire_fence = display_contents->retireFenceFd;
Zach Reiznerc6520e42015-08-13 14:32:09 -0700386 display_contents->retireFenceFd =
387 sync_merge("dc_retire", old_retire_fence, layer->releaseFenceFd);
Sean Paul04206122015-07-16 15:59:24 -0400388 close(old_retire_fence);
389 } else {
390 display_contents->retireFenceFd = dup(layer->releaseFenceFd);
391 }
392}
393
Sean Paule0c4c3d2015-01-20 16:56:04 -0500394static int hwc_set(hwc_composer_device_1_t *dev, size_t num_displays,
Zach Reizner4a253652015-09-10 18:30:54 -0700395 hwc_display_contents_1_t **sf_display_contents) {
Stéphane Marchesinbe98c8c2015-06-23 16:18:10 -0700396 ATRACE_CALL();
Sean Paulef8f1f92015-04-29 16:05:23 -0400397 struct hwc_context_t *ctx = (struct hwc_context_t *)&dev->common;
Zach Reizner4a253652015-09-10 18:30:54 -0700398 int ret = 0;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500399
Zach Reizner4a253652015-09-10 18:30:54 -0700400 std::vector<CheckedOutputFd> checked_output_fences;
401 std::vector<DrmHwcDisplayContents> displays_contents;
Zach Reizner09807052015-08-13 14:53:41 -0700402 std::vector<DrmCompositionDisplayLayersMap> layers_map;
403 std::vector<std::vector<size_t>> layers_indices;
Zach Reizner4a253652015-09-10 18:30:54 -0700404 displays_contents.reserve(num_displays);
405 // layers_map.reserve(num_displays);
Zach Reizner09807052015-08-13 14:53:41 -0700406 layers_indices.reserve(num_displays);
407
Zach Reizner4a253652015-09-10 18:30:54 -0700408 // Phase one does nothing that would cause errors. Only take ownership of FDs.
409 for (size_t i = 0; i < num_displays; ++i) {
410 hwc_display_contents_1_t *dc = sf_display_contents[i];
411 displays_contents.emplace_back();
412 DrmHwcDisplayContents &display_contents = displays_contents.back();
Haixia Shi7acc59b2015-09-30 10:57:54 -0700413 layers_indices.emplace_back();
414 std::vector<size_t> &indices_to_composite = layers_indices.back();
Zach Reizner4a253652015-09-10 18:30:54 -0700415
416 if (!sf_display_contents[i])
Sean Paulb386f1b2015-05-13 06:33:23 -0700417 continue;
Zach Reizner09807052015-08-13 14:53:41 -0700418
Haixia Shid21f5282015-10-05 14:35:09 -0700419 if (i == HWC_DISPLAY_VIRTUAL) {
420 ctx->virtual_compositor_worker.QueueComposite(dc);
421 continue;
422 }
423
Zach Reizner4a253652015-09-10 18:30:54 -0700424 std::ostringstream display_index_formatter;
425 display_index_formatter << "retire fence for display " << i;
426 std::string display_fence_description(display_index_formatter.str());
427 checked_output_fences.emplace_back(&dc->retireFenceFd,
428 display_fence_description.c_str(),
429 ctx->dummy_timeline);
430 display_contents.retire_fence = OutputFd(&dc->retireFenceFd);
Zach Reizner09807052015-08-13 14:53:41 -0700431
Zach Reizner4a253652015-09-10 18:30:54 -0700432 size_t num_dc_layers = dc->numHwLayers;
Haixia Shi1034bb72015-09-09 12:08:20 -0700433 int framebuffer_target_index = -1;
Zach Reizner4a253652015-09-10 18:30:54 -0700434 for (size_t j = 0; j < num_dc_layers; ++j) {
435 hwc_layer_1_t *sf_layer = &dc->hwLayers[j];
Sean Paulbd61c8d2015-10-29 15:00:17 -0400436 if (sf_layer->compositionType == HWC_FRAMEBUFFER_TARGET) {
437 framebuffer_target_index = j;
438 break;
439 }
440 }
441
442 for (size_t j = 0; j < num_dc_layers; ++j) {
443 hwc_layer_1_t *sf_layer = &dc->hwLayers[j];
Zach Reizner4a253652015-09-10 18:30:54 -0700444
445 display_contents.layers.emplace_back();
446 DrmHwcLayer &layer = display_contents.layers.back();
447
Sean Paulbd61c8d2015-10-29 15:00:17 -0400448 // In prepare() we marked all layers FRAMEBUFFER between SKIP_LAYER's.
449 // This means we should insert the FB_TARGET layer in the composition
450 // stack at the location of the first skip layer, and ignore the rest.
451 if (sf_layer->flags & HWC_SKIP_LAYER) {
452 if (framebuffer_target_index < 0)
453 continue;
454 int idx = framebuffer_target_index;
455 framebuffer_target_index = -1;
456 hwc_layer_1_t *fbt_layer = &dc->hwLayers[idx];
457 if (!fbt_layer->handle || (fbt_layer->flags & HWC_SKIP_LAYER)) {
458 ALOGE("Invalid HWC_FRAMEBUFFER_TARGET with HWC_SKIP_LAYER present");
459 continue;
460 }
461 indices_to_composite.push_back(idx);
Sean Paulb386f1b2015-05-13 06:33:23 -0700462 continue;
Sean Paulbd61c8d2015-10-29 15:00:17 -0400463 }
Zach Reizner4a253652015-09-10 18:30:54 -0700464
Sean Paul6f82f1d2015-10-21 20:05:05 -0400465 if (sf_layer->compositionType == HWC_OVERLAY)
466 indices_to_composite.push_back(j);
Zach Reizner4a253652015-09-10 18:30:54 -0700467
468 layer.acquire_fence.Set(sf_layer->acquireFenceFd);
469 sf_layer->acquireFenceFd = -1;
470
471 std::ostringstream layer_fence_formatter;
472 layer_fence_formatter << "release fence for layer " << j << " of display "
473 << i;
474 std::string layer_fence_description(layer_fence_formatter.str());
475 checked_output_fences.emplace_back(&sf_layer->releaseFenceFd,
476 layer_fence_description.c_str(),
477 ctx->dummy_timeline);
478 layer.release_fence = OutputFd(&sf_layer->releaseFenceFd);
Zach Reizner1946fa72015-08-14 11:14:38 -0700479 }
Zach Reizner4a253652015-09-10 18:30:54 -0700480
Sean Paulbd61c8d2015-10-29 15:00:17 -0400481 // This is a catch-all in case we get a frame without any overlay layers, or
482 // skip layers, but with a value fb_target layer. This _shouldn't_ happen,
483 // but it's not ruled out by the hwc specification
Sean Paul6f82f1d2015-10-21 20:05:05 -0400484 if (indices_to_composite.empty() && framebuffer_target_index >= 0) {
485 hwc_layer_1_t *sf_layer = &dc->hwLayers[framebuffer_target_index];
486 if (!sf_layer->handle || (sf_layer->flags & HWC_SKIP_LAYER)) {
487 ALOGE(
488 "Expected valid layer with HWC_FRAMEBUFFER_TARGET when all "
489 "HWC_OVERLAY layers are skipped.");
Zach Reizner4a253652015-09-10 18:30:54 -0700490 ret = -EINVAL;
Zach Reizner1946fa72015-08-14 11:14:38 -0700491 }
Sean Paul6f82f1d2015-10-21 20:05:05 -0400492 indices_to_composite.push_back(framebuffer_target_index);
Zach Reizner45624d32015-06-10 16:03:01 -0700493 }
Zach Reizner4a253652015-09-10 18:30:54 -0700494 }
Zach Reizner45624d32015-06-10 16:03:01 -0700495
Zach Reizner4a253652015-09-10 18:30:54 -0700496 if (ret)
497 return ret;
498
499 for (size_t i = 0; i < num_displays; ++i) {
500 hwc_display_contents_1_t *dc = sf_display_contents[i];
501 DrmHwcDisplayContents &display_contents = displays_contents[i];
Haixia Shi2fddd372015-10-15 16:21:48 -0700502 if (!sf_display_contents[i] || i == HWC_DISPLAY_VIRTUAL)
Zach Reizner4a253652015-09-10 18:30:54 -0700503 continue;
504
505 layers_map.emplace_back();
506 DrmCompositionDisplayLayersMap &map = layers_map.back();
Zach Reizneracba14b2015-10-13 18:19:26 -0700507 map.display = i;
Zach Reizner5757e822015-10-16 19:06:31 -0700508 map.geometry_changed =
509 (dc->flags & HWC_GEOMETRY_CHANGED) == HWC_GEOMETRY_CHANGED;
Zach Reizner4a253652015-09-10 18:30:54 -0700510 std::vector<size_t> &indices_to_composite = layers_indices[i];
511 for (size_t j : indices_to_composite) {
512 hwc_layer_1_t *sf_layer = &dc->hwLayers[j];
513
514 DrmHwcLayer &layer = display_contents.layers[j];
515
Zach Reiznerff30b522015-10-28 19:08:45 -0700516 ret = layer.InitFromHwcLayer(sf_layer, ctx->importer.get(), ctx->gralloc);
Zach Reizner7e88be92015-10-12 15:20:33 -0700517 if (ret) {
518 ALOGE("Failed to init composition from layer %d", ret);
519 return ret;
520 }
Zach Reizner4a253652015-09-10 18:30:54 -0700521 map.layers.emplace_back(std::move(layer));
522 }
523 }
524
525 std::unique_ptr<DrmComposition> composition(
Zach Reiznerff30b522015-10-28 19:08:45 -0700526 ctx->drm.compositor()->CreateComposition(ctx->importer.get()));
Zach Reizner4a253652015-09-10 18:30:54 -0700527 if (!composition) {
528 ALOGE("Drm composition init failed");
529 return -EINVAL;
Zach Reizner09807052015-08-13 14:53:41 -0700530 }
Zach Reizner45624d32015-06-10 16:03:01 -0700531
Zach Reizner09807052015-08-13 14:53:41 -0700532 ret = composition->SetLayers(layers_map.size(), layers_map.data());
533 if (ret) {
Zach Reizner09807052015-08-13 14:53:41 -0700534 return -EINVAL;
535 }
Zach Reizner45624d32015-06-10 16:03:01 -0700536
Zach Reizner09807052015-08-13 14:53:41 -0700537 ret = ctx->drm.compositor()->QueueComposition(std::move(composition));
538 if (ret) {
Zach Reizner09807052015-08-13 14:53:41 -0700539 return -EINVAL;
540 }
541
Zach Reizner566da2b2015-10-06 15:39:09 -0700542 for (size_t i = 0; i < num_displays; ++i) {
543 hwc_display_contents_1_t *dc = sf_display_contents[i];
544 if (!dc)
545 continue;
546
547 size_t num_dc_layers = dc->numHwLayers;
548 for (size_t j = 0; j < num_dc_layers; ++j) {
549 hwc_layer_1_t *layer = &dc->hwLayers[j];
550 if (layer->flags & HWC_SKIP_LAYER)
551 continue;
552 hwc_add_layer_to_retire_fence(layer, dc);
553 }
554 }
555
Zach Reizner09807052015-08-13 14:53:41 -0700556 composition.reset(NULL);
557
Sean Paulef8f1f92015-04-29 16:05:23 -0400558 return ret;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500559}
560
Sean Paulef8f1f92015-04-29 16:05:23 -0400561static int hwc_event_control(struct hwc_composer_device_1 *dev, int display,
562 int event, int enabled) {
Sean Paulef8f1f92015-04-29 16:05:23 -0400563 if (event != HWC_EVENT_VSYNC || (enabled != 0 && enabled != 1))
564 return -EINVAL;
Sean Pauleb9e75c2015-01-25 23:31:30 -0500565
Sean Paul4057be32015-05-13 06:23:09 -0700566 struct hwc_context_t *ctx = (struct hwc_context_t *)&dev->common;
567 hwc_drm_display_t *hd = &ctx->displays[display];
568 return hd->vsync_worker.VSyncControl(enabled);
Sean Paule0c4c3d2015-01-20 16:56:04 -0500569}
570
Sean Paulef8f1f92015-04-29 16:05:23 -0400571static int hwc_set_power_mode(struct hwc_composer_device_1 *dev, int display,
572 int mode) {
573 struct hwc_context_t *ctx = (struct hwc_context_t *)&dev->common;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500574
Sean Paul6a55e9f2015-04-30 15:31:06 -0400575 uint64_t dpmsValue = 0;
Sean Paulef8f1f92015-04-29 16:05:23 -0400576 switch (mode) {
577 case HWC_POWER_MODE_OFF:
Sean Paul6a55e9f2015-04-30 15:31:06 -0400578 dpmsValue = DRM_MODE_DPMS_OFF;
Sean Paulef8f1f92015-04-29 16:05:23 -0400579 break;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500580
Sean Paulef8f1f92015-04-29 16:05:23 -0400581 /* We can't support dozing right now, so go full on */
582 case HWC_POWER_MODE_DOZE:
583 case HWC_POWER_MODE_DOZE_SUSPEND:
584 case HWC_POWER_MODE_NORMAL:
Sean Paul6a55e9f2015-04-30 15:31:06 -0400585 dpmsValue = DRM_MODE_DPMS_ON;
Sean Paulef8f1f92015-04-29 16:05:23 -0400586 break;
587 };
Sean Paul6a55e9f2015-04-30 15:31:06 -0400588 return ctx->drm.SetDpmsMode(display, dpmsValue);
Sean Paule0c4c3d2015-01-20 16:56:04 -0500589}
590
Sean Paulef8f1f92015-04-29 16:05:23 -0400591static int hwc_query(struct hwc_composer_device_1 * /* dev */, int what,
592 int *value) {
593 switch (what) {
594 case HWC_BACKGROUND_LAYER_SUPPORTED:
595 *value = 0; /* TODO: We should do this */
596 break;
597 case HWC_VSYNC_PERIOD:
598 ALOGW("Query for deprecated vsync value, returning 60Hz");
599 *value = 1000 * 1000 * 1000 / 60;
600 break;
601 case HWC_DISPLAY_TYPES_SUPPORTED:
Haixia Shi2fddd372015-10-15 16:21:48 -0700602 *value = HWC_DISPLAY_PRIMARY_BIT | HWC_DISPLAY_EXTERNAL_BIT |
603 HWC_DISPLAY_VIRTUAL_BIT;
Sean Paulef8f1f92015-04-29 16:05:23 -0400604 break;
605 }
606 return 0;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500607}
608
Sean Paulef8f1f92015-04-29 16:05:23 -0400609static void hwc_register_procs(struct hwc_composer_device_1 *dev,
610 hwc_procs_t const *procs) {
611 struct hwc_context_t *ctx = (struct hwc_context_t *)&dev->common;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500612
Sean Paulef8f1f92015-04-29 16:05:23 -0400613 ctx->procs = procs;
Sean Paul4057be32015-05-13 06:23:09 -0700614
Zach Reiznerff30b522015-10-28 19:08:45 -0700615 for (std::pair<const int, hwc_drm_display> &display_entry : ctx->displays)
616 display_entry.second.vsync_worker.SetProcs(procs);
Sean Paule0c4c3d2015-01-20 16:56:04 -0500617}
618
Sean Paulef8f1f92015-04-29 16:05:23 -0400619static int hwc_get_display_configs(struct hwc_composer_device_1 *dev,
620 int display, uint32_t *configs,
Sean Paul6a55e9f2015-04-30 15:31:06 -0400621 size_t *num_configs) {
622 if (!*num_configs)
Sean Paulef8f1f92015-04-29 16:05:23 -0400623 return 0;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500624
Sean Paulef8f1f92015-04-29 16:05:23 -0400625 struct hwc_context_t *ctx = (struct hwc_context_t *)&dev->common;
Sean Paule42febf2015-05-07 11:35:29 -0700626 hwc_drm_display_t *hd = &ctx->displays[display];
Sean Paul6a55e9f2015-04-30 15:31:06 -0400627 hd->config_ids.clear();
628
629 DrmConnector *connector = ctx->drm.GetConnectorForDisplay(display);
630 if (!connector) {
631 ALOGE("Failed to get connector for display %d", display);
Sean Paulef8f1f92015-04-29 16:05:23 -0400632 return -ENODEV;
633 }
Sean Paule0c4c3d2015-01-20 16:56:04 -0500634
Sean Paule42febf2015-05-07 11:35:29 -0700635 int ret = connector->UpdateModes();
Sean Paul6a55e9f2015-04-30 15:31:06 -0400636 if (ret) {
637 ALOGE("Failed to update display modes %d", ret);
Sean Paulef8f1f92015-04-29 16:05:23 -0400638 return ret;
Sean Paulef8f1f92015-04-29 16:05:23 -0400639 }
Sean Paule0c4c3d2015-01-20 16:56:04 -0500640
Zach Reiznerff30b522015-10-28 19:08:45 -0700641 for (const DrmMode &mode : connector->modes()) {
Sean Paul6a55e9f2015-04-30 15:31:06 -0400642 size_t idx = hd->config_ids.size();
643 if (idx == *num_configs)
644 break;
Zach Reiznerff30b522015-10-28 19:08:45 -0700645 hd->config_ids.push_back(mode.id());
646 configs[idx] = mode.id();
Sean Paul6a55e9f2015-04-30 15:31:06 -0400647 }
648 *num_configs = hd->config_ids.size();
649 return *num_configs == 0 ? -1 : 0;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500650}
651
Sean Paulef8f1f92015-04-29 16:05:23 -0400652static int hwc_get_display_attributes(struct hwc_composer_device_1 *dev,
653 int display, uint32_t config,
654 const uint32_t *attributes,
655 int32_t *values) {
656 struct hwc_context_t *ctx = (struct hwc_context_t *)&dev->common;
Sean Paul6a55e9f2015-04-30 15:31:06 -0400657 DrmConnector *c = ctx->drm.GetConnectorForDisplay(display);
Sean Paulef8f1f92015-04-29 16:05:23 -0400658 if (!c) {
Sean Paul6a55e9f2015-04-30 15:31:06 -0400659 ALOGE("Failed to get DrmConnector for display %d", display);
Sean Paulef8f1f92015-04-29 16:05:23 -0400660 return -ENODEV;
661 }
Sean Paul6a55e9f2015-04-30 15:31:06 -0400662 DrmMode mode;
Zach Reiznerff30b522015-10-28 19:08:45 -0700663 for (const DrmMode &conn_mode : c->modes()) {
664 if (conn_mode.id() == config) {
665 mode = conn_mode;
Sean Paul6a55e9f2015-04-30 15:31:06 -0400666 break;
667 }
668 }
669 if (mode.id() == 0) {
670 ALOGE("Failed to find active mode for display %d", display);
671 return -ENOENT;
Sean Paulef8f1f92015-04-29 16:05:23 -0400672 }
Sean Paule0c4c3d2015-01-20 16:56:04 -0500673
Sean Paul6a55e9f2015-04-30 15:31:06 -0400674 uint32_t mm_width = c->mm_width();
675 uint32_t mm_height = c->mm_height();
Sean Paulef8f1f92015-04-29 16:05:23 -0400676 for (int i = 0; attributes[i] != HWC_DISPLAY_NO_ATTRIBUTE; ++i) {
677 switch (attributes[i]) {
678 case HWC_DISPLAY_VSYNC_PERIOD:
Sean Paul6a55e9f2015-04-30 15:31:06 -0400679 values[i] = 1000 * 1000 * 1000 / mode.v_refresh();
Sean Paulef8f1f92015-04-29 16:05:23 -0400680 break;
681 case HWC_DISPLAY_WIDTH:
Sean Paul6a55e9f2015-04-30 15:31:06 -0400682 values[i] = mode.h_display();
Sean Paulef8f1f92015-04-29 16:05:23 -0400683 break;
684 case HWC_DISPLAY_HEIGHT:
Sean Paul6a55e9f2015-04-30 15:31:06 -0400685 values[i] = mode.v_display();
Sean Paulef8f1f92015-04-29 16:05:23 -0400686 break;
687 case HWC_DISPLAY_DPI_X:
688 /* Dots per 1000 inches */
Sean Paul6a55e9f2015-04-30 15:31:06 -0400689 values[i] = mm_width ? (mode.h_display() * UM_PER_INCH) / mm_width : 0;
Sean Paulef8f1f92015-04-29 16:05:23 -0400690 break;
691 case HWC_DISPLAY_DPI_Y:
692 /* Dots per 1000 inches */
Sean Paul6a55e9f2015-04-30 15:31:06 -0400693 values[i] =
694 mm_height ? (mode.v_display() * UM_PER_INCH) / mm_height : 0;
Sean Paulef8f1f92015-04-29 16:05:23 -0400695 break;
696 }
697 }
Sean Paulef8f1f92015-04-29 16:05:23 -0400698 return 0;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500699}
700
Sean Paulef8f1f92015-04-29 16:05:23 -0400701static int hwc_get_active_config(struct hwc_composer_device_1 *dev,
702 int display) {
703 struct hwc_context_t *ctx = (struct hwc_context_t *)&dev->common;
Sean Paul6a55e9f2015-04-30 15:31:06 -0400704 DrmConnector *c = ctx->drm.GetConnectorForDisplay(display);
705 if (!c) {
706 ALOGE("Failed to get DrmConnector for display %d", display);
Sean Paulef8f1f92015-04-29 16:05:23 -0400707 return -ENODEV;
708 }
Sean Paule0c4c3d2015-01-20 16:56:04 -0500709
Sean Paul6a55e9f2015-04-30 15:31:06 -0400710 DrmMode mode = c->active_mode();
Sean Paule42febf2015-05-07 11:35:29 -0700711 hwc_drm_display_t *hd = &ctx->displays[display];
Sean Paul6a55e9f2015-04-30 15:31:06 -0400712 for (size_t i = 0; i < hd->config_ids.size(); ++i) {
713 if (hd->config_ids[i] == mode.id())
714 return i;
Sean Paulef8f1f92015-04-29 16:05:23 -0400715 }
Sean Paul6a55e9f2015-04-30 15:31:06 -0400716 return -1;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500717}
718
Sean Paulef8f1f92015-04-29 16:05:23 -0400719static int hwc_set_active_config(struct hwc_composer_device_1 *dev, int display,
720 int index) {
721 struct hwc_context_t *ctx = (struct hwc_context_t *)&dev->common;
Sean Paule42febf2015-05-07 11:35:29 -0700722 hwc_drm_display_t *hd = &ctx->displays[display];
Sean Paul6a55e9f2015-04-30 15:31:06 -0400723 if (index >= (int)hd->config_ids.size()) {
724 ALOGE("Invalid config index %d passed in", index);
725 return -EINVAL;
Sean Paulef8f1f92015-04-29 16:05:23 -0400726 }
Sean Paule0c4c3d2015-01-20 16:56:04 -0500727
Sean Paul877be972015-06-03 14:08:27 -0400728 DrmConnector *c = ctx->drm.GetConnectorForDisplay(display);
729 if (!c) {
730 ALOGE("Failed to get connector for display %d", display);
731 return -ENODEV;
732 }
733 DrmMode mode;
Zach Reiznerff30b522015-10-28 19:08:45 -0700734 for (const DrmMode &conn_mode : c->modes()) {
735 if (conn_mode.id() == hd->config_ids[index]) {
736 mode = conn_mode;
Sean Paul877be972015-06-03 14:08:27 -0400737 break;
738 }
739 }
740 if (mode.id() != hd->config_ids[index]) {
741 ALOGE("Could not find active mode for %d/%d", index, hd->config_ids[index]);
742 return -ENOENT;
743 }
744 int ret = ctx->drm.SetDisplayActiveMode(display, mode);
Sean Paul6a55e9f2015-04-30 15:31:06 -0400745 if (ret) {
Sean Paul877be972015-06-03 14:08:27 -0400746 ALOGE("Failed to set active config %d", ret);
Sean Paul6a55e9f2015-04-30 15:31:06 -0400747 return ret;
Sean Paulef8f1f92015-04-29 16:05:23 -0400748 }
Sean Paul6a55e9f2015-04-30 15:31:06 -0400749 return ret;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500750}
751
Sean Paulef8f1f92015-04-29 16:05:23 -0400752static int hwc_device_close(struct hw_device_t *dev) {
753 struct hwc_context_t *ctx = (struct hwc_context_t *)dev;
Sean Paulef8f1f92015-04-29 16:05:23 -0400754 delete ctx;
Sean Paulef8f1f92015-04-29 16:05:23 -0400755 return 0;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500756}
757
Sean Paul24a26e32015-02-04 10:34:47 -0800758/*
759 * TODO: This function sets the active config to the first one in the list. This
760 * should be fixed such that it selects the preferred mode for the display, or
761 * some other, saner, method of choosing the config.
762 */
Sean Paule42febf2015-05-07 11:35:29 -0700763static int hwc_set_initial_config(hwc_drm_display_t *hd) {
Sean Paulef8f1f92015-04-29 16:05:23 -0400764 uint32_t config;
765 size_t num_configs = 1;
766 int ret = hwc_get_display_configs(&hd->ctx->device, hd->display, &config,
767 &num_configs);
768 if (ret || !num_configs)
769 return 0;
Sean Paul24a26e32015-02-04 10:34:47 -0800770
Sean Paulef8f1f92015-04-29 16:05:23 -0400771 ret = hwc_set_active_config(&hd->ctx->device, hd->display, 0);
772 if (ret) {
773 ALOGE("Failed to set active config d=%d ret=%d", hd->display, ret);
774 return ret;
775 }
Sean Paul24a26e32015-02-04 10:34:47 -0800776
Sean Paulef8f1f92015-04-29 16:05:23 -0400777 return ret;
Sean Paul24a26e32015-02-04 10:34:47 -0800778}
779
Sean Paul6a55e9f2015-04-30 15:31:06 -0400780static int hwc_initialize_display(struct hwc_context_t *ctx, int display) {
Sean Paule42febf2015-05-07 11:35:29 -0700781 hwc_drm_display_t *hd = &ctx->displays[display];
Sean Paulef8f1f92015-04-29 16:05:23 -0400782 hd->ctx = ctx;
783 hd->display = display;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500784
Sean Paulb386f1b2015-05-13 06:33:23 -0700785 int ret = hwc_set_initial_config(hd);
Sean Paulef8f1f92015-04-29 16:05:23 -0400786 if (ret) {
787 ALOGE("Failed to set initial config for d=%d ret=%d", display, ret);
Sean Paulef8f1f92015-04-29 16:05:23 -0400788 return ret;
789 }
Sean Paul24a26e32015-02-04 10:34:47 -0800790
Sean Paul4057be32015-05-13 06:23:09 -0700791 ret = hd->vsync_worker.Init(&ctx->drm, display);
792 if (ret) {
793 ALOGE("Failed to create event worker for display %d %d\n", display, ret);
794 return ret;
795 }
796
Sean Paulef8f1f92015-04-29 16:05:23 -0400797 return 0;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500798}
799
Sean Paulef8f1f92015-04-29 16:05:23 -0400800static int hwc_enumerate_displays(struct hwc_context_t *ctx) {
Sean Paul6a55e9f2015-04-30 15:31:06 -0400801 int ret;
Zach Reiznerff30b522015-10-28 19:08:45 -0700802 for (auto &conn : ctx->drm.connectors()) {
803 ret = hwc_initialize_display(ctx, conn->display());
Sean Paul6a55e9f2015-04-30 15:31:06 -0400804 if (ret) {
Zach Reiznerff30b522015-10-28 19:08:45 -0700805 ALOGE("Failed to initialize display %d", conn->display());
Sean Paul6a55e9f2015-04-30 15:31:06 -0400806 return ret;
Sean Paulef8f1f92015-04-29 16:05:23 -0400807 }
808 }
Sean Paulef8f1f92015-04-29 16:05:23 -0400809
Haixia Shid21f5282015-10-05 14:35:09 -0700810 ret = ctx->virtual_compositor_worker.Init();
811 if (ret) {
812 ALOGE("Failed to initialize virtual compositor worker");
813 return ret;
814 }
Sean Paulef8f1f92015-04-29 16:05:23 -0400815 return 0;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500816}
817
Sean Paulef8f1f92015-04-29 16:05:23 -0400818static int hwc_device_open(const struct hw_module_t *module, const char *name,
819 struct hw_device_t **dev) {
820 if (strcmp(name, HWC_HARDWARE_COMPOSER)) {
821 ALOGE("Invalid module name- %s", name);
822 return -EINVAL;
823 }
824
Zach Reiznerff30b522015-10-28 19:08:45 -0700825 std::unique_ptr<hwc_context_t> ctx(new hwc_context_t());
Sean Paulef8f1f92015-04-29 16:05:23 -0400826 if (!ctx) {
827 ALOGE("Failed to allocate hwc context");
828 return -ENOMEM;
829 }
830
Sean Paul6a55e9f2015-04-30 15:31:06 -0400831 int ret = ctx->drm.Init();
832 if (ret) {
833 ALOGE("Can't initialize Drm object %d", ret);
Sean Paul6a55e9f2015-04-30 15:31:06 -0400834 return ret;
835 }
836
Zach Reizner4a253652015-09-10 18:30:54 -0700837 ret = hw_get_module(GRALLOC_HARDWARE_MODULE_ID,
838 (const hw_module_t **)&ctx->gralloc);
839 if (ret) {
840 ALOGE("Failed to open gralloc module %d", ret);
Zach Reizner4a253652015-09-10 18:30:54 -0700841 return ret;
842 }
843
844 ret = ctx->dummy_timeline.Init();
845 if (ret) {
846 ALOGE("Failed to create dummy sw sync timeline %d", ret);
847 return ret;
848 }
849
Zach Reiznerff30b522015-10-28 19:08:45 -0700850 ctx->importer.reset(Importer::CreateInstance(&ctx->drm));
Sean Paulda6270d2015-06-01 14:11:52 -0400851 if (!ctx->importer) {
852 ALOGE("Failed to create importer instance");
Sean Paulef8f1f92015-04-29 16:05:23 -0400853 return ret;
854 }
855
Zach Reiznerff30b522015-10-28 19:08:45 -0700856 ret = hwc_enumerate_displays(ctx.get());
Sean Paulef8f1f92015-04-29 16:05:23 -0400857 if (ret) {
858 ALOGE("Failed to enumerate displays: %s", strerror(ret));
Sean Paul6a55e9f2015-04-30 15:31:06 -0400859 return ret;
860 }
861
Sean Paulef8f1f92015-04-29 16:05:23 -0400862 ctx->device.common.tag = HARDWARE_DEVICE_TAG;
863 ctx->device.common.version = HWC_DEVICE_API_VERSION_1_4;
864 ctx->device.common.module = const_cast<hw_module_t *>(module);
865 ctx->device.common.close = hwc_device_close;
866
Sean Paul9046c642015-06-10 17:27:47 -0400867 ctx->device.dump = hwc_dump;
Sean Paulef8f1f92015-04-29 16:05:23 -0400868 ctx->device.prepare = hwc_prepare;
869 ctx->device.set = hwc_set;
870 ctx->device.eventControl = hwc_event_control;
871 ctx->device.setPowerMode = hwc_set_power_mode;
872 ctx->device.query = hwc_query;
873 ctx->device.registerProcs = hwc_register_procs;
874 ctx->device.getDisplayConfigs = hwc_get_display_configs;
875 ctx->device.getDisplayAttributes = hwc_get_display_attributes;
876 ctx->device.getActiveConfig = hwc_get_active_config;
877 ctx->device.setActiveConfig = hwc_set_active_config;
878 ctx->device.setCursorPositionAsync = NULL; /* TODO: Add cursor */
879
880 *dev = &ctx->device.common;
Zach Reiznerff30b522015-10-28 19:08:45 -0700881 ctx.release();
Sean Paulef8f1f92015-04-29 16:05:23 -0400882
883 return 0;
884}
Sean Paul6a55e9f2015-04-30 15:31:06 -0400885}
Sean Paulef8f1f92015-04-29 16:05:23 -0400886
Sean Paul6a55e9f2015-04-30 15:31:06 -0400887static struct hw_module_methods_t hwc_module_methods = {
888 open : android::hwc_device_open
889};
Sean Paule0c4c3d2015-01-20 16:56:04 -0500890
891hwc_module_t HAL_MODULE_INFO_SYM = {
Sean Paulef8f1f92015-04-29 16:05:23 -0400892 common : {
893 tag : HARDWARE_MODULE_TAG,
894 version_major : 1,
895 version_minor : 0,
896 id : HWC_HARDWARE_MODULE_ID,
897 name : "DRM hwcomposer module",
898 author : "The Android Open Source Project",
899 methods : &hwc_module_methods,
900 dso : NULL,
901 reserved : {0},
902 }
Sean Paule0c4c3d2015-01-20 16:56:04 -0500903};