blob: 3d39f6e4648478e16da360804f3b4c7bbdeb8585 [file] [log] [blame]
Sean Paule0c4c3d2015-01-20 16:56:04 -05001/*
2 * Copyright (C) 2015 The Android Open Source Project
3 *
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
7 *
8 * http://www.apache.org/licenses/LICENSE-2.0
9 *
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
15 */
16
Stéphane Marchesinbe98c8c2015-06-23 16:18:10 -070017#define ATRACE_TAG ATRACE_TAG_GRAPHICS
Sean Paule0c4c3d2015-01-20 16:56:04 -050018#define LOG_TAG "hwcomposer-drm"
19
Zach Reizner7642c922015-10-29 10:11:16 -070020#include "drmhwcomposer.h"
Sean Paul6a55e9f2015-04-30 15:31:06 -040021#include "drmresources.h"
Sean Paulda6270d2015-06-01 14:11:52 -040022#include "importer.h"
Haixia Shid21f5282015-10-05 14:35:09 -070023#include "virtualcompositorworker.h"
Sean Paul4057be32015-05-13 06:23:09 -070024#include "vsyncworker.h"
Sean Paulef8f1f92015-04-29 16:05:23 -040025
Zach Reizner09807052015-08-13 14:53:41 -070026#include <stdlib.h>
27
28#include <map>
29#include <vector>
Zach Reizner4a253652015-09-10 18:30:54 -070030#include <sstream>
Zach Reizner09807052015-08-13 14:53:41 -070031
Sean Paule0c4c3d2015-01-20 16:56:04 -050032#include <errno.h>
Sean Paulef8f1f92015-04-29 16:05:23 -040033#include <fcntl.h>
Sean Paulef8f1f92015-04-29 16:05:23 -040034#include <pthread.h>
Sean Paule0c4c3d2015-01-20 16:56:04 -050035#include <sys/param.h>
Sean Paul9aa5ad32015-01-22 15:47:54 -050036#include <sys/resource.h>
Sean Paule0c4c3d2015-01-20 16:56:04 -050037#include <xf86drm.h>
38#include <xf86drmMode.h>
Sean Paule0c4c3d2015-01-20 16:56:04 -050039
Sean Paulef8f1f92015-04-29 16:05:23 -040040#include <cutils/log.h>
41#include <cutils/properties.h>
Sean Paule0c4c3d2015-01-20 16:56:04 -050042#include <hardware/hardware.h>
43#include <hardware/hwcomposer.h>
Zach Reizner4a253652015-09-10 18:30:54 -070044#include <sw_sync.h>
45#include <sync/sync.h>
Stéphane Marchesinbe98c8c2015-06-23 16:18:10 -070046#include <utils/Trace.h>
Sean Paule0c4c3d2015-01-20 16:56:04 -050047
Sean Paule0c4c3d2015-01-20 16:56:04 -050048#define UM_PER_INCH 25400
49
Sean Paul6a55e9f2015-04-30 15:31:06 -040050namespace android {
Sean Paule0c4c3d2015-01-20 16:56:04 -050051
Zach Reizner4a253652015-09-10 18:30:54 -070052class DummySwSyncTimeline {
53 public:
54 int Init() {
55 int ret = timeline_fd_.Set(sw_sync_timeline_create());
56 if (ret < 0)
57 return ret;
58 return 0;
59 }
60
61 UniqueFd CreateDummyFence() {
62 int ret = sw_sync_fence_create(timeline_fd_.get(), "dummy fence",
63 timeline_pt_ + 1);
64 if (ret < 0) {
65 ALOGE("Failed to create dummy fence %d", ret);
66 return ret;
67 }
68
69 UniqueFd ret_fd(ret);
70
71 ret = sw_sync_timeline_inc(timeline_fd_.get(), 1);
72 if (ret) {
73 ALOGE("Failed to increment dummy sync timeline %d", ret);
74 return ret;
75 }
76
77 ++timeline_pt_;
78 return ret_fd;
79 }
80
81 private:
82 UniqueFd timeline_fd_;
83 int timeline_pt_ = 0;
84};
85
86struct CheckedOutputFd {
87 CheckedOutputFd(int *fd, const char *description,
88 DummySwSyncTimeline &timeline)
89 : fd_(fd), description_(description), timeline_(timeline) {
90 }
91 CheckedOutputFd(CheckedOutputFd &&rhs)
92 : description_(rhs.description_), timeline_(rhs.timeline_) {
93 std::swap(fd_, rhs.fd_);
94 }
95
96 CheckedOutputFd &operator=(const CheckedOutputFd &rhs) = delete;
97
98 ~CheckedOutputFd() {
99 if (fd_ == NULL)
100 return;
101
102 if (*fd_ >= 0)
103 return;
104
105 *fd_ = timeline_.CreateDummyFence().Release();
106
107 if (*fd_ < 0)
108 ALOGE("Failed to fill %s (%p == %d) before destruction",
109 description_.c_str(), fd_, *fd_);
110 }
111
112 private:
113 int *fd_ = NULL;
114 std::string description_;
115 DummySwSyncTimeline &timeline_;
116};
117
Sean Paule42febf2015-05-07 11:35:29 -0700118typedef struct hwc_drm_display {
Sean Paulef8f1f92015-04-29 16:05:23 -0400119 struct hwc_context_t *ctx;
120 int display;
Sean Paul9aa5ad32015-01-22 15:47:54 -0500121
Sean Paul6a55e9f2015-04-30 15:31:06 -0400122 std::vector<uint32_t> config_ids;
Sean Paul9aa5ad32015-01-22 15:47:54 -0500123
Sean Paul4057be32015-05-13 06:23:09 -0700124 VSyncWorker vsync_worker;
Sean Paule42febf2015-05-07 11:35:29 -0700125} hwc_drm_display_t;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500126
127struct hwc_context_t {
Sean Paule42febf2015-05-07 11:35:29 -0700128 // map of display:hwc_drm_display_t
129 typedef std::map<int, hwc_drm_display_t> DisplayMap;
Sean Paulda6270d2015-06-01 14:11:52 -0400130
131 ~hwc_context_t() {
Haixia Shid21f5282015-10-05 14:35:09 -0700132 virtual_compositor_worker.Exit();
Sean Paulda6270d2015-06-01 14:11:52 -0400133 }
134
Sean Paule42febf2015-05-07 11:35:29 -0700135 hwc_composer_device_1_t device;
Zach Reiznerff30b522015-10-28 19:08:45 -0700136 hwc_procs_t const *procs = NULL;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500137
Sean Paule42febf2015-05-07 11:35:29 -0700138 DisplayMap displays;
Sean Paul6a55e9f2015-04-30 15:31:06 -0400139 DrmResources drm;
Zach Reiznerff30b522015-10-28 19:08:45 -0700140 std::unique_ptr<Importer> importer;
Zach Reizner4a253652015-09-10 18:30:54 -0700141 const gralloc_module_t *gralloc;
142 DummySwSyncTimeline dummy_timeline;
Haixia Shid21f5282015-10-05 14:35:09 -0700143 VirtualCompositorWorker virtual_compositor_worker;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500144};
145
Zach Reizner4a253652015-09-10 18:30:54 -0700146static native_handle_t *dup_buffer_handle(buffer_handle_t handle) {
147 native_handle_t *new_handle =
148 native_handle_create(handle->numFds, handle->numInts);
149 if (new_handle == NULL)
150 return NULL;
151
152 const int *old_data = handle->data;
153 int *new_data = new_handle->data;
154 for (int i = 0; i < handle->numFds; i++) {
155 *new_data = dup(*old_data);
156 old_data++;
157 new_data++;
158 }
159 memcpy(new_data, old_data, sizeof(int) * handle->numInts);
160
161 return new_handle;
162}
163
164static void free_buffer_handle(native_handle_t *handle) {
165 int ret = native_handle_close(handle);
166 if (ret)
167 ALOGE("Failed to close native handle %d", ret);
168 ret = native_handle_delete(handle);
169 if (ret)
170 ALOGE("Failed to delete native handle %d", ret);
171}
172
Zach Reiznerf99d53f2015-10-09 13:02:55 -0700173const hwc_drm_bo *DrmHwcBuffer::operator->() const {
Zach Reizner4a253652015-09-10 18:30:54 -0700174 if (importer_ == NULL) {
Zach Reiznerf99d53f2015-10-09 13:02:55 -0700175 ALOGE("Access of non-existent BO");
Zach Reizner4a253652015-09-10 18:30:54 -0700176 exit(1);
177 return NULL;
178 }
179 return &bo_;
180}
181
182void DrmHwcBuffer::Clear() {
183 if (importer_ != NULL) {
184 importer_->ReleaseBuffer(&bo_);
185 importer_ = NULL;
186 }
187}
188
189int DrmHwcBuffer::ImportBuffer(buffer_handle_t handle, Importer *importer) {
190 hwc_drm_bo tmp_bo;
191
192 int ret = importer->ImportBuffer(handle, &tmp_bo);
193 if (ret)
194 return ret;
195
196 if (importer_ != NULL) {
197 importer_->ReleaseBuffer(&bo_);
198 }
199
200 importer_ = importer;
201
202 bo_ = tmp_bo;
203
204 return 0;
205}
206
207int DrmHwcNativeHandle::CopyBufferHandle(buffer_handle_t handle,
208 const gralloc_module_t *gralloc) {
209 native_handle_t *handle_copy = dup_buffer_handle(handle);
210 if (handle_copy == NULL) {
211 ALOGE("Failed to duplicate handle");
212 return -ENOMEM;
213 }
214
215 int ret = gralloc->registerBuffer(gralloc, handle_copy);
216 if (ret) {
217 ALOGE("Failed to register buffer handle %d", ret);
218 free_buffer_handle(handle_copy);
219 return ret;
220 }
221
222 Clear();
223
224 gralloc_ = gralloc;
225 handle_ = handle_copy;
226
227 return 0;
228}
229
230DrmHwcNativeHandle::~DrmHwcNativeHandle() {
231 Clear();
232}
233
234void DrmHwcNativeHandle::Clear() {
235 if (gralloc_ != NULL && handle_ != NULL) {
236 gralloc_->unregisterBuffer(gralloc_, handle_);
237 free_buffer_handle(handle_);
238 gralloc_ = NULL;
239 handle_ = NULL;
240 }
241}
242
243int DrmHwcLayer::InitFromHwcLayer(hwc_layer_1_t *sf_layer, Importer *importer,
244 const gralloc_module_t *gralloc) {
245 sf_handle = sf_layer->handle;
Zach Reizner4a253652015-09-10 18:30:54 -0700246 alpha = sf_layer->planeAlpha;
247
Zach Reizner7e88be92015-10-12 15:20:33 -0700248 source_crop = DrmHwcRect<float>(
249 sf_layer->sourceCropf.left, sf_layer->sourceCropf.top,
250 sf_layer->sourceCropf.right, sf_layer->sourceCropf.bottom);
251 display_frame = DrmHwcRect<int>(
252 sf_layer->displayFrame.left, sf_layer->displayFrame.top,
253 sf_layer->displayFrame.right, sf_layer->displayFrame.bottom);
254
Sean Paul04b47ea2015-11-19 21:46:11 -0500255 transform = 0;
256 // 270* and 180* cannot be combined with flips. More specifically, they
257 // already contain both horizontal and vertical flips, so those fields are
258 // redundant in this case. 90* rotation can be combined with either horizontal
259 // flip or vertical flip, so treat it differently
260 if (sf_layer->transform == HWC_TRANSFORM_ROT_270) {
261 transform = DrmHwcTransform::kRotate270;
262 } else if (sf_layer->transform == HWC_TRANSFORM_ROT_180) {
263 transform = DrmHwcTransform::kRotate180;
264 } else {
265 if (sf_layer->transform & HWC_TRANSFORM_FLIP_H)
266 transform |= DrmHwcTransform::kFlipH;
267 if (sf_layer->transform & HWC_TRANSFORM_FLIP_V)
268 transform |= DrmHwcTransform::kFlipV;
269 if (sf_layer->transform & HWC_TRANSFORM_ROT_90)
270 transform |= DrmHwcTransform::kRotate90;
Zach Reizner4a253652015-09-10 18:30:54 -0700271 }
272
273 switch (sf_layer->blending) {
274 case HWC_BLENDING_NONE:
275 blending = DrmHwcBlending::kNone;
276 break;
277 case HWC_BLENDING_PREMULT:
278 blending = DrmHwcBlending::kPreMult;
279 break;
280 case HWC_BLENDING_COVERAGE:
281 blending = DrmHwcBlending::kCoverage;
282 break;
283 default:
284 ALOGE("Invalid blending in hwc_layer_1_t %d", sf_layer->blending);
285 return -EINVAL;
286 }
287
Zach Reizner7e88be92015-10-12 15:20:33 -0700288 int ret = buffer.ImportBuffer(sf_layer->handle, importer);
289 if (ret)
290 return ret;
291
292 ret = handle.CopyBufferHandle(sf_layer->handle, gralloc);
293 if (ret)
294 return ret;
Zach Reizner4a253652015-09-10 18:30:54 -0700295
Zach Reizner36d7c6e2015-10-20 10:58:19 -0700296 ret = gralloc->perform(gralloc, GRALLOC_MODULE_PERFORM_GET_USAGE,
297 handle.get(), &gralloc_buffer_usage);
298 if (ret) {
Zach Reizner36d7c6e2015-10-20 10:58:19 -0700299 ALOGE("Failed to get usage for buffer %p (%d)", handle.get(), ret);
300 return ret;
Zach Reizner36d7c6e2015-10-20 10:58:19 -0700301 }
302
Zach Reizner4a253652015-09-10 18:30:54 -0700303 return 0;
304}
305
Zach Reiznerc6520e42015-08-13 14:32:09 -0700306static void hwc_dump(struct hwc_composer_device_1 *dev, char *buff,
Sean Paul9046c642015-06-10 17:27:47 -0400307 int buff_len) {
308 struct hwc_context_t *ctx = (struct hwc_context_t *)&dev->common;
309 std::ostringstream out;
310
311 ctx->drm.compositor()->Dump(&out);
312 std::string out_str = out.str();
Zach Reiznerfd6dc332015-10-13 21:12:48 -0700313 strncpy(buff, out_str.c_str(),
314 std::min((size_t)buff_len, out_str.length() + 1));
315 buff[buff_len - 1] = '\0';
Sean Paul9046c642015-06-10 17:27:47 -0400316}
317
Sean Paulbd61c8d2015-10-29 15:00:17 -0400318static bool hwc_skip_layer(const std::pair<int, int> &indices, int i) {
319 return indices.first >= 0 && i >= indices.first && i <= indices.second;
320}
321
Sean Paulb386f1b2015-05-13 06:33:23 -0700322static int hwc_prepare(hwc_composer_device_1_t *dev, size_t num_displays,
Sean Paulef8f1f92015-04-29 16:05:23 -0400323 hwc_display_contents_1_t **display_contents) {
Sean Paulb386f1b2015-05-13 06:33:23 -0700324 struct hwc_context_t *ctx = (struct hwc_context_t *)&dev->common;
Zach Reizner1946fa72015-08-14 11:14:38 -0700325
Sean Paule42febf2015-05-07 11:35:29 -0700326 for (int i = 0; i < (int)num_displays; ++i) {
Sean Paulef8f1f92015-04-29 16:05:23 -0400327 if (!display_contents[i])
328 continue;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500329
Sean Paul6f82f1d2015-10-21 20:05:05 -0400330 bool use_framebuffer_target = false;
Sean Paulb1008372015-11-24 11:52:37 -0500331 DrmMode mode;
Haixia Shid21f5282015-10-05 14:35:09 -0700332 if (i == HWC_DISPLAY_VIRTUAL) {
333 use_framebuffer_target = true;
334 } else {
Sean Paulb1008372015-11-24 11:52:37 -0500335 DrmConnector *c = ctx->drm.GetConnectorForDisplay(i);
336 if (!c) {
337 ALOGE("Failed to get DrmConnector for display %d", i);
Haixia Shid21f5282015-10-05 14:35:09 -0700338 return -ENODEV;
339 }
Sean Paulb1008372015-11-24 11:52:37 -0500340 mode = c->active_mode();
Sean Paulb386f1b2015-05-13 06:33:23 -0700341 }
Sean Paulb386f1b2015-05-13 06:33:23 -0700342
Sean Paulbd61c8d2015-10-29 15:00:17 -0400343 // Since we can't composite HWC_SKIP_LAYERs by ourselves, we'll let SF
344 // handle all layers in between the first and last skip layers. So find the
345 // outer indices and mark everything in between as HWC_FRAMEBUFFER
346 std::pair<int, int> skip_layer_indices(-1, -1);
Zach Reizner45624d32015-06-10 16:03:01 -0700347 int num_layers = display_contents[i]->numHwLayers;
Sean Paulbd61c8d2015-10-29 15:00:17 -0400348 for (int j = 0; !use_framebuffer_target && j < num_layers; ++j) {
Sean Paulb386f1b2015-05-13 06:33:23 -0700349 hwc_layer_1_t *layer = &display_contents[i]->hwLayers[j];
Zach Reizner45624d32015-06-10 16:03:01 -0700350
Sean Paulbd61c8d2015-10-29 15:00:17 -0400351 if (!(layer->flags & HWC_SKIP_LAYER))
352 continue;
353
354 if (skip_layer_indices.first == -1)
355 skip_layer_indices.first = j;
356 skip_layer_indices.second = j;
357 }
358
359 for (int j = 0; j < num_layers; ++j) {
360 hwc_layer_1_t *layer = &display_contents[i]->hwLayers[j];
361
362 if (!use_framebuffer_target && !hwc_skip_layer(skip_layer_indices, j)) {
Sean Paulb1008372015-11-24 11:52:37 -0500363 // If the layer is off the screen, don't earmark it for an overlay.
364 // We'll leave it as-is, which effectively just drops it from the frame
365 const hwc_rect_t *frame = &layer->displayFrame;
366 if ((frame->right - frame->left) <= 0 ||
367 (frame->bottom - frame->top) <= 0 ||
368 frame->right <= 0 || frame->bottom <= 0 ||
369 frame->left >= (int)mode.h_display() ||
370 frame->top >= (int)mode.v_display())
371 continue;
372
Zach Reizner1946fa72015-08-14 11:14:38 -0700373 if (layer->compositionType == HWC_FRAMEBUFFER)
374 layer->compositionType = HWC_OVERLAY;
375 } else {
376 switch (layer->compositionType) {
377 case HWC_OVERLAY:
378 case HWC_BACKGROUND:
379 case HWC_SIDEBAND:
380 case HWC_CURSOR_OVERLAY:
381 layer->compositionType = HWC_FRAMEBUFFER;
382 break;
383 }
384 }
Sean Paulef8f1f92015-04-29 16:05:23 -0400385 }
386 }
Sean Pauldffca952015-02-04 10:19:55 -0800387
Sean Paulef8f1f92015-04-29 16:05:23 -0400388 return 0;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500389}
390
Zach Reizner09807052015-08-13 14:53:41 -0700391static void hwc_add_layer_to_retire_fence(
392 hwc_layer_1_t *layer, hwc_display_contents_1_t *display_contents) {
Sean Paul04206122015-07-16 15:59:24 -0400393 if (layer->releaseFenceFd < 0)
394 return;
395
396 if (display_contents->retireFenceFd >= 0) {
397 int old_retire_fence = display_contents->retireFenceFd;
Zach Reiznerc6520e42015-08-13 14:32:09 -0700398 display_contents->retireFenceFd =
399 sync_merge("dc_retire", old_retire_fence, layer->releaseFenceFd);
Sean Paul04206122015-07-16 15:59:24 -0400400 close(old_retire_fence);
401 } else {
402 display_contents->retireFenceFd = dup(layer->releaseFenceFd);
403 }
404}
405
Sean Paule0c4c3d2015-01-20 16:56:04 -0500406static int hwc_set(hwc_composer_device_1_t *dev, size_t num_displays,
Zach Reizner4a253652015-09-10 18:30:54 -0700407 hwc_display_contents_1_t **sf_display_contents) {
Stéphane Marchesinbe98c8c2015-06-23 16:18:10 -0700408 ATRACE_CALL();
Sean Paulef8f1f92015-04-29 16:05:23 -0400409 struct hwc_context_t *ctx = (struct hwc_context_t *)&dev->common;
Zach Reizner4a253652015-09-10 18:30:54 -0700410 int ret = 0;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500411
Zach Reizner4a253652015-09-10 18:30:54 -0700412 std::vector<CheckedOutputFd> checked_output_fences;
413 std::vector<DrmHwcDisplayContents> displays_contents;
Zach Reizner09807052015-08-13 14:53:41 -0700414 std::vector<DrmCompositionDisplayLayersMap> layers_map;
415 std::vector<std::vector<size_t>> layers_indices;
Zach Reizner4a253652015-09-10 18:30:54 -0700416 displays_contents.reserve(num_displays);
417 // layers_map.reserve(num_displays);
Zach Reizner09807052015-08-13 14:53:41 -0700418 layers_indices.reserve(num_displays);
419
Zach Reizner4a253652015-09-10 18:30:54 -0700420 // Phase one does nothing that would cause errors. Only take ownership of FDs.
421 for (size_t i = 0; i < num_displays; ++i) {
422 hwc_display_contents_1_t *dc = sf_display_contents[i];
423 displays_contents.emplace_back();
424 DrmHwcDisplayContents &display_contents = displays_contents.back();
Haixia Shi7acc59b2015-09-30 10:57:54 -0700425 layers_indices.emplace_back();
426 std::vector<size_t> &indices_to_composite = layers_indices.back();
Zach Reizner4a253652015-09-10 18:30:54 -0700427
428 if (!sf_display_contents[i])
Sean Paulb386f1b2015-05-13 06:33:23 -0700429 continue;
Zach Reizner09807052015-08-13 14:53:41 -0700430
Haixia Shid21f5282015-10-05 14:35:09 -0700431 if (i == HWC_DISPLAY_VIRTUAL) {
432 ctx->virtual_compositor_worker.QueueComposite(dc);
433 continue;
434 }
435
Zach Reizner4a253652015-09-10 18:30:54 -0700436 std::ostringstream display_index_formatter;
437 display_index_formatter << "retire fence for display " << i;
438 std::string display_fence_description(display_index_formatter.str());
439 checked_output_fences.emplace_back(&dc->retireFenceFd,
440 display_fence_description.c_str(),
441 ctx->dummy_timeline);
442 display_contents.retire_fence = OutputFd(&dc->retireFenceFd);
Zach Reizner09807052015-08-13 14:53:41 -0700443
Zach Reizner4a253652015-09-10 18:30:54 -0700444 size_t num_dc_layers = dc->numHwLayers;
Haixia Shi1034bb72015-09-09 12:08:20 -0700445 int framebuffer_target_index = -1;
Zach Reizner4a253652015-09-10 18:30:54 -0700446 for (size_t j = 0; j < num_dc_layers; ++j) {
447 hwc_layer_1_t *sf_layer = &dc->hwLayers[j];
Sean Paulbd61c8d2015-10-29 15:00:17 -0400448 if (sf_layer->compositionType == HWC_FRAMEBUFFER_TARGET) {
449 framebuffer_target_index = j;
450 break;
451 }
452 }
453
454 for (size_t j = 0; j < num_dc_layers; ++j) {
455 hwc_layer_1_t *sf_layer = &dc->hwLayers[j];
Zach Reizner4a253652015-09-10 18:30:54 -0700456
457 display_contents.layers.emplace_back();
458 DrmHwcLayer &layer = display_contents.layers.back();
459
Sean Paulbd61c8d2015-10-29 15:00:17 -0400460 // In prepare() we marked all layers FRAMEBUFFER between SKIP_LAYER's.
461 // This means we should insert the FB_TARGET layer in the composition
462 // stack at the location of the first skip layer, and ignore the rest.
463 if (sf_layer->flags & HWC_SKIP_LAYER) {
464 if (framebuffer_target_index < 0)
465 continue;
466 int idx = framebuffer_target_index;
467 framebuffer_target_index = -1;
468 hwc_layer_1_t *fbt_layer = &dc->hwLayers[idx];
469 if (!fbt_layer->handle || (fbt_layer->flags & HWC_SKIP_LAYER)) {
470 ALOGE("Invalid HWC_FRAMEBUFFER_TARGET with HWC_SKIP_LAYER present");
471 continue;
472 }
473 indices_to_composite.push_back(idx);
Sean Paulb386f1b2015-05-13 06:33:23 -0700474 continue;
Sean Paulbd61c8d2015-10-29 15:00:17 -0400475 }
Zach Reizner4a253652015-09-10 18:30:54 -0700476
Sean Paul6f82f1d2015-10-21 20:05:05 -0400477 if (sf_layer->compositionType == HWC_OVERLAY)
478 indices_to_composite.push_back(j);
Zach Reizner4a253652015-09-10 18:30:54 -0700479
480 layer.acquire_fence.Set(sf_layer->acquireFenceFd);
481 sf_layer->acquireFenceFd = -1;
482
483 std::ostringstream layer_fence_formatter;
484 layer_fence_formatter << "release fence for layer " << j << " of display "
485 << i;
486 std::string layer_fence_description(layer_fence_formatter.str());
487 checked_output_fences.emplace_back(&sf_layer->releaseFenceFd,
488 layer_fence_description.c_str(),
489 ctx->dummy_timeline);
490 layer.release_fence = OutputFd(&sf_layer->releaseFenceFd);
Zach Reizner1946fa72015-08-14 11:14:38 -0700491 }
Zach Reizner4a253652015-09-10 18:30:54 -0700492
Sean Paulbd61c8d2015-10-29 15:00:17 -0400493 // This is a catch-all in case we get a frame without any overlay layers, or
494 // skip layers, but with a value fb_target layer. This _shouldn't_ happen,
495 // but it's not ruled out by the hwc specification
Sean Paul6f82f1d2015-10-21 20:05:05 -0400496 if (indices_to_composite.empty() && framebuffer_target_index >= 0) {
497 hwc_layer_1_t *sf_layer = &dc->hwLayers[framebuffer_target_index];
498 if (!sf_layer->handle || (sf_layer->flags & HWC_SKIP_LAYER)) {
499 ALOGE(
500 "Expected valid layer with HWC_FRAMEBUFFER_TARGET when all "
501 "HWC_OVERLAY layers are skipped.");
Zach Reizner4a253652015-09-10 18:30:54 -0700502 ret = -EINVAL;
Zach Reizner1946fa72015-08-14 11:14:38 -0700503 }
Sean Paul6f82f1d2015-10-21 20:05:05 -0400504 indices_to_composite.push_back(framebuffer_target_index);
Zach Reizner45624d32015-06-10 16:03:01 -0700505 }
Zach Reizner4a253652015-09-10 18:30:54 -0700506 }
Zach Reizner45624d32015-06-10 16:03:01 -0700507
Zach Reizner4a253652015-09-10 18:30:54 -0700508 if (ret)
509 return ret;
510
511 for (size_t i = 0; i < num_displays; ++i) {
512 hwc_display_contents_1_t *dc = sf_display_contents[i];
513 DrmHwcDisplayContents &display_contents = displays_contents[i];
Haixia Shi2fddd372015-10-15 16:21:48 -0700514 if (!sf_display_contents[i] || i == HWC_DISPLAY_VIRTUAL)
Zach Reizner4a253652015-09-10 18:30:54 -0700515 continue;
516
517 layers_map.emplace_back();
518 DrmCompositionDisplayLayersMap &map = layers_map.back();
Zach Reizneracba14b2015-10-13 18:19:26 -0700519 map.display = i;
Zach Reizner5757e822015-10-16 19:06:31 -0700520 map.geometry_changed =
521 (dc->flags & HWC_GEOMETRY_CHANGED) == HWC_GEOMETRY_CHANGED;
Zach Reizner4a253652015-09-10 18:30:54 -0700522 std::vector<size_t> &indices_to_composite = layers_indices[i];
523 for (size_t j : indices_to_composite) {
524 hwc_layer_1_t *sf_layer = &dc->hwLayers[j];
525
526 DrmHwcLayer &layer = display_contents.layers[j];
527
Zach Reiznerff30b522015-10-28 19:08:45 -0700528 ret = layer.InitFromHwcLayer(sf_layer, ctx->importer.get(), ctx->gralloc);
Zach Reizner7e88be92015-10-12 15:20:33 -0700529 if (ret) {
530 ALOGE("Failed to init composition from layer %d", ret);
531 return ret;
532 }
Zach Reizner4a253652015-09-10 18:30:54 -0700533 map.layers.emplace_back(std::move(layer));
534 }
535 }
536
537 std::unique_ptr<DrmComposition> composition(
Zach Reiznerff30b522015-10-28 19:08:45 -0700538 ctx->drm.compositor()->CreateComposition(ctx->importer.get()));
Zach Reizner4a253652015-09-10 18:30:54 -0700539 if (!composition) {
540 ALOGE("Drm composition init failed");
541 return -EINVAL;
Zach Reizner09807052015-08-13 14:53:41 -0700542 }
Zach Reizner45624d32015-06-10 16:03:01 -0700543
Zach Reizner09807052015-08-13 14:53:41 -0700544 ret = composition->SetLayers(layers_map.size(), layers_map.data());
545 if (ret) {
Zach Reizner09807052015-08-13 14:53:41 -0700546 return -EINVAL;
547 }
Zach Reizner45624d32015-06-10 16:03:01 -0700548
Zach Reizner09807052015-08-13 14:53:41 -0700549 ret = ctx->drm.compositor()->QueueComposition(std::move(composition));
550 if (ret) {
Zach Reizner09807052015-08-13 14:53:41 -0700551 return -EINVAL;
552 }
553
Zach Reizner566da2b2015-10-06 15:39:09 -0700554 for (size_t i = 0; i < num_displays; ++i) {
555 hwc_display_contents_1_t *dc = sf_display_contents[i];
556 if (!dc)
557 continue;
558
559 size_t num_dc_layers = dc->numHwLayers;
560 for (size_t j = 0; j < num_dc_layers; ++j) {
561 hwc_layer_1_t *layer = &dc->hwLayers[j];
562 if (layer->flags & HWC_SKIP_LAYER)
563 continue;
564 hwc_add_layer_to_retire_fence(layer, dc);
565 }
566 }
567
Zach Reizner09807052015-08-13 14:53:41 -0700568 composition.reset(NULL);
569
Sean Paulef8f1f92015-04-29 16:05:23 -0400570 return ret;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500571}
572
Sean Paulef8f1f92015-04-29 16:05:23 -0400573static int hwc_event_control(struct hwc_composer_device_1 *dev, int display,
574 int event, int enabled) {
Sean Paulef8f1f92015-04-29 16:05:23 -0400575 if (event != HWC_EVENT_VSYNC || (enabled != 0 && enabled != 1))
576 return -EINVAL;
Sean Pauleb9e75c2015-01-25 23:31:30 -0500577
Sean Paul4057be32015-05-13 06:23:09 -0700578 struct hwc_context_t *ctx = (struct hwc_context_t *)&dev->common;
579 hwc_drm_display_t *hd = &ctx->displays[display];
580 return hd->vsync_worker.VSyncControl(enabled);
Sean Paule0c4c3d2015-01-20 16:56:04 -0500581}
582
Sean Paulef8f1f92015-04-29 16:05:23 -0400583static int hwc_set_power_mode(struct hwc_composer_device_1 *dev, int display,
584 int mode) {
585 struct hwc_context_t *ctx = (struct hwc_context_t *)&dev->common;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500586
Sean Paul6a55e9f2015-04-30 15:31:06 -0400587 uint64_t dpmsValue = 0;
Sean Paulef8f1f92015-04-29 16:05:23 -0400588 switch (mode) {
589 case HWC_POWER_MODE_OFF:
Sean Paul6a55e9f2015-04-30 15:31:06 -0400590 dpmsValue = DRM_MODE_DPMS_OFF;
Sean Paulef8f1f92015-04-29 16:05:23 -0400591 break;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500592
Sean Paulef8f1f92015-04-29 16:05:23 -0400593 /* We can't support dozing right now, so go full on */
594 case HWC_POWER_MODE_DOZE:
595 case HWC_POWER_MODE_DOZE_SUSPEND:
596 case HWC_POWER_MODE_NORMAL:
Sean Paul6a55e9f2015-04-30 15:31:06 -0400597 dpmsValue = DRM_MODE_DPMS_ON;
Sean Paulef8f1f92015-04-29 16:05:23 -0400598 break;
599 };
Sean Paul6a55e9f2015-04-30 15:31:06 -0400600 return ctx->drm.SetDpmsMode(display, dpmsValue);
Sean Paule0c4c3d2015-01-20 16:56:04 -0500601}
602
Sean Paulef8f1f92015-04-29 16:05:23 -0400603static int hwc_query(struct hwc_composer_device_1 * /* dev */, int what,
604 int *value) {
605 switch (what) {
606 case HWC_BACKGROUND_LAYER_SUPPORTED:
607 *value = 0; /* TODO: We should do this */
608 break;
609 case HWC_VSYNC_PERIOD:
610 ALOGW("Query for deprecated vsync value, returning 60Hz");
611 *value = 1000 * 1000 * 1000 / 60;
612 break;
613 case HWC_DISPLAY_TYPES_SUPPORTED:
Haixia Shi2fddd372015-10-15 16:21:48 -0700614 *value = HWC_DISPLAY_PRIMARY_BIT | HWC_DISPLAY_EXTERNAL_BIT |
615 HWC_DISPLAY_VIRTUAL_BIT;
Sean Paulef8f1f92015-04-29 16:05:23 -0400616 break;
617 }
618 return 0;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500619}
620
Sean Paulef8f1f92015-04-29 16:05:23 -0400621static void hwc_register_procs(struct hwc_composer_device_1 *dev,
622 hwc_procs_t const *procs) {
623 struct hwc_context_t *ctx = (struct hwc_context_t *)&dev->common;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500624
Sean Paulef8f1f92015-04-29 16:05:23 -0400625 ctx->procs = procs;
Sean Paul4057be32015-05-13 06:23:09 -0700626
Zach Reiznerff30b522015-10-28 19:08:45 -0700627 for (std::pair<const int, hwc_drm_display> &display_entry : ctx->displays)
628 display_entry.second.vsync_worker.SetProcs(procs);
Sean Paule0c4c3d2015-01-20 16:56:04 -0500629}
630
Sean Paulef8f1f92015-04-29 16:05:23 -0400631static int hwc_get_display_configs(struct hwc_composer_device_1 *dev,
632 int display, uint32_t *configs,
Sean Paul6a55e9f2015-04-30 15:31:06 -0400633 size_t *num_configs) {
634 if (!*num_configs)
Sean Paulef8f1f92015-04-29 16:05:23 -0400635 return 0;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500636
Sean Paulef8f1f92015-04-29 16:05:23 -0400637 struct hwc_context_t *ctx = (struct hwc_context_t *)&dev->common;
Sean Paule42febf2015-05-07 11:35:29 -0700638 hwc_drm_display_t *hd = &ctx->displays[display];
Sean Paul6a55e9f2015-04-30 15:31:06 -0400639 hd->config_ids.clear();
640
641 DrmConnector *connector = ctx->drm.GetConnectorForDisplay(display);
642 if (!connector) {
643 ALOGE("Failed to get connector for display %d", display);
Sean Paulef8f1f92015-04-29 16:05:23 -0400644 return -ENODEV;
645 }
Sean Paule0c4c3d2015-01-20 16:56:04 -0500646
Sean Paule42febf2015-05-07 11:35:29 -0700647 int ret = connector->UpdateModes();
Sean Paul6a55e9f2015-04-30 15:31:06 -0400648 if (ret) {
649 ALOGE("Failed to update display modes %d", ret);
Sean Paulef8f1f92015-04-29 16:05:23 -0400650 return ret;
Sean Paulef8f1f92015-04-29 16:05:23 -0400651 }
Sean Paule0c4c3d2015-01-20 16:56:04 -0500652
Zach Reiznerff30b522015-10-28 19:08:45 -0700653 for (const DrmMode &mode : connector->modes()) {
Sean Paul6a55e9f2015-04-30 15:31:06 -0400654 size_t idx = hd->config_ids.size();
655 if (idx == *num_configs)
656 break;
Zach Reiznerff30b522015-10-28 19:08:45 -0700657 hd->config_ids.push_back(mode.id());
658 configs[idx] = mode.id();
Sean Paul6a55e9f2015-04-30 15:31:06 -0400659 }
660 *num_configs = hd->config_ids.size();
661 return *num_configs == 0 ? -1 : 0;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500662}
663
Sean Paulef8f1f92015-04-29 16:05:23 -0400664static int hwc_get_display_attributes(struct hwc_composer_device_1 *dev,
665 int display, uint32_t config,
666 const uint32_t *attributes,
667 int32_t *values) {
668 struct hwc_context_t *ctx = (struct hwc_context_t *)&dev->common;
Sean Paul6a55e9f2015-04-30 15:31:06 -0400669 DrmConnector *c = ctx->drm.GetConnectorForDisplay(display);
Sean Paulef8f1f92015-04-29 16:05:23 -0400670 if (!c) {
Sean Paul6a55e9f2015-04-30 15:31:06 -0400671 ALOGE("Failed to get DrmConnector for display %d", display);
Sean Paulef8f1f92015-04-29 16:05:23 -0400672 return -ENODEV;
673 }
Sean Paul6a55e9f2015-04-30 15:31:06 -0400674 DrmMode mode;
Zach Reiznerff30b522015-10-28 19:08:45 -0700675 for (const DrmMode &conn_mode : c->modes()) {
676 if (conn_mode.id() == config) {
677 mode = conn_mode;
Sean Paul6a55e9f2015-04-30 15:31:06 -0400678 break;
679 }
680 }
681 if (mode.id() == 0) {
682 ALOGE("Failed to find active mode for display %d", display);
683 return -ENOENT;
Sean Paulef8f1f92015-04-29 16:05:23 -0400684 }
Sean Paule0c4c3d2015-01-20 16:56:04 -0500685
Sean Paul6a55e9f2015-04-30 15:31:06 -0400686 uint32_t mm_width = c->mm_width();
687 uint32_t mm_height = c->mm_height();
Sean Paulef8f1f92015-04-29 16:05:23 -0400688 for (int i = 0; attributes[i] != HWC_DISPLAY_NO_ATTRIBUTE; ++i) {
689 switch (attributes[i]) {
690 case HWC_DISPLAY_VSYNC_PERIOD:
Sean Paul6a55e9f2015-04-30 15:31:06 -0400691 values[i] = 1000 * 1000 * 1000 / mode.v_refresh();
Sean Paulef8f1f92015-04-29 16:05:23 -0400692 break;
693 case HWC_DISPLAY_WIDTH:
Sean Paul6a55e9f2015-04-30 15:31:06 -0400694 values[i] = mode.h_display();
Sean Paulef8f1f92015-04-29 16:05:23 -0400695 break;
696 case HWC_DISPLAY_HEIGHT:
Sean Paul6a55e9f2015-04-30 15:31:06 -0400697 values[i] = mode.v_display();
Sean Paulef8f1f92015-04-29 16:05:23 -0400698 break;
699 case HWC_DISPLAY_DPI_X:
700 /* Dots per 1000 inches */
Sean Paul6a55e9f2015-04-30 15:31:06 -0400701 values[i] = mm_width ? (mode.h_display() * UM_PER_INCH) / mm_width : 0;
Sean Paulef8f1f92015-04-29 16:05:23 -0400702 break;
703 case HWC_DISPLAY_DPI_Y:
704 /* Dots per 1000 inches */
Sean Paul6a55e9f2015-04-30 15:31:06 -0400705 values[i] =
706 mm_height ? (mode.v_display() * UM_PER_INCH) / mm_height : 0;
Sean Paulef8f1f92015-04-29 16:05:23 -0400707 break;
708 }
709 }
Sean Paulef8f1f92015-04-29 16:05:23 -0400710 return 0;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500711}
712
Sean Paulef8f1f92015-04-29 16:05:23 -0400713static int hwc_get_active_config(struct hwc_composer_device_1 *dev,
714 int display) {
715 struct hwc_context_t *ctx = (struct hwc_context_t *)&dev->common;
Sean Paul6a55e9f2015-04-30 15:31:06 -0400716 DrmConnector *c = ctx->drm.GetConnectorForDisplay(display);
717 if (!c) {
718 ALOGE("Failed to get DrmConnector for display %d", display);
Sean Paulef8f1f92015-04-29 16:05:23 -0400719 return -ENODEV;
720 }
Sean Paule0c4c3d2015-01-20 16:56:04 -0500721
Sean Paul6a55e9f2015-04-30 15:31:06 -0400722 DrmMode mode = c->active_mode();
Sean Paule42febf2015-05-07 11:35:29 -0700723 hwc_drm_display_t *hd = &ctx->displays[display];
Sean Paul6a55e9f2015-04-30 15:31:06 -0400724 for (size_t i = 0; i < hd->config_ids.size(); ++i) {
725 if (hd->config_ids[i] == mode.id())
726 return i;
Sean Paulef8f1f92015-04-29 16:05:23 -0400727 }
Sean Paul6a55e9f2015-04-30 15:31:06 -0400728 return -1;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500729}
730
Sean Paulef8f1f92015-04-29 16:05:23 -0400731static int hwc_set_active_config(struct hwc_composer_device_1 *dev, int display,
732 int index) {
733 struct hwc_context_t *ctx = (struct hwc_context_t *)&dev->common;
Sean Paule42febf2015-05-07 11:35:29 -0700734 hwc_drm_display_t *hd = &ctx->displays[display];
Sean Paul6a55e9f2015-04-30 15:31:06 -0400735 if (index >= (int)hd->config_ids.size()) {
736 ALOGE("Invalid config index %d passed in", index);
737 return -EINVAL;
Sean Paulef8f1f92015-04-29 16:05:23 -0400738 }
Sean Paule0c4c3d2015-01-20 16:56:04 -0500739
Sean Paul877be972015-06-03 14:08:27 -0400740 DrmConnector *c = ctx->drm.GetConnectorForDisplay(display);
741 if (!c) {
742 ALOGE("Failed to get connector for display %d", display);
743 return -ENODEV;
744 }
745 DrmMode mode;
Zach Reiznerff30b522015-10-28 19:08:45 -0700746 for (const DrmMode &conn_mode : c->modes()) {
747 if (conn_mode.id() == hd->config_ids[index]) {
748 mode = conn_mode;
Sean Paul877be972015-06-03 14:08:27 -0400749 break;
750 }
751 }
752 if (mode.id() != hd->config_ids[index]) {
753 ALOGE("Could not find active mode for %d/%d", index, hd->config_ids[index]);
754 return -ENOENT;
755 }
756 int ret = ctx->drm.SetDisplayActiveMode(display, mode);
Sean Paul6a55e9f2015-04-30 15:31:06 -0400757 if (ret) {
Sean Paul877be972015-06-03 14:08:27 -0400758 ALOGE("Failed to set active config %d", ret);
Sean Paul6a55e9f2015-04-30 15:31:06 -0400759 return ret;
Sean Paulef8f1f92015-04-29 16:05:23 -0400760 }
Sean Paul6a55e9f2015-04-30 15:31:06 -0400761 return ret;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500762}
763
Sean Paulef8f1f92015-04-29 16:05:23 -0400764static int hwc_device_close(struct hw_device_t *dev) {
765 struct hwc_context_t *ctx = (struct hwc_context_t *)dev;
Sean Paulef8f1f92015-04-29 16:05:23 -0400766 delete ctx;
Sean Paulef8f1f92015-04-29 16:05:23 -0400767 return 0;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500768}
769
Sean Paul24a26e32015-02-04 10:34:47 -0800770/*
771 * TODO: This function sets the active config to the first one in the list. This
772 * should be fixed such that it selects the preferred mode for the display, or
773 * some other, saner, method of choosing the config.
774 */
Sean Paule42febf2015-05-07 11:35:29 -0700775static int hwc_set_initial_config(hwc_drm_display_t *hd) {
Sean Paulef8f1f92015-04-29 16:05:23 -0400776 uint32_t config;
777 size_t num_configs = 1;
778 int ret = hwc_get_display_configs(&hd->ctx->device, hd->display, &config,
779 &num_configs);
780 if (ret || !num_configs)
781 return 0;
Sean Paul24a26e32015-02-04 10:34:47 -0800782
Sean Paulef8f1f92015-04-29 16:05:23 -0400783 ret = hwc_set_active_config(&hd->ctx->device, hd->display, 0);
784 if (ret) {
785 ALOGE("Failed to set active config d=%d ret=%d", hd->display, ret);
786 return ret;
787 }
Sean Paul24a26e32015-02-04 10:34:47 -0800788
Sean Paulef8f1f92015-04-29 16:05:23 -0400789 return ret;
Sean Paul24a26e32015-02-04 10:34:47 -0800790}
791
Sean Paul6a55e9f2015-04-30 15:31:06 -0400792static int hwc_initialize_display(struct hwc_context_t *ctx, int display) {
Sean Paule42febf2015-05-07 11:35:29 -0700793 hwc_drm_display_t *hd = &ctx->displays[display];
Sean Paulef8f1f92015-04-29 16:05:23 -0400794 hd->ctx = ctx;
795 hd->display = display;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500796
Sean Paulb386f1b2015-05-13 06:33:23 -0700797 int ret = hwc_set_initial_config(hd);
Sean Paulef8f1f92015-04-29 16:05:23 -0400798 if (ret) {
799 ALOGE("Failed to set initial config for d=%d ret=%d", display, ret);
Sean Paulef8f1f92015-04-29 16:05:23 -0400800 return ret;
801 }
Sean Paul24a26e32015-02-04 10:34:47 -0800802
Sean Paul4057be32015-05-13 06:23:09 -0700803 ret = hd->vsync_worker.Init(&ctx->drm, display);
804 if (ret) {
805 ALOGE("Failed to create event worker for display %d %d\n", display, ret);
806 return ret;
807 }
808
Sean Paulef8f1f92015-04-29 16:05:23 -0400809 return 0;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500810}
811
Sean Paulef8f1f92015-04-29 16:05:23 -0400812static int hwc_enumerate_displays(struct hwc_context_t *ctx) {
Sean Paul6a55e9f2015-04-30 15:31:06 -0400813 int ret;
Zach Reiznerff30b522015-10-28 19:08:45 -0700814 for (auto &conn : ctx->drm.connectors()) {
815 ret = hwc_initialize_display(ctx, conn->display());
Sean Paul6a55e9f2015-04-30 15:31:06 -0400816 if (ret) {
Zach Reiznerff30b522015-10-28 19:08:45 -0700817 ALOGE("Failed to initialize display %d", conn->display());
Sean Paul6a55e9f2015-04-30 15:31:06 -0400818 return ret;
Sean Paulef8f1f92015-04-29 16:05:23 -0400819 }
820 }
Sean Paulef8f1f92015-04-29 16:05:23 -0400821
Haixia Shid21f5282015-10-05 14:35:09 -0700822 ret = ctx->virtual_compositor_worker.Init();
823 if (ret) {
824 ALOGE("Failed to initialize virtual compositor worker");
825 return ret;
826 }
Sean Paulef8f1f92015-04-29 16:05:23 -0400827 return 0;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500828}
829
Sean Paulef8f1f92015-04-29 16:05:23 -0400830static int hwc_device_open(const struct hw_module_t *module, const char *name,
831 struct hw_device_t **dev) {
832 if (strcmp(name, HWC_HARDWARE_COMPOSER)) {
833 ALOGE("Invalid module name- %s", name);
834 return -EINVAL;
835 }
836
Zach Reiznerff30b522015-10-28 19:08:45 -0700837 std::unique_ptr<hwc_context_t> ctx(new hwc_context_t());
Sean Paulef8f1f92015-04-29 16:05:23 -0400838 if (!ctx) {
839 ALOGE("Failed to allocate hwc context");
840 return -ENOMEM;
841 }
842
Sean Paul6a55e9f2015-04-30 15:31:06 -0400843 int ret = ctx->drm.Init();
844 if (ret) {
845 ALOGE("Can't initialize Drm object %d", ret);
Sean Paul6a55e9f2015-04-30 15:31:06 -0400846 return ret;
847 }
848
Zach Reizner4a253652015-09-10 18:30:54 -0700849 ret = hw_get_module(GRALLOC_HARDWARE_MODULE_ID,
850 (const hw_module_t **)&ctx->gralloc);
851 if (ret) {
852 ALOGE("Failed to open gralloc module %d", ret);
Zach Reizner4a253652015-09-10 18:30:54 -0700853 return ret;
854 }
855
856 ret = ctx->dummy_timeline.Init();
857 if (ret) {
858 ALOGE("Failed to create dummy sw sync timeline %d", ret);
859 return ret;
860 }
861
Zach Reiznerff30b522015-10-28 19:08:45 -0700862 ctx->importer.reset(Importer::CreateInstance(&ctx->drm));
Sean Paulda6270d2015-06-01 14:11:52 -0400863 if (!ctx->importer) {
864 ALOGE("Failed to create importer instance");
Sean Paulef8f1f92015-04-29 16:05:23 -0400865 return ret;
866 }
867
Zach Reiznerff30b522015-10-28 19:08:45 -0700868 ret = hwc_enumerate_displays(ctx.get());
Sean Paulef8f1f92015-04-29 16:05:23 -0400869 if (ret) {
870 ALOGE("Failed to enumerate displays: %s", strerror(ret));
Sean Paul6a55e9f2015-04-30 15:31:06 -0400871 return ret;
872 }
873
Sean Paulef8f1f92015-04-29 16:05:23 -0400874 ctx->device.common.tag = HARDWARE_DEVICE_TAG;
875 ctx->device.common.version = HWC_DEVICE_API_VERSION_1_4;
876 ctx->device.common.module = const_cast<hw_module_t *>(module);
877 ctx->device.common.close = hwc_device_close;
878
Sean Paul9046c642015-06-10 17:27:47 -0400879 ctx->device.dump = hwc_dump;
Sean Paulef8f1f92015-04-29 16:05:23 -0400880 ctx->device.prepare = hwc_prepare;
881 ctx->device.set = hwc_set;
882 ctx->device.eventControl = hwc_event_control;
883 ctx->device.setPowerMode = hwc_set_power_mode;
884 ctx->device.query = hwc_query;
885 ctx->device.registerProcs = hwc_register_procs;
886 ctx->device.getDisplayConfigs = hwc_get_display_configs;
887 ctx->device.getDisplayAttributes = hwc_get_display_attributes;
888 ctx->device.getActiveConfig = hwc_get_active_config;
889 ctx->device.setActiveConfig = hwc_set_active_config;
890 ctx->device.setCursorPositionAsync = NULL; /* TODO: Add cursor */
891
892 *dev = &ctx->device.common;
Zach Reiznerff30b522015-10-28 19:08:45 -0700893 ctx.release();
Sean Paulef8f1f92015-04-29 16:05:23 -0400894
895 return 0;
896}
Sean Paul6a55e9f2015-04-30 15:31:06 -0400897}
Sean Paulef8f1f92015-04-29 16:05:23 -0400898
Sean Paul6a55e9f2015-04-30 15:31:06 -0400899static struct hw_module_methods_t hwc_module_methods = {
900 open : android::hwc_device_open
901};
Sean Paule0c4c3d2015-01-20 16:56:04 -0500902
903hwc_module_t HAL_MODULE_INFO_SYM = {
Sean Paulef8f1f92015-04-29 16:05:23 -0400904 common : {
905 tag : HARDWARE_MODULE_TAG,
906 version_major : 1,
907 version_minor : 0,
908 id : HWC_HARDWARE_MODULE_ID,
909 name : "DRM hwcomposer module",
910 author : "The Android Open Source Project",
911 methods : &hwc_module_methods,
912 dso : NULL,
913 reserved : {0},
914 }
Sean Paule0c4c3d2015-01-20 16:56:04 -0500915};