blob: e7552736efa1045890392e6d27e849a6bac925ee [file] [log] [blame]
Sean Paule0c4c3d2015-01-20 16:56:04 -05001/*
2 * Copyright (C) 2015 The Android Open Source Project
3 *
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
7 *
8 * http://www.apache.org/licenses/LICENSE-2.0
9 *
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
15 */
16
Stéphane Marchesinbe98c8c2015-06-23 16:18:10 -070017#define ATRACE_TAG ATRACE_TAG_GRAPHICS
Sean Paule0c4c3d2015-01-20 16:56:04 -050018#define LOG_TAG "hwcomposer-drm"
19
Zach Reizner7642c922015-10-29 10:11:16 -070020#include "drmhwcomposer.h"
Sean Paul6a55e9f2015-04-30 15:31:06 -040021#include "drmresources.h"
Sean Paulda6270d2015-06-01 14:11:52 -040022#include "importer.h"
Haixia Shid21f5282015-10-05 14:35:09 -070023#include "virtualcompositorworker.h"
Sean Paul4057be32015-05-13 06:23:09 -070024#include "vsyncworker.h"
Sean Paulef8f1f92015-04-29 16:05:23 -040025
Zach Reizner09807052015-08-13 14:53:41 -070026#include <stdlib.h>
27
28#include <map>
29#include <vector>
Zach Reizner4a253652015-09-10 18:30:54 -070030#include <sstream>
Zach Reizner09807052015-08-13 14:53:41 -070031
Sean Paule0c4c3d2015-01-20 16:56:04 -050032#include <errno.h>
Sean Paulef8f1f92015-04-29 16:05:23 -040033#include <fcntl.h>
Sean Paulef8f1f92015-04-29 16:05:23 -040034#include <pthread.h>
Sean Paule0c4c3d2015-01-20 16:56:04 -050035#include <sys/param.h>
Sean Paul9aa5ad32015-01-22 15:47:54 -050036#include <sys/resource.h>
Sean Paule0c4c3d2015-01-20 16:56:04 -050037#include <xf86drm.h>
38#include <xf86drmMode.h>
Sean Paule0c4c3d2015-01-20 16:56:04 -050039
Sean Paulef8f1f92015-04-29 16:05:23 -040040#include <cutils/log.h>
41#include <cutils/properties.h>
Sean Paule0c4c3d2015-01-20 16:56:04 -050042#include <hardware/hardware.h>
43#include <hardware/hwcomposer.h>
Zach Reizner4a253652015-09-10 18:30:54 -070044#include <sw_sync.h>
45#include <sync/sync.h>
Stéphane Marchesinbe98c8c2015-06-23 16:18:10 -070046#include <utils/Trace.h>
Sean Paule0c4c3d2015-01-20 16:56:04 -050047
Sean Paule0c4c3d2015-01-20 16:56:04 -050048#define UM_PER_INCH 25400
49
Sean Paul6a55e9f2015-04-30 15:31:06 -040050namespace android {
Sean Paule0c4c3d2015-01-20 16:56:04 -050051
Zach Reizner4a253652015-09-10 18:30:54 -070052class DummySwSyncTimeline {
53 public:
54 int Init() {
55 int ret = timeline_fd_.Set(sw_sync_timeline_create());
56 if (ret < 0)
57 return ret;
58 return 0;
59 }
60
61 UniqueFd CreateDummyFence() {
62 int ret = sw_sync_fence_create(timeline_fd_.get(), "dummy fence",
63 timeline_pt_ + 1);
64 if (ret < 0) {
65 ALOGE("Failed to create dummy fence %d", ret);
66 return ret;
67 }
68
69 UniqueFd ret_fd(ret);
70
71 ret = sw_sync_timeline_inc(timeline_fd_.get(), 1);
72 if (ret) {
73 ALOGE("Failed to increment dummy sync timeline %d", ret);
74 return ret;
75 }
76
77 ++timeline_pt_;
78 return ret_fd;
79 }
80
81 private:
82 UniqueFd timeline_fd_;
83 int timeline_pt_ = 0;
84};
85
86struct CheckedOutputFd {
87 CheckedOutputFd(int *fd, const char *description,
88 DummySwSyncTimeline &timeline)
89 : fd_(fd), description_(description), timeline_(timeline) {
90 }
91 CheckedOutputFd(CheckedOutputFd &&rhs)
92 : description_(rhs.description_), timeline_(rhs.timeline_) {
93 std::swap(fd_, rhs.fd_);
94 }
95
96 CheckedOutputFd &operator=(const CheckedOutputFd &rhs) = delete;
97
98 ~CheckedOutputFd() {
99 if (fd_ == NULL)
100 return;
101
102 if (*fd_ >= 0)
103 return;
104
105 *fd_ = timeline_.CreateDummyFence().Release();
106
107 if (*fd_ < 0)
108 ALOGE("Failed to fill %s (%p == %d) before destruction",
109 description_.c_str(), fd_, *fd_);
110 }
111
112 private:
113 int *fd_ = NULL;
114 std::string description_;
115 DummySwSyncTimeline &timeline_;
116};
117
Sean Paule42febf2015-05-07 11:35:29 -0700118typedef struct hwc_drm_display {
Sean Paulef8f1f92015-04-29 16:05:23 -0400119 struct hwc_context_t *ctx;
120 int display;
Sean Paul9aa5ad32015-01-22 15:47:54 -0500121
Sean Paul6a55e9f2015-04-30 15:31:06 -0400122 std::vector<uint32_t> config_ids;
Sean Paul9aa5ad32015-01-22 15:47:54 -0500123
Sean Paul4057be32015-05-13 06:23:09 -0700124 VSyncWorker vsync_worker;
Sean Paule42febf2015-05-07 11:35:29 -0700125} hwc_drm_display_t;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500126
127struct hwc_context_t {
Sean Paule42febf2015-05-07 11:35:29 -0700128 // map of display:hwc_drm_display_t
129 typedef std::map<int, hwc_drm_display_t> DisplayMap;
Sean Paulda6270d2015-06-01 14:11:52 -0400130
131 ~hwc_context_t() {
Haixia Shid21f5282015-10-05 14:35:09 -0700132 virtual_compositor_worker.Exit();
Sean Paulda6270d2015-06-01 14:11:52 -0400133 }
134
Sean Paule42febf2015-05-07 11:35:29 -0700135 hwc_composer_device_1_t device;
Zach Reiznerff30b522015-10-28 19:08:45 -0700136 hwc_procs_t const *procs = NULL;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500137
Sean Paule42febf2015-05-07 11:35:29 -0700138 DisplayMap displays;
Sean Paul6a55e9f2015-04-30 15:31:06 -0400139 DrmResources drm;
Zach Reiznerff30b522015-10-28 19:08:45 -0700140 std::unique_ptr<Importer> importer;
Zach Reizner4a253652015-09-10 18:30:54 -0700141 const gralloc_module_t *gralloc;
142 DummySwSyncTimeline dummy_timeline;
Haixia Shid21f5282015-10-05 14:35:09 -0700143 VirtualCompositorWorker virtual_compositor_worker;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500144};
145
Zach Reizner4a253652015-09-10 18:30:54 -0700146static native_handle_t *dup_buffer_handle(buffer_handle_t handle) {
147 native_handle_t *new_handle =
148 native_handle_create(handle->numFds, handle->numInts);
149 if (new_handle == NULL)
150 return NULL;
151
152 const int *old_data = handle->data;
153 int *new_data = new_handle->data;
154 for (int i = 0; i < handle->numFds; i++) {
155 *new_data = dup(*old_data);
156 old_data++;
157 new_data++;
158 }
159 memcpy(new_data, old_data, sizeof(int) * handle->numInts);
160
161 return new_handle;
162}
163
164static void free_buffer_handle(native_handle_t *handle) {
165 int ret = native_handle_close(handle);
166 if (ret)
167 ALOGE("Failed to close native handle %d", ret);
168 ret = native_handle_delete(handle);
169 if (ret)
170 ALOGE("Failed to delete native handle %d", ret);
171}
172
Zach Reiznerf99d53f2015-10-09 13:02:55 -0700173const hwc_drm_bo *DrmHwcBuffer::operator->() const {
Zach Reizner4a253652015-09-10 18:30:54 -0700174 if (importer_ == NULL) {
Zach Reiznerf99d53f2015-10-09 13:02:55 -0700175 ALOGE("Access of non-existent BO");
Zach Reizner4a253652015-09-10 18:30:54 -0700176 exit(1);
177 return NULL;
178 }
179 return &bo_;
180}
181
182void DrmHwcBuffer::Clear() {
183 if (importer_ != NULL) {
184 importer_->ReleaseBuffer(&bo_);
185 importer_ = NULL;
186 }
187}
188
189int DrmHwcBuffer::ImportBuffer(buffer_handle_t handle, Importer *importer) {
190 hwc_drm_bo tmp_bo;
191
192 int ret = importer->ImportBuffer(handle, &tmp_bo);
193 if (ret)
194 return ret;
195
196 if (importer_ != NULL) {
197 importer_->ReleaseBuffer(&bo_);
198 }
199
200 importer_ = importer;
201
202 bo_ = tmp_bo;
203
204 return 0;
205}
206
207int DrmHwcNativeHandle::CopyBufferHandle(buffer_handle_t handle,
208 const gralloc_module_t *gralloc) {
209 native_handle_t *handle_copy = dup_buffer_handle(handle);
210 if (handle_copy == NULL) {
211 ALOGE("Failed to duplicate handle");
212 return -ENOMEM;
213 }
214
215 int ret = gralloc->registerBuffer(gralloc, handle_copy);
216 if (ret) {
217 ALOGE("Failed to register buffer handle %d", ret);
218 free_buffer_handle(handle_copy);
219 return ret;
220 }
221
222 Clear();
223
224 gralloc_ = gralloc;
225 handle_ = handle_copy;
226
227 return 0;
228}
229
230DrmHwcNativeHandle::~DrmHwcNativeHandle() {
231 Clear();
232}
233
234void DrmHwcNativeHandle::Clear() {
235 if (gralloc_ != NULL && handle_ != NULL) {
236 gralloc_->unregisterBuffer(gralloc_, handle_);
237 free_buffer_handle(handle_);
238 gralloc_ = NULL;
239 handle_ = NULL;
240 }
241}
242
243int DrmHwcLayer::InitFromHwcLayer(hwc_layer_1_t *sf_layer, Importer *importer,
244 const gralloc_module_t *gralloc) {
245 sf_handle = sf_layer->handle;
Zach Reizner4a253652015-09-10 18:30:54 -0700246 alpha = sf_layer->planeAlpha;
247
Zach Reizner7e88be92015-10-12 15:20:33 -0700248 source_crop = DrmHwcRect<float>(
249 sf_layer->sourceCropf.left, sf_layer->sourceCropf.top,
250 sf_layer->sourceCropf.right, sf_layer->sourceCropf.bottom);
251 display_frame = DrmHwcRect<int>(
252 sf_layer->displayFrame.left, sf_layer->displayFrame.top,
253 sf_layer->displayFrame.right, sf_layer->displayFrame.bottom);
254
Zach Reizner4a253652015-09-10 18:30:54 -0700255 switch (sf_layer->transform) {
256 case 0:
257 transform = DrmHwcTransform::kIdentity;
258 break;
259 case HWC_TRANSFORM_FLIP_H:
260 transform = DrmHwcTransform::kFlipH;
261 break;
262 case HWC_TRANSFORM_FLIP_V:
263 transform = DrmHwcTransform::kFlipV;
264 break;
265 case HWC_TRANSFORM_ROT_90:
266 transform = DrmHwcTransform::kRotate90;
267 break;
268 case HWC_TRANSFORM_ROT_180:
269 transform = DrmHwcTransform::kRotate180;
270 break;
271 case HWC_TRANSFORM_ROT_270:
272 transform = DrmHwcTransform::kRotate270;
273 break;
274 default:
275 ALOGE("Invalid transform in hwc_layer_1_t %d", sf_layer->transform);
276 return -EINVAL;
277 }
278
279 switch (sf_layer->blending) {
280 case HWC_BLENDING_NONE:
281 blending = DrmHwcBlending::kNone;
282 break;
283 case HWC_BLENDING_PREMULT:
284 blending = DrmHwcBlending::kPreMult;
285 break;
286 case HWC_BLENDING_COVERAGE:
287 blending = DrmHwcBlending::kCoverage;
288 break;
289 default:
290 ALOGE("Invalid blending in hwc_layer_1_t %d", sf_layer->blending);
291 return -EINVAL;
292 }
293
Zach Reizner7e88be92015-10-12 15:20:33 -0700294 int ret = buffer.ImportBuffer(sf_layer->handle, importer);
295 if (ret)
296 return ret;
297
298 ret = handle.CopyBufferHandle(sf_layer->handle, gralloc);
299 if (ret)
300 return ret;
Zach Reizner4a253652015-09-10 18:30:54 -0700301
Zach Reizner36d7c6e2015-10-20 10:58:19 -0700302 ret = gralloc->perform(gralloc, GRALLOC_MODULE_PERFORM_GET_USAGE,
303 handle.get(), &gralloc_buffer_usage);
304 if (ret) {
Zach Reizner36d7c6e2015-10-20 10:58:19 -0700305 ALOGE("Failed to get usage for buffer %p (%d)", handle.get(), ret);
306 return ret;
Zach Reizner36d7c6e2015-10-20 10:58:19 -0700307 }
308
Zach Reizner4a253652015-09-10 18:30:54 -0700309 return 0;
310}
311
Zach Reiznerc6520e42015-08-13 14:32:09 -0700312static void hwc_dump(struct hwc_composer_device_1 *dev, char *buff,
Sean Paul9046c642015-06-10 17:27:47 -0400313 int buff_len) {
314 struct hwc_context_t *ctx = (struct hwc_context_t *)&dev->common;
315 std::ostringstream out;
316
317 ctx->drm.compositor()->Dump(&out);
318 std::string out_str = out.str();
Zach Reiznerfd6dc332015-10-13 21:12:48 -0700319 strncpy(buff, out_str.c_str(),
320 std::min((size_t)buff_len, out_str.length() + 1));
321 buff[buff_len - 1] = '\0';
Sean Paul9046c642015-06-10 17:27:47 -0400322}
323
Sean Paulbd61c8d2015-10-29 15:00:17 -0400324static bool hwc_skip_layer(const std::pair<int, int> &indices, int i) {
325 return indices.first >= 0 && i >= indices.first && i <= indices.second;
326}
327
Sean Paulb386f1b2015-05-13 06:33:23 -0700328static int hwc_prepare(hwc_composer_device_1_t *dev, size_t num_displays,
Sean Paulef8f1f92015-04-29 16:05:23 -0400329 hwc_display_contents_1_t **display_contents) {
Sean Paulb386f1b2015-05-13 06:33:23 -0700330 struct hwc_context_t *ctx = (struct hwc_context_t *)&dev->common;
Zach Reizner1946fa72015-08-14 11:14:38 -0700331
Sean Paule42febf2015-05-07 11:35:29 -0700332 for (int i = 0; i < (int)num_displays; ++i) {
Sean Paulef8f1f92015-04-29 16:05:23 -0400333 if (!display_contents[i])
334 continue;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500335
Sean Paul6f82f1d2015-10-21 20:05:05 -0400336 bool use_framebuffer_target = false;
Haixia Shid21f5282015-10-05 14:35:09 -0700337 if (i == HWC_DISPLAY_VIRTUAL) {
338 use_framebuffer_target = true;
339 } else {
340 DrmCrtc *crtc = ctx->drm.GetCrtcForDisplay(i);
341 if (!crtc) {
342 ALOGE("No crtc for display %d", i);
343 return -ENODEV;
344 }
Sean Paulb386f1b2015-05-13 06:33:23 -0700345 }
Sean Paulb386f1b2015-05-13 06:33:23 -0700346
Sean Paulbd61c8d2015-10-29 15:00:17 -0400347 // Since we can't composite HWC_SKIP_LAYERs by ourselves, we'll let SF
348 // handle all layers in between the first and last skip layers. So find the
349 // outer indices and mark everything in between as HWC_FRAMEBUFFER
350 std::pair<int, int> skip_layer_indices(-1, -1);
Zach Reizner45624d32015-06-10 16:03:01 -0700351 int num_layers = display_contents[i]->numHwLayers;
Sean Paulbd61c8d2015-10-29 15:00:17 -0400352 for (int j = 0; !use_framebuffer_target && j < num_layers; ++j) {
Sean Paulb386f1b2015-05-13 06:33:23 -0700353 hwc_layer_1_t *layer = &display_contents[i]->hwLayers[j];
Zach Reizner45624d32015-06-10 16:03:01 -0700354
Sean Paulbd61c8d2015-10-29 15:00:17 -0400355 if (!(layer->flags & HWC_SKIP_LAYER))
356 continue;
357
358 if (skip_layer_indices.first == -1)
359 skip_layer_indices.first = j;
360 skip_layer_indices.second = j;
361 }
362
363 for (int j = 0; j < num_layers; ++j) {
364 hwc_layer_1_t *layer = &display_contents[i]->hwLayers[j];
365
366 if (!use_framebuffer_target && !hwc_skip_layer(skip_layer_indices, j)) {
Zach Reizner1946fa72015-08-14 11:14:38 -0700367 if (layer->compositionType == HWC_FRAMEBUFFER)
368 layer->compositionType = HWC_OVERLAY;
369 } else {
370 switch (layer->compositionType) {
371 case HWC_OVERLAY:
372 case HWC_BACKGROUND:
373 case HWC_SIDEBAND:
374 case HWC_CURSOR_OVERLAY:
375 layer->compositionType = HWC_FRAMEBUFFER;
376 break;
377 }
378 }
Sean Paulef8f1f92015-04-29 16:05:23 -0400379 }
380 }
Sean Pauldffca952015-02-04 10:19:55 -0800381
Sean Paulef8f1f92015-04-29 16:05:23 -0400382 return 0;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500383}
384
Zach Reizner09807052015-08-13 14:53:41 -0700385static void hwc_add_layer_to_retire_fence(
386 hwc_layer_1_t *layer, hwc_display_contents_1_t *display_contents) {
Sean Paul04206122015-07-16 15:59:24 -0400387 if (layer->releaseFenceFd < 0)
388 return;
389
390 if (display_contents->retireFenceFd >= 0) {
391 int old_retire_fence = display_contents->retireFenceFd;
Zach Reiznerc6520e42015-08-13 14:32:09 -0700392 display_contents->retireFenceFd =
393 sync_merge("dc_retire", old_retire_fence, layer->releaseFenceFd);
Sean Paul04206122015-07-16 15:59:24 -0400394 close(old_retire_fence);
395 } else {
396 display_contents->retireFenceFd = dup(layer->releaseFenceFd);
397 }
398}
399
Sean Paule0c4c3d2015-01-20 16:56:04 -0500400static int hwc_set(hwc_composer_device_1_t *dev, size_t num_displays,
Zach Reizner4a253652015-09-10 18:30:54 -0700401 hwc_display_contents_1_t **sf_display_contents) {
Stéphane Marchesinbe98c8c2015-06-23 16:18:10 -0700402 ATRACE_CALL();
Sean Paulef8f1f92015-04-29 16:05:23 -0400403 struct hwc_context_t *ctx = (struct hwc_context_t *)&dev->common;
Zach Reizner4a253652015-09-10 18:30:54 -0700404 int ret = 0;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500405
Zach Reizner4a253652015-09-10 18:30:54 -0700406 std::vector<CheckedOutputFd> checked_output_fences;
407 std::vector<DrmHwcDisplayContents> displays_contents;
Zach Reizner09807052015-08-13 14:53:41 -0700408 std::vector<DrmCompositionDisplayLayersMap> layers_map;
409 std::vector<std::vector<size_t>> layers_indices;
Zach Reizner4a253652015-09-10 18:30:54 -0700410 displays_contents.reserve(num_displays);
411 // layers_map.reserve(num_displays);
Zach Reizner09807052015-08-13 14:53:41 -0700412 layers_indices.reserve(num_displays);
413
Zach Reizner4a253652015-09-10 18:30:54 -0700414 // Phase one does nothing that would cause errors. Only take ownership of FDs.
415 for (size_t i = 0; i < num_displays; ++i) {
416 hwc_display_contents_1_t *dc = sf_display_contents[i];
417 displays_contents.emplace_back();
418 DrmHwcDisplayContents &display_contents = displays_contents.back();
Haixia Shi7acc59b2015-09-30 10:57:54 -0700419 layers_indices.emplace_back();
420 std::vector<size_t> &indices_to_composite = layers_indices.back();
Zach Reizner4a253652015-09-10 18:30:54 -0700421
422 if (!sf_display_contents[i])
Sean Paulb386f1b2015-05-13 06:33:23 -0700423 continue;
Zach Reizner09807052015-08-13 14:53:41 -0700424
Haixia Shid21f5282015-10-05 14:35:09 -0700425 if (i == HWC_DISPLAY_VIRTUAL) {
426 ctx->virtual_compositor_worker.QueueComposite(dc);
427 continue;
428 }
429
Zach Reizner4a253652015-09-10 18:30:54 -0700430 std::ostringstream display_index_formatter;
431 display_index_formatter << "retire fence for display " << i;
432 std::string display_fence_description(display_index_formatter.str());
433 checked_output_fences.emplace_back(&dc->retireFenceFd,
434 display_fence_description.c_str(),
435 ctx->dummy_timeline);
436 display_contents.retire_fence = OutputFd(&dc->retireFenceFd);
Zach Reizner09807052015-08-13 14:53:41 -0700437
Zach Reizner4a253652015-09-10 18:30:54 -0700438 size_t num_dc_layers = dc->numHwLayers;
Haixia Shi1034bb72015-09-09 12:08:20 -0700439 int framebuffer_target_index = -1;
Zach Reizner4a253652015-09-10 18:30:54 -0700440 for (size_t j = 0; j < num_dc_layers; ++j) {
441 hwc_layer_1_t *sf_layer = &dc->hwLayers[j];
Sean Paulbd61c8d2015-10-29 15:00:17 -0400442 if (sf_layer->compositionType == HWC_FRAMEBUFFER_TARGET) {
443 framebuffer_target_index = j;
444 break;
445 }
446 }
447
448 for (size_t j = 0; j < num_dc_layers; ++j) {
449 hwc_layer_1_t *sf_layer = &dc->hwLayers[j];
Zach Reizner4a253652015-09-10 18:30:54 -0700450
451 display_contents.layers.emplace_back();
452 DrmHwcLayer &layer = display_contents.layers.back();
453
Sean Paulbd61c8d2015-10-29 15:00:17 -0400454 // In prepare() we marked all layers FRAMEBUFFER between SKIP_LAYER's.
455 // This means we should insert the FB_TARGET layer in the composition
456 // stack at the location of the first skip layer, and ignore the rest.
457 if (sf_layer->flags & HWC_SKIP_LAYER) {
458 if (framebuffer_target_index < 0)
459 continue;
460 int idx = framebuffer_target_index;
461 framebuffer_target_index = -1;
462 hwc_layer_1_t *fbt_layer = &dc->hwLayers[idx];
463 if (!fbt_layer->handle || (fbt_layer->flags & HWC_SKIP_LAYER)) {
464 ALOGE("Invalid HWC_FRAMEBUFFER_TARGET with HWC_SKIP_LAYER present");
465 continue;
466 }
467 indices_to_composite.push_back(idx);
Sean Paulb386f1b2015-05-13 06:33:23 -0700468 continue;
Sean Paulbd61c8d2015-10-29 15:00:17 -0400469 }
Zach Reizner4a253652015-09-10 18:30:54 -0700470
Sean Paul6f82f1d2015-10-21 20:05:05 -0400471 if (sf_layer->compositionType == HWC_OVERLAY)
472 indices_to_composite.push_back(j);
Zach Reizner4a253652015-09-10 18:30:54 -0700473
474 layer.acquire_fence.Set(sf_layer->acquireFenceFd);
475 sf_layer->acquireFenceFd = -1;
476
477 std::ostringstream layer_fence_formatter;
478 layer_fence_formatter << "release fence for layer " << j << " of display "
479 << i;
480 std::string layer_fence_description(layer_fence_formatter.str());
481 checked_output_fences.emplace_back(&sf_layer->releaseFenceFd,
482 layer_fence_description.c_str(),
483 ctx->dummy_timeline);
484 layer.release_fence = OutputFd(&sf_layer->releaseFenceFd);
Zach Reizner1946fa72015-08-14 11:14:38 -0700485 }
Zach Reizner4a253652015-09-10 18:30:54 -0700486
Sean Paulbd61c8d2015-10-29 15:00:17 -0400487 // This is a catch-all in case we get a frame without any overlay layers, or
488 // skip layers, but with a value fb_target layer. This _shouldn't_ happen,
489 // but it's not ruled out by the hwc specification
Sean Paul6f82f1d2015-10-21 20:05:05 -0400490 if (indices_to_composite.empty() && framebuffer_target_index >= 0) {
491 hwc_layer_1_t *sf_layer = &dc->hwLayers[framebuffer_target_index];
492 if (!sf_layer->handle || (sf_layer->flags & HWC_SKIP_LAYER)) {
493 ALOGE(
494 "Expected valid layer with HWC_FRAMEBUFFER_TARGET when all "
495 "HWC_OVERLAY layers are skipped.");
Zach Reizner4a253652015-09-10 18:30:54 -0700496 ret = -EINVAL;
Zach Reizner1946fa72015-08-14 11:14:38 -0700497 }
Sean Paul6f82f1d2015-10-21 20:05:05 -0400498 indices_to_composite.push_back(framebuffer_target_index);
Zach Reizner45624d32015-06-10 16:03:01 -0700499 }
Zach Reizner4a253652015-09-10 18:30:54 -0700500 }
Zach Reizner45624d32015-06-10 16:03:01 -0700501
Zach Reizner4a253652015-09-10 18:30:54 -0700502 if (ret)
503 return ret;
504
505 for (size_t i = 0; i < num_displays; ++i) {
506 hwc_display_contents_1_t *dc = sf_display_contents[i];
507 DrmHwcDisplayContents &display_contents = displays_contents[i];
Haixia Shi2fddd372015-10-15 16:21:48 -0700508 if (!sf_display_contents[i] || i == HWC_DISPLAY_VIRTUAL)
Zach Reizner4a253652015-09-10 18:30:54 -0700509 continue;
510
511 layers_map.emplace_back();
512 DrmCompositionDisplayLayersMap &map = layers_map.back();
Zach Reizneracba14b2015-10-13 18:19:26 -0700513 map.display = i;
Zach Reizner5757e822015-10-16 19:06:31 -0700514 map.geometry_changed =
515 (dc->flags & HWC_GEOMETRY_CHANGED) == HWC_GEOMETRY_CHANGED;
Zach Reizner4a253652015-09-10 18:30:54 -0700516 std::vector<size_t> &indices_to_composite = layers_indices[i];
517 for (size_t j : indices_to_composite) {
518 hwc_layer_1_t *sf_layer = &dc->hwLayers[j];
519
520 DrmHwcLayer &layer = display_contents.layers[j];
521
Zach Reiznerff30b522015-10-28 19:08:45 -0700522 ret = layer.InitFromHwcLayer(sf_layer, ctx->importer.get(), ctx->gralloc);
Zach Reizner7e88be92015-10-12 15:20:33 -0700523 if (ret) {
524 ALOGE("Failed to init composition from layer %d", ret);
525 return ret;
526 }
Zach Reizner4a253652015-09-10 18:30:54 -0700527 map.layers.emplace_back(std::move(layer));
528 }
529 }
530
531 std::unique_ptr<DrmComposition> composition(
Zach Reiznerff30b522015-10-28 19:08:45 -0700532 ctx->drm.compositor()->CreateComposition(ctx->importer.get()));
Zach Reizner4a253652015-09-10 18:30:54 -0700533 if (!composition) {
534 ALOGE("Drm composition init failed");
535 return -EINVAL;
Zach Reizner09807052015-08-13 14:53:41 -0700536 }
Zach Reizner45624d32015-06-10 16:03:01 -0700537
Zach Reizner09807052015-08-13 14:53:41 -0700538 ret = composition->SetLayers(layers_map.size(), layers_map.data());
539 if (ret) {
Zach Reizner09807052015-08-13 14:53:41 -0700540 return -EINVAL;
541 }
Zach Reizner45624d32015-06-10 16:03:01 -0700542
Zach Reizner09807052015-08-13 14:53:41 -0700543 ret = ctx->drm.compositor()->QueueComposition(std::move(composition));
544 if (ret) {
Zach Reizner09807052015-08-13 14:53:41 -0700545 return -EINVAL;
546 }
547
Zach Reizner566da2b2015-10-06 15:39:09 -0700548 for (size_t i = 0; i < num_displays; ++i) {
549 hwc_display_contents_1_t *dc = sf_display_contents[i];
550 if (!dc)
551 continue;
552
553 size_t num_dc_layers = dc->numHwLayers;
554 for (size_t j = 0; j < num_dc_layers; ++j) {
555 hwc_layer_1_t *layer = &dc->hwLayers[j];
556 if (layer->flags & HWC_SKIP_LAYER)
557 continue;
558 hwc_add_layer_to_retire_fence(layer, dc);
559 }
560 }
561
Zach Reizner09807052015-08-13 14:53:41 -0700562 composition.reset(NULL);
563
Sean Paulef8f1f92015-04-29 16:05:23 -0400564 return ret;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500565}
566
Sean Paulef8f1f92015-04-29 16:05:23 -0400567static int hwc_event_control(struct hwc_composer_device_1 *dev, int display,
568 int event, int enabled) {
Sean Paulef8f1f92015-04-29 16:05:23 -0400569 if (event != HWC_EVENT_VSYNC || (enabled != 0 && enabled != 1))
570 return -EINVAL;
Sean Pauleb9e75c2015-01-25 23:31:30 -0500571
Sean Paul4057be32015-05-13 06:23:09 -0700572 struct hwc_context_t *ctx = (struct hwc_context_t *)&dev->common;
573 hwc_drm_display_t *hd = &ctx->displays[display];
574 return hd->vsync_worker.VSyncControl(enabled);
Sean Paule0c4c3d2015-01-20 16:56:04 -0500575}
576
Sean Paulef8f1f92015-04-29 16:05:23 -0400577static int hwc_set_power_mode(struct hwc_composer_device_1 *dev, int display,
578 int mode) {
579 struct hwc_context_t *ctx = (struct hwc_context_t *)&dev->common;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500580
Sean Paul6a55e9f2015-04-30 15:31:06 -0400581 uint64_t dpmsValue = 0;
Sean Paulef8f1f92015-04-29 16:05:23 -0400582 switch (mode) {
583 case HWC_POWER_MODE_OFF:
Sean Paul6a55e9f2015-04-30 15:31:06 -0400584 dpmsValue = DRM_MODE_DPMS_OFF;
Sean Paulef8f1f92015-04-29 16:05:23 -0400585 break;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500586
Sean Paulef8f1f92015-04-29 16:05:23 -0400587 /* We can't support dozing right now, so go full on */
588 case HWC_POWER_MODE_DOZE:
589 case HWC_POWER_MODE_DOZE_SUSPEND:
590 case HWC_POWER_MODE_NORMAL:
Sean Paul6a55e9f2015-04-30 15:31:06 -0400591 dpmsValue = DRM_MODE_DPMS_ON;
Sean Paulef8f1f92015-04-29 16:05:23 -0400592 break;
593 };
Sean Paul6a55e9f2015-04-30 15:31:06 -0400594 return ctx->drm.SetDpmsMode(display, dpmsValue);
Sean Paule0c4c3d2015-01-20 16:56:04 -0500595}
596
Sean Paulef8f1f92015-04-29 16:05:23 -0400597static int hwc_query(struct hwc_composer_device_1 * /* dev */, int what,
598 int *value) {
599 switch (what) {
600 case HWC_BACKGROUND_LAYER_SUPPORTED:
601 *value = 0; /* TODO: We should do this */
602 break;
603 case HWC_VSYNC_PERIOD:
604 ALOGW("Query for deprecated vsync value, returning 60Hz");
605 *value = 1000 * 1000 * 1000 / 60;
606 break;
607 case HWC_DISPLAY_TYPES_SUPPORTED:
Haixia Shi2fddd372015-10-15 16:21:48 -0700608 *value = HWC_DISPLAY_PRIMARY_BIT | HWC_DISPLAY_EXTERNAL_BIT |
609 HWC_DISPLAY_VIRTUAL_BIT;
Sean Paulef8f1f92015-04-29 16:05:23 -0400610 break;
611 }
612 return 0;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500613}
614
Sean Paulef8f1f92015-04-29 16:05:23 -0400615static void hwc_register_procs(struct hwc_composer_device_1 *dev,
616 hwc_procs_t const *procs) {
617 struct hwc_context_t *ctx = (struct hwc_context_t *)&dev->common;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500618
Sean Paulef8f1f92015-04-29 16:05:23 -0400619 ctx->procs = procs;
Sean Paul4057be32015-05-13 06:23:09 -0700620
Zach Reiznerff30b522015-10-28 19:08:45 -0700621 for (std::pair<const int, hwc_drm_display> &display_entry : ctx->displays)
622 display_entry.second.vsync_worker.SetProcs(procs);
Sean Paule0c4c3d2015-01-20 16:56:04 -0500623}
624
Sean Paulef8f1f92015-04-29 16:05:23 -0400625static int hwc_get_display_configs(struct hwc_composer_device_1 *dev,
626 int display, uint32_t *configs,
Sean Paul6a55e9f2015-04-30 15:31:06 -0400627 size_t *num_configs) {
628 if (!*num_configs)
Sean Paulef8f1f92015-04-29 16:05:23 -0400629 return 0;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500630
Sean Paulef8f1f92015-04-29 16:05:23 -0400631 struct hwc_context_t *ctx = (struct hwc_context_t *)&dev->common;
Sean Paule42febf2015-05-07 11:35:29 -0700632 hwc_drm_display_t *hd = &ctx->displays[display];
Sean Paul6a55e9f2015-04-30 15:31:06 -0400633 hd->config_ids.clear();
634
635 DrmConnector *connector = ctx->drm.GetConnectorForDisplay(display);
636 if (!connector) {
637 ALOGE("Failed to get connector for display %d", display);
Sean Paulef8f1f92015-04-29 16:05:23 -0400638 return -ENODEV;
639 }
Sean Paule0c4c3d2015-01-20 16:56:04 -0500640
Sean Paule42febf2015-05-07 11:35:29 -0700641 int ret = connector->UpdateModes();
Sean Paul6a55e9f2015-04-30 15:31:06 -0400642 if (ret) {
643 ALOGE("Failed to update display modes %d", ret);
Sean Paulef8f1f92015-04-29 16:05:23 -0400644 return ret;
Sean Paulef8f1f92015-04-29 16:05:23 -0400645 }
Sean Paule0c4c3d2015-01-20 16:56:04 -0500646
Zach Reiznerff30b522015-10-28 19:08:45 -0700647 for (const DrmMode &mode : connector->modes()) {
Sean Paul6a55e9f2015-04-30 15:31:06 -0400648 size_t idx = hd->config_ids.size();
649 if (idx == *num_configs)
650 break;
Zach Reiznerff30b522015-10-28 19:08:45 -0700651 hd->config_ids.push_back(mode.id());
652 configs[idx] = mode.id();
Sean Paul6a55e9f2015-04-30 15:31:06 -0400653 }
654 *num_configs = hd->config_ids.size();
655 return *num_configs == 0 ? -1 : 0;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500656}
657
Sean Paulef8f1f92015-04-29 16:05:23 -0400658static int hwc_get_display_attributes(struct hwc_composer_device_1 *dev,
659 int display, uint32_t config,
660 const uint32_t *attributes,
661 int32_t *values) {
662 struct hwc_context_t *ctx = (struct hwc_context_t *)&dev->common;
Sean Paul6a55e9f2015-04-30 15:31:06 -0400663 DrmConnector *c = ctx->drm.GetConnectorForDisplay(display);
Sean Paulef8f1f92015-04-29 16:05:23 -0400664 if (!c) {
Sean Paul6a55e9f2015-04-30 15:31:06 -0400665 ALOGE("Failed to get DrmConnector for display %d", display);
Sean Paulef8f1f92015-04-29 16:05:23 -0400666 return -ENODEV;
667 }
Sean Paul6a55e9f2015-04-30 15:31:06 -0400668 DrmMode mode;
Zach Reiznerff30b522015-10-28 19:08:45 -0700669 for (const DrmMode &conn_mode : c->modes()) {
670 if (conn_mode.id() == config) {
671 mode = conn_mode;
Sean Paul6a55e9f2015-04-30 15:31:06 -0400672 break;
673 }
674 }
675 if (mode.id() == 0) {
676 ALOGE("Failed to find active mode for display %d", display);
677 return -ENOENT;
Sean Paulef8f1f92015-04-29 16:05:23 -0400678 }
Sean Paule0c4c3d2015-01-20 16:56:04 -0500679
Sean Paul6a55e9f2015-04-30 15:31:06 -0400680 uint32_t mm_width = c->mm_width();
681 uint32_t mm_height = c->mm_height();
Sean Paulef8f1f92015-04-29 16:05:23 -0400682 for (int i = 0; attributes[i] != HWC_DISPLAY_NO_ATTRIBUTE; ++i) {
683 switch (attributes[i]) {
684 case HWC_DISPLAY_VSYNC_PERIOD:
Sean Paul6a55e9f2015-04-30 15:31:06 -0400685 values[i] = 1000 * 1000 * 1000 / mode.v_refresh();
Sean Paulef8f1f92015-04-29 16:05:23 -0400686 break;
687 case HWC_DISPLAY_WIDTH:
Sean Paul6a55e9f2015-04-30 15:31:06 -0400688 values[i] = mode.h_display();
Sean Paulef8f1f92015-04-29 16:05:23 -0400689 break;
690 case HWC_DISPLAY_HEIGHT:
Sean Paul6a55e9f2015-04-30 15:31:06 -0400691 values[i] = mode.v_display();
Sean Paulef8f1f92015-04-29 16:05:23 -0400692 break;
693 case HWC_DISPLAY_DPI_X:
694 /* Dots per 1000 inches */
Sean Paul6a55e9f2015-04-30 15:31:06 -0400695 values[i] = mm_width ? (mode.h_display() * UM_PER_INCH) / mm_width : 0;
Sean Paulef8f1f92015-04-29 16:05:23 -0400696 break;
697 case HWC_DISPLAY_DPI_Y:
698 /* Dots per 1000 inches */
Sean Paul6a55e9f2015-04-30 15:31:06 -0400699 values[i] =
700 mm_height ? (mode.v_display() * UM_PER_INCH) / mm_height : 0;
Sean Paulef8f1f92015-04-29 16:05:23 -0400701 break;
702 }
703 }
Sean Paulef8f1f92015-04-29 16:05:23 -0400704 return 0;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500705}
706
Sean Paulef8f1f92015-04-29 16:05:23 -0400707static int hwc_get_active_config(struct hwc_composer_device_1 *dev,
708 int display) {
709 struct hwc_context_t *ctx = (struct hwc_context_t *)&dev->common;
Sean Paul6a55e9f2015-04-30 15:31:06 -0400710 DrmConnector *c = ctx->drm.GetConnectorForDisplay(display);
711 if (!c) {
712 ALOGE("Failed to get DrmConnector for display %d", display);
Sean Paulef8f1f92015-04-29 16:05:23 -0400713 return -ENODEV;
714 }
Sean Paule0c4c3d2015-01-20 16:56:04 -0500715
Sean Paul6a55e9f2015-04-30 15:31:06 -0400716 DrmMode mode = c->active_mode();
Sean Paule42febf2015-05-07 11:35:29 -0700717 hwc_drm_display_t *hd = &ctx->displays[display];
Sean Paul6a55e9f2015-04-30 15:31:06 -0400718 for (size_t i = 0; i < hd->config_ids.size(); ++i) {
719 if (hd->config_ids[i] == mode.id())
720 return i;
Sean Paulef8f1f92015-04-29 16:05:23 -0400721 }
Sean Paul6a55e9f2015-04-30 15:31:06 -0400722 return -1;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500723}
724
Sean Paulef8f1f92015-04-29 16:05:23 -0400725static int hwc_set_active_config(struct hwc_composer_device_1 *dev, int display,
726 int index) {
727 struct hwc_context_t *ctx = (struct hwc_context_t *)&dev->common;
Sean Paule42febf2015-05-07 11:35:29 -0700728 hwc_drm_display_t *hd = &ctx->displays[display];
Sean Paul6a55e9f2015-04-30 15:31:06 -0400729 if (index >= (int)hd->config_ids.size()) {
730 ALOGE("Invalid config index %d passed in", index);
731 return -EINVAL;
Sean Paulef8f1f92015-04-29 16:05:23 -0400732 }
Sean Paule0c4c3d2015-01-20 16:56:04 -0500733
Sean Paul877be972015-06-03 14:08:27 -0400734 DrmConnector *c = ctx->drm.GetConnectorForDisplay(display);
735 if (!c) {
736 ALOGE("Failed to get connector for display %d", display);
737 return -ENODEV;
738 }
739 DrmMode mode;
Zach Reiznerff30b522015-10-28 19:08:45 -0700740 for (const DrmMode &conn_mode : c->modes()) {
741 if (conn_mode.id() == hd->config_ids[index]) {
742 mode = conn_mode;
Sean Paul877be972015-06-03 14:08:27 -0400743 break;
744 }
745 }
746 if (mode.id() != hd->config_ids[index]) {
747 ALOGE("Could not find active mode for %d/%d", index, hd->config_ids[index]);
748 return -ENOENT;
749 }
750 int ret = ctx->drm.SetDisplayActiveMode(display, mode);
Sean Paul6a55e9f2015-04-30 15:31:06 -0400751 if (ret) {
Sean Paul877be972015-06-03 14:08:27 -0400752 ALOGE("Failed to set active config %d", ret);
Sean Paul6a55e9f2015-04-30 15:31:06 -0400753 return ret;
Sean Paulef8f1f92015-04-29 16:05:23 -0400754 }
Sean Paul6a55e9f2015-04-30 15:31:06 -0400755 return ret;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500756}
757
Sean Paulef8f1f92015-04-29 16:05:23 -0400758static int hwc_device_close(struct hw_device_t *dev) {
759 struct hwc_context_t *ctx = (struct hwc_context_t *)dev;
Sean Paulef8f1f92015-04-29 16:05:23 -0400760 delete ctx;
Sean Paulef8f1f92015-04-29 16:05:23 -0400761 return 0;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500762}
763
Sean Paul24a26e32015-02-04 10:34:47 -0800764/*
765 * TODO: This function sets the active config to the first one in the list. This
766 * should be fixed such that it selects the preferred mode for the display, or
767 * some other, saner, method of choosing the config.
768 */
Sean Paule42febf2015-05-07 11:35:29 -0700769static int hwc_set_initial_config(hwc_drm_display_t *hd) {
Sean Paulef8f1f92015-04-29 16:05:23 -0400770 uint32_t config;
771 size_t num_configs = 1;
772 int ret = hwc_get_display_configs(&hd->ctx->device, hd->display, &config,
773 &num_configs);
774 if (ret || !num_configs)
775 return 0;
Sean Paul24a26e32015-02-04 10:34:47 -0800776
Sean Paulef8f1f92015-04-29 16:05:23 -0400777 ret = hwc_set_active_config(&hd->ctx->device, hd->display, 0);
778 if (ret) {
779 ALOGE("Failed to set active config d=%d ret=%d", hd->display, ret);
780 return ret;
781 }
Sean Paul24a26e32015-02-04 10:34:47 -0800782
Sean Paulef8f1f92015-04-29 16:05:23 -0400783 return ret;
Sean Paul24a26e32015-02-04 10:34:47 -0800784}
785
Sean Paul6a55e9f2015-04-30 15:31:06 -0400786static int hwc_initialize_display(struct hwc_context_t *ctx, int display) {
Sean Paule42febf2015-05-07 11:35:29 -0700787 hwc_drm_display_t *hd = &ctx->displays[display];
Sean Paulef8f1f92015-04-29 16:05:23 -0400788 hd->ctx = ctx;
789 hd->display = display;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500790
Sean Paulb386f1b2015-05-13 06:33:23 -0700791 int ret = hwc_set_initial_config(hd);
Sean Paulef8f1f92015-04-29 16:05:23 -0400792 if (ret) {
793 ALOGE("Failed to set initial config for d=%d ret=%d", display, ret);
Sean Paulef8f1f92015-04-29 16:05:23 -0400794 return ret;
795 }
Sean Paul24a26e32015-02-04 10:34:47 -0800796
Sean Paul4057be32015-05-13 06:23:09 -0700797 ret = hd->vsync_worker.Init(&ctx->drm, display);
798 if (ret) {
799 ALOGE("Failed to create event worker for display %d %d\n", display, ret);
800 return ret;
801 }
802
Sean Paulef8f1f92015-04-29 16:05:23 -0400803 return 0;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500804}
805
Sean Paulef8f1f92015-04-29 16:05:23 -0400806static int hwc_enumerate_displays(struct hwc_context_t *ctx) {
Sean Paul6a55e9f2015-04-30 15:31:06 -0400807 int ret;
Zach Reiznerff30b522015-10-28 19:08:45 -0700808 for (auto &conn : ctx->drm.connectors()) {
809 ret = hwc_initialize_display(ctx, conn->display());
Sean Paul6a55e9f2015-04-30 15:31:06 -0400810 if (ret) {
Zach Reiznerff30b522015-10-28 19:08:45 -0700811 ALOGE("Failed to initialize display %d", conn->display());
Sean Paul6a55e9f2015-04-30 15:31:06 -0400812 return ret;
Sean Paulef8f1f92015-04-29 16:05:23 -0400813 }
814 }
Sean Paulef8f1f92015-04-29 16:05:23 -0400815
Haixia Shid21f5282015-10-05 14:35:09 -0700816 ret = ctx->virtual_compositor_worker.Init();
817 if (ret) {
818 ALOGE("Failed to initialize virtual compositor worker");
819 return ret;
820 }
Sean Paulef8f1f92015-04-29 16:05:23 -0400821 return 0;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500822}
823
Sean Paulef8f1f92015-04-29 16:05:23 -0400824static int hwc_device_open(const struct hw_module_t *module, const char *name,
825 struct hw_device_t **dev) {
826 if (strcmp(name, HWC_HARDWARE_COMPOSER)) {
827 ALOGE("Invalid module name- %s", name);
828 return -EINVAL;
829 }
830
Zach Reiznerff30b522015-10-28 19:08:45 -0700831 std::unique_ptr<hwc_context_t> ctx(new hwc_context_t());
Sean Paulef8f1f92015-04-29 16:05:23 -0400832 if (!ctx) {
833 ALOGE("Failed to allocate hwc context");
834 return -ENOMEM;
835 }
836
Sean Paul6a55e9f2015-04-30 15:31:06 -0400837 int ret = ctx->drm.Init();
838 if (ret) {
839 ALOGE("Can't initialize Drm object %d", ret);
Sean Paul6a55e9f2015-04-30 15:31:06 -0400840 return ret;
841 }
842
Zach Reizner4a253652015-09-10 18:30:54 -0700843 ret = hw_get_module(GRALLOC_HARDWARE_MODULE_ID,
844 (const hw_module_t **)&ctx->gralloc);
845 if (ret) {
846 ALOGE("Failed to open gralloc module %d", ret);
Zach Reizner4a253652015-09-10 18:30:54 -0700847 return ret;
848 }
849
850 ret = ctx->dummy_timeline.Init();
851 if (ret) {
852 ALOGE("Failed to create dummy sw sync timeline %d", ret);
853 return ret;
854 }
855
Zach Reiznerff30b522015-10-28 19:08:45 -0700856 ctx->importer.reset(Importer::CreateInstance(&ctx->drm));
Sean Paulda6270d2015-06-01 14:11:52 -0400857 if (!ctx->importer) {
858 ALOGE("Failed to create importer instance");
Sean Paulef8f1f92015-04-29 16:05:23 -0400859 return ret;
860 }
861
Zach Reiznerff30b522015-10-28 19:08:45 -0700862 ret = hwc_enumerate_displays(ctx.get());
Sean Paulef8f1f92015-04-29 16:05:23 -0400863 if (ret) {
864 ALOGE("Failed to enumerate displays: %s", strerror(ret));
Sean Paul6a55e9f2015-04-30 15:31:06 -0400865 return ret;
866 }
867
Sean Paulef8f1f92015-04-29 16:05:23 -0400868 ctx->device.common.tag = HARDWARE_DEVICE_TAG;
869 ctx->device.common.version = HWC_DEVICE_API_VERSION_1_4;
870 ctx->device.common.module = const_cast<hw_module_t *>(module);
871 ctx->device.common.close = hwc_device_close;
872
Sean Paul9046c642015-06-10 17:27:47 -0400873 ctx->device.dump = hwc_dump;
Sean Paulef8f1f92015-04-29 16:05:23 -0400874 ctx->device.prepare = hwc_prepare;
875 ctx->device.set = hwc_set;
876 ctx->device.eventControl = hwc_event_control;
877 ctx->device.setPowerMode = hwc_set_power_mode;
878 ctx->device.query = hwc_query;
879 ctx->device.registerProcs = hwc_register_procs;
880 ctx->device.getDisplayConfigs = hwc_get_display_configs;
881 ctx->device.getDisplayAttributes = hwc_get_display_attributes;
882 ctx->device.getActiveConfig = hwc_get_active_config;
883 ctx->device.setActiveConfig = hwc_set_active_config;
884 ctx->device.setCursorPositionAsync = NULL; /* TODO: Add cursor */
885
886 *dev = &ctx->device.common;
Zach Reiznerff30b522015-10-28 19:08:45 -0700887 ctx.release();
Sean Paulef8f1f92015-04-29 16:05:23 -0400888
889 return 0;
890}
Sean Paul6a55e9f2015-04-30 15:31:06 -0400891}
Sean Paulef8f1f92015-04-29 16:05:23 -0400892
Sean Paul6a55e9f2015-04-30 15:31:06 -0400893static struct hw_module_methods_t hwc_module_methods = {
894 open : android::hwc_device_open
895};
Sean Paule0c4c3d2015-01-20 16:56:04 -0500896
897hwc_module_t HAL_MODULE_INFO_SYM = {
Sean Paulef8f1f92015-04-29 16:05:23 -0400898 common : {
899 tag : HARDWARE_MODULE_TAG,
900 version_major : 1,
901 version_minor : 0,
902 id : HWC_HARDWARE_MODULE_ID,
903 name : "DRM hwcomposer module",
904 author : "The Android Open Source Project",
905 methods : &hwc_module_methods,
906 dso : NULL,
907 reserved : {0},
908 }
Sean Paule0c4c3d2015-01-20 16:56:04 -0500909};