blob: 6a30fbea301197c3d42bf72a4beeb61468742c93 [file] [log] [blame]
Sean Paule0c4c3d2015-01-20 16:56:04 -05001/*
2 * Copyright (C) 2015 The Android Open Source Project
3 *
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
7 *
8 * http://www.apache.org/licenses/LICENSE-2.0
9 *
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
15 */
16
17#define LOG_TAG "hwcomposer-drm"
18
Sean Paulef8f1f92015-04-29 16:05:23 -040019#include "drm_hwcomposer.h"
Sean Paul6a55e9f2015-04-30 15:31:06 -040020#include "drmresources.h"
Zach Reizner45624d32015-06-10 16:03:01 -070021#include "gl_compositor.h"
Sean Paulda6270d2015-06-01 14:11:52 -040022#include "importer.h"
Sean Paul4057be32015-05-13 06:23:09 -070023#include "vsyncworker.h"
Sean Paulef8f1f92015-04-29 16:05:23 -040024
Sean Paule0c4c3d2015-01-20 16:56:04 -050025#include <errno.h>
Sean Paulef8f1f92015-04-29 16:05:23 -040026#include <fcntl.h>
Sean Paul5ad302c2015-05-11 10:43:31 -070027#include <list>
Sean Paule42febf2015-05-07 11:35:29 -070028#include <map>
Sean Paulef8f1f92015-04-29 16:05:23 -040029#include <pthread.h>
Dan Albertc5255b32015-05-07 23:42:54 -070030#include <stdlib.h>
Sean Paule0c4c3d2015-01-20 16:56:04 -050031#include <sys/param.h>
Sean Paul9aa5ad32015-01-22 15:47:54 -050032#include <sys/resource.h>
Sean Paule0c4c3d2015-01-20 16:56:04 -050033#include <xf86drm.h>
34#include <xf86drmMode.h>
Sean Paule0c4c3d2015-01-20 16:56:04 -050035
Sean Paulef8f1f92015-04-29 16:05:23 -040036#include <cutils/log.h>
37#include <cutils/properties.h>
Sean Paule0c4c3d2015-01-20 16:56:04 -050038#include <hardware/hardware.h>
39#include <hardware/hwcomposer.h>
Sean Paulf1dc1912015-01-24 01:34:31 -050040#include <sw_sync.h>
Sean Paulef8f1f92015-04-29 16:05:23 -040041#include <sync/sync.h>
Zach Reizner45624d32015-06-10 16:03:01 -070042#include <ui/GraphicBuffer.h>
43#include <ui/PixelFormat.h>
Sean Paule0c4c3d2015-01-20 16:56:04 -050044
Sean Paule0c4c3d2015-01-20 16:56:04 -050045#define UM_PER_INCH 25400
Zach Reizner45624d32015-06-10 16:03:01 -070046#define HWC_FB_BUFFERS 2
Sean Paule0c4c3d2015-01-20 16:56:04 -050047
Sean Paul6a55e9f2015-04-30 15:31:06 -040048namespace android {
Sean Paule0c4c3d2015-01-20 16:56:04 -050049
Zach Reizner45624d32015-06-10 16:03:01 -070050struct hwc_drm_display_framebuffer {
51 hwc_drm_display_framebuffer() : release_fence_fd_(-1) {
52 }
53
54 ~hwc_drm_display_framebuffer() {
55 if (release_fence_fd() >= 0)
56 close(release_fence_fd());
57 }
58
59 bool is_valid() {
60 return buffer_ != NULL;
61 }
62
63 sp<GraphicBuffer> buffer() {
64 return buffer_;
65 }
66
67 int release_fence_fd() {
68 return release_fence_fd_;
69 }
70
71 void set_release_fence_fd(int fd) {
72 if (release_fence_fd_ >= 0)
73 close(release_fence_fd_);
74 release_fence_fd_ = fd;
75 }
76
77 bool Allocate(uint32_t w, uint32_t h) {
78 if (is_valid()) {
79 if (buffer_->getWidth() == w && buffer_->getHeight() == h)
80 return true;
81
82 if (release_fence_fd_ >= 0) {
83 if (sync_wait(release_fence_fd_, -1) != 0) {
84 return false;
85 }
86 }
87 Clear();
88 }
89 buffer_ = new GraphicBuffer(w, h, android::PIXEL_FORMAT_RGBA_8888,
90 GRALLOC_USAGE_HW_FB | GRALLOC_USAGE_HW_RENDER |
91 GRALLOC_USAGE_HW_COMPOSER);
92 release_fence_fd_ = -1;
93 return is_valid();
94 }
95
96 void Clear() {
97 if (!is_valid())
98 return;
99
100 if (release_fence_fd_ >= 0) {
101 close(release_fence_fd_);
102 release_fence_fd_ = -1;
103 }
104
105 buffer_.clear();
106 }
107
108 int WaitReleased(int timeout_milliseconds) {
109 if (!is_valid())
110 return 0;
111 if (release_fence_fd_ < 0)
112 return 0;
113
114 int ret = sync_wait(release_fence_fd_, timeout_milliseconds);
115 return ret;
116 }
117
118 private:
119 sp<GraphicBuffer> buffer_;
120 int release_fence_fd_;
121};
122
123
Sean Paule42febf2015-05-07 11:35:29 -0700124typedef struct hwc_drm_display {
Sean Paulef8f1f92015-04-29 16:05:23 -0400125 struct hwc_context_t *ctx;
126 int display;
Sean Paul9aa5ad32015-01-22 15:47:54 -0500127
Sean Paul6a55e9f2015-04-30 15:31:06 -0400128 std::vector<uint32_t> config_ids;
Sean Paul9aa5ad32015-01-22 15:47:54 -0500129
Sean Paul4057be32015-05-13 06:23:09 -0700130 VSyncWorker vsync_worker;
Zach Reizner45624d32015-06-10 16:03:01 -0700131
132 hwc_drm_display_framebuffer fb_chain[HWC_FB_BUFFERS];
133 int fb_idx;
Sean Paule42febf2015-05-07 11:35:29 -0700134} hwc_drm_display_t;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500135
136struct hwc_context_t {
Sean Paule42febf2015-05-07 11:35:29 -0700137 // map of display:hwc_drm_display_t
138 typedef std::map<int, hwc_drm_display_t> DisplayMap;
139 typedef DisplayMap::iterator DisplayMapIter;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500140
Sean Paulda6270d2015-06-01 14:11:52 -0400141 hwc_context_t() : procs(NULL), importer(NULL) {
142 }
143
144 ~hwc_context_t() {
145 delete importer;
146 }
147
Sean Paule42febf2015-05-07 11:35:29 -0700148 hwc_composer_device_1_t device;
Sean Paulef8f1f92015-04-29 16:05:23 -0400149 hwc_procs_t const *procs;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500150
Sean Paule42febf2015-05-07 11:35:29 -0700151 DisplayMap displays;
Sean Paul6a55e9f2015-04-30 15:31:06 -0400152 DrmResources drm;
Sean Paulda6270d2015-06-01 14:11:52 -0400153 Importer *importer;
Zach Reizner45624d32015-06-10 16:03:01 -0700154 GLCompositor pre_compositor;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500155};
156
Sean Paul9046c642015-06-10 17:27:47 -0400157static void hwc_dump(struct hwc_composer_device_1* dev, char *buff,
158 int buff_len) {
159 struct hwc_context_t *ctx = (struct hwc_context_t *)&dev->common;
160 std::ostringstream out;
161
162 ctx->drm.compositor()->Dump(&out);
163 std::string out_str = out.str();
164 strncpy(buff, out_str.c_str(), std::min((size_t)buff_len, out_str.length()));
165}
166
Sean Paulb386f1b2015-05-13 06:33:23 -0700167static int hwc_prepare(hwc_composer_device_1_t *dev, size_t num_displays,
Sean Paulef8f1f92015-04-29 16:05:23 -0400168 hwc_display_contents_1_t **display_contents) {
Sean Paulb386f1b2015-05-13 06:33:23 -0700169 struct hwc_context_t *ctx = (struct hwc_context_t *)&dev->common;
Sean Paule42febf2015-05-07 11:35:29 -0700170 for (int i = 0; i < (int)num_displays; ++i) {
Sean Paulef8f1f92015-04-29 16:05:23 -0400171 if (!display_contents[i])
172 continue;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500173
Sean Paulb386f1b2015-05-13 06:33:23 -0700174 DrmCrtc *crtc = ctx->drm.GetCrtcForDisplay(i);
175 if (!crtc) {
176 ALOGE("No crtc for display %d", i);
Sean Paulb386f1b2015-05-13 06:33:23 -0700177 return -ENODEV;
178 }
Sean Paulb386f1b2015-05-13 06:33:23 -0700179
Zach Reizner45624d32015-06-10 16:03:01 -0700180 int num_layers = display_contents[i]->numHwLayers;
181 for (int j = 0; j < num_layers; j++) {
Sean Paulb386f1b2015-05-13 06:33:23 -0700182 hwc_layer_1_t *layer = &display_contents[i]->hwLayers[j];
Zach Reizner45624d32015-06-10 16:03:01 -0700183
184 if (crtc->requires_modeset()) {
185 if (layer->compositionType == HWC_OVERLAY)
186 layer->compositionType = HWC_FRAMEBUFFER;
187 } else {
188 if (layer->compositionType == HWC_FRAMEBUFFER)
189 layer->compositionType = HWC_OVERLAY;
190 }
Sean Paulef8f1f92015-04-29 16:05:23 -0400191 }
192 }
Sean Pauldffca952015-02-04 10:19:55 -0800193
Sean Paulef8f1f92015-04-29 16:05:23 -0400194 return 0;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500195}
196
Sean Paulb386f1b2015-05-13 06:33:23 -0700197static void hwc_set_cleanup(size_t num_displays,
198 hwc_display_contents_1_t **display_contents,
199 Composition *composition) {
200 for (int i = 0; i < (int)num_displays; ++i) {
201 if (!display_contents[i])
202 continue;
203
204 hwc_display_contents_1_t *dc = display_contents[i];
205 for (size_t j = 0; j < dc->numHwLayers; ++j) {
206 hwc_layer_1_t *layer = &dc->hwLayers[j];
207 if (layer->acquireFenceFd >= 0) {
208 close(layer->acquireFenceFd);
209 layer->acquireFenceFd = -1;
210 }
211 }
212 if (dc->outbufAcquireFenceFd >= 0) {
213 close(dc->outbufAcquireFenceFd);
214 dc->outbufAcquireFenceFd = -1;
215 }
216 }
217
218 delete composition;
219}
220
Sean Paulb386f1b2015-05-13 06:33:23 -0700221static int hwc_add_layer(int display, hwc_context_t *ctx, hwc_layer_1_t *layer,
222 Composition *composition) {
223 hwc_drm_bo_t bo;
224 int ret = ctx->importer->ImportBuffer(layer->handle, &bo);
225 if (ret) {
226 ALOGE("Failed to import handle to bo %d", ret);
227 return ret;
Sean Paulef8f1f92015-04-29 16:05:23 -0400228 }
Sean Paulefb20cb2015-02-04 09:29:15 -0800229
Sean Paulb386f1b2015-05-13 06:33:23 -0700230 ret = composition->AddLayer(display, layer, &bo);
231 if (!ret)
Sean Paulef8f1f92015-04-29 16:05:23 -0400232 return 0;
Sean Paul9aa5ad32015-01-22 15:47:54 -0500233
Sean Paulb386f1b2015-05-13 06:33:23 -0700234 int destroy_ret = ctx->importer->ReleaseBuffer(&bo);
235 if (destroy_ret)
236 ALOGE("Failed to destroy buffer %d", destroy_ret);
Sean Paul9aa5ad32015-01-22 15:47:54 -0500237
Sean Paulef8f1f92015-04-29 16:05:23 -0400238 return ret;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500239}
240
241static int hwc_set(hwc_composer_device_1_t *dev, size_t num_displays,
Sean Paulef8f1f92015-04-29 16:05:23 -0400242 hwc_display_contents_1_t **display_contents) {
243 struct hwc_context_t *ctx = (struct hwc_context_t *)&dev->common;
Sean Paulb386f1b2015-05-13 06:33:23 -0700244 Composition *composition =
245 ctx->drm.compositor()->CreateComposition(ctx->importer);
246 if (!composition) {
247 ALOGE("Drm composition init failed");
248 hwc_set_cleanup(num_displays, display_contents, NULL);
249 return -EINVAL;
Sean Paulef8f1f92015-04-29 16:05:23 -0400250 }
Sean Paule0c4c3d2015-01-20 16:56:04 -0500251
Sean Paulb386f1b2015-05-13 06:33:23 -0700252 int ret;
253 for (int i = 0; i < (int)num_displays; ++i) {
254 if (!display_contents[i])
255 continue;
256
257 DrmCrtc *crtc = ctx->drm.GetCrtcForDisplay(i);
258 if (!crtc) {
259 ALOGE("No crtc for display %d", i);
260 hwc_set_cleanup(num_displays, display_contents, composition);
261 return -ENODEV;
262 }
Sean Paulb386f1b2015-05-13 06:33:23 -0700263 bool use_target = false;
Zach Reizner45624d32015-06-10 16:03:01 -0700264 if (crtc->requires_modeset()) {
Sean Paulb386f1b2015-05-13 06:33:23 -0700265 use_target = true;
Sean Paulb386f1b2015-05-13 06:33:23 -0700266 }
267
Zach Reizner45624d32015-06-10 16:03:01 -0700268 hwc_display_contents_1_t *dc = display_contents[i];
269 int j;
270 unsigned num_layers = 0;
271 unsigned num_dc_layers = dc->numHwLayers;
272 for (j = 0; j < (int)num_dc_layers; ++j) {
Sean Paulb386f1b2015-05-13 06:33:23 -0700273 hwc_layer_1_t *layer = &dc->hwLayers[j];
Zach Reizner45624d32015-06-10 16:03:01 -0700274 if (layer->flags & HWC_SKIP_LAYER)
Sean Paulb386f1b2015-05-13 06:33:23 -0700275 continue;
Zach Reizner45624d32015-06-10 16:03:01 -0700276 if ((use_target && layer->compositionType == HWC_FRAMEBUFFER_TARGET) ||
277 layer->compositionType == HWC_OVERLAY) {
278 num_layers++;
279 }
280 }
281
282 unsigned num_planes = composition->GetRemainingLayers(i, num_layers);
283 bool use_pre_compositor = false;
284
285 if (!use_target && num_layers > num_planes) {
286 use_pre_compositor = true;
287 // Reserve one of the planes for the result of the pre compositor.
288 num_planes--;
289 }
290
291 for (j = 0; num_planes && j < (int)num_dc_layers; ++j) {
292 hwc_layer_1_t *layer = &dc->hwLayers[j];
293 if (layer->flags & HWC_SKIP_LAYER)
294 continue;
295 if (use_target) {
296 if (layer->compositionType != HWC_FRAMEBUFFER_TARGET)
297 continue;
298 } else {
299 if (layer->compositionType != HWC_OVERLAY)
300 continue;
301 }
Sean Paulb386f1b2015-05-13 06:33:23 -0700302
303 ret = hwc_add_layer(i, ctx, layer, composition);
304 if (ret) {
305 ALOGE("Add layer failed %d", ret);
306 hwc_set_cleanup(num_displays, display_contents, composition);
307 return ret;
308 }
309 --num_planes;
310 }
Zach Reizner45624d32015-06-10 16:03:01 -0700311
312 int last_comp_layer = j;
313
314 if (use_pre_compositor) {
315 hwc_drm_display_t *hd = &ctx->displays[i];
316 struct hwc_drm_display_framebuffer *fb = &hd->fb_chain[hd->fb_idx];
317 ret = fb->WaitReleased(-1);
318 if (ret) {
319 ALOGE("Failed to wait for framebuffer %d", ret);
320 hwc_set_cleanup(num_displays, display_contents, composition);
321 return ret;
322 }
323
324 DrmConnector *connector = ctx->drm.GetConnectorForDisplay(i);
325 if (!connector) {
326 ALOGE("No connector for display %d", i);
327 hwc_set_cleanup(num_displays, display_contents, composition);
328 return -ENODEV;
329 }
330
331 const DrmMode &mode = connector->active_mode();
332 if (!fb->Allocate(mode.h_display(), mode.v_display())) {
333 ALOGE("Failed to allocate framebuffer with size %dx%d",
334 mode.h_display(), mode.v_display());
335 hwc_set_cleanup(num_displays, display_contents, composition);
336 return -EINVAL;
337 }
338
339 sp<GraphicBuffer> fb_buffer = fb->buffer();
340 if (fb_buffer == NULL) {
341 ALOGE("Framebuffer is NULL");
342 hwc_set_cleanup(num_displays, display_contents, composition);
343 return -EINVAL;
344 }
345
346 Targeting *targeting = ctx->pre_compositor.targeting();
347 if (targeting == NULL) {
348 ALOGE("Pre-compositor does not support targeting");
349 hwc_set_cleanup(num_displays, display_contents, composition);
350 return -EINVAL;
351 }
352
353 int target = targeting->CreateTarget(fb_buffer);
354 targeting->SetTarget(target);
355
356 Composition *pre_composition = ctx->pre_compositor.CreateComposition(ctx->importer);
357 if (pre_composition == NULL) {
358 ALOGE("Failed to create pre-composition");
359 targeting->ForgetTarget(target);
360 hwc_set_cleanup(num_displays, display_contents, composition);
361 return -EINVAL;
362 }
363
364 for (j = last_comp_layer; j < (int)num_dc_layers; ++j) {
365 hwc_layer_1_t *layer = &dc->hwLayers[j];
366 if (layer->flags & HWC_SKIP_LAYER)
367 continue;
368 if (layer->compositionType != HWC_OVERLAY)
369 continue;
370 ret = hwc_add_layer(i, ctx, layer, pre_composition);
371 if (ret) {
372 ALOGE("Add layer failed %d", ret);
373 delete pre_composition;
374 targeting->ForgetTarget(target);
375 hwc_set_cleanup(num_displays, display_contents, composition);
376 return ret;
377 }
378 }
379
380 ret = ctx->pre_compositor.QueueComposition(pre_composition);
381 pre_composition = NULL;
382
383 targeting->ForgetTarget(target);
384 if (ret < 0 && ret != -EALREADY) {
385 ALOGE("Pre-composition failed %d", ret);
386 hwc_set_cleanup(num_displays, display_contents, composition);
387 return ret;
388 }
389
390 for (j = last_comp_layer; j < (int)num_dc_layers; ++j) {
391 hwc_layer_1_t *layer = &dc->hwLayers[j];
392 if (layer->flags & HWC_SKIP_LAYER)
393 continue;
394 if (layer->compositionType != HWC_OVERLAY)
395 continue;
396 layer->acquireFenceFd = -1;
397 }
398
399 hwc_layer_1_t composite_layer;
400 hwc_rect_t visible_rect;
401 memset(&composite_layer, 0, sizeof(composite_layer));
402 memset(&visible_rect, 0, sizeof(visible_rect));
403
404 composite_layer.compositionType = HWC_OVERLAY;
405 composite_layer.handle = fb_buffer->getNativeBuffer()->handle;
406 composite_layer.sourceCropf.right = composite_layer.displayFrame.right =
407 visible_rect.right = fb_buffer->getWidth();
408 composite_layer.sourceCropf.bottom = composite_layer.displayFrame.bottom =
409 visible_rect.bottom = fb_buffer->getHeight();
410 composite_layer.visibleRegionScreen.numRects = 1;
411 composite_layer.visibleRegionScreen.rects = &visible_rect;
412 composite_layer.acquireFenceFd = ret == -EALREADY ? -1 : ret;
413 // A known invalid fd in case AddLayer does not modify this field.
414 composite_layer.releaseFenceFd = -1;
415 composite_layer.planeAlpha = 0xff;
416
417 ret = hwc_add_layer(i, ctx, &composite_layer, composition);
418 if (ret) {
419 ALOGE("Add layer failed %d", ret);
420 hwc_set_cleanup(num_displays, display_contents, composition);
421 return ret;
422 }
423
424 fb->set_release_fence_fd(composite_layer.releaseFenceFd);
425 hd->fb_idx = (hd->fb_idx + 1) % HWC_FB_BUFFERS;
426 }
Sean Paulb386f1b2015-05-13 06:33:23 -0700427 }
428
429 ret = ctx->drm.compositor()->QueueComposition(composition);
430 if (ret) {
431 ALOGE("Failed to queue the composition");
432 hwc_set_cleanup(num_displays, display_contents, composition);
433 return ret;
434 }
435 hwc_set_cleanup(num_displays, display_contents, NULL);
Sean Paulef8f1f92015-04-29 16:05:23 -0400436 return ret;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500437}
438
Sean Paulef8f1f92015-04-29 16:05:23 -0400439static int hwc_event_control(struct hwc_composer_device_1 *dev, int display,
440 int event, int enabled) {
Sean Paulef8f1f92015-04-29 16:05:23 -0400441 if (event != HWC_EVENT_VSYNC || (enabled != 0 && enabled != 1))
442 return -EINVAL;
Sean Pauleb9e75c2015-01-25 23:31:30 -0500443
Sean Paul4057be32015-05-13 06:23:09 -0700444 struct hwc_context_t *ctx = (struct hwc_context_t *)&dev->common;
445 hwc_drm_display_t *hd = &ctx->displays[display];
446 return hd->vsync_worker.VSyncControl(enabled);
Sean Paule0c4c3d2015-01-20 16:56:04 -0500447}
448
Sean Paulef8f1f92015-04-29 16:05:23 -0400449static int hwc_set_power_mode(struct hwc_composer_device_1 *dev, int display,
450 int mode) {
451 struct hwc_context_t *ctx = (struct hwc_context_t *)&dev->common;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500452
Sean Paul6a55e9f2015-04-30 15:31:06 -0400453 uint64_t dpmsValue = 0;
Sean Paulef8f1f92015-04-29 16:05:23 -0400454 switch (mode) {
455 case HWC_POWER_MODE_OFF:
Sean Paul6a55e9f2015-04-30 15:31:06 -0400456 dpmsValue = DRM_MODE_DPMS_OFF;
Sean Paulef8f1f92015-04-29 16:05:23 -0400457 break;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500458
Sean Paulef8f1f92015-04-29 16:05:23 -0400459 /* We can't support dozing right now, so go full on */
460 case HWC_POWER_MODE_DOZE:
461 case HWC_POWER_MODE_DOZE_SUSPEND:
462 case HWC_POWER_MODE_NORMAL:
Sean Paul6a55e9f2015-04-30 15:31:06 -0400463 dpmsValue = DRM_MODE_DPMS_ON;
Sean Paulef8f1f92015-04-29 16:05:23 -0400464 break;
465 };
Sean Paul6a55e9f2015-04-30 15:31:06 -0400466 return ctx->drm.SetDpmsMode(display, dpmsValue);
Sean Paule0c4c3d2015-01-20 16:56:04 -0500467}
468
Sean Paulef8f1f92015-04-29 16:05:23 -0400469static int hwc_query(struct hwc_composer_device_1 * /* dev */, int what,
470 int *value) {
471 switch (what) {
472 case HWC_BACKGROUND_LAYER_SUPPORTED:
473 *value = 0; /* TODO: We should do this */
474 break;
475 case HWC_VSYNC_PERIOD:
476 ALOGW("Query for deprecated vsync value, returning 60Hz");
477 *value = 1000 * 1000 * 1000 / 60;
478 break;
479 case HWC_DISPLAY_TYPES_SUPPORTED:
480 *value = HWC_DISPLAY_PRIMARY | HWC_DISPLAY_EXTERNAL;
481 break;
482 }
483 return 0;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500484}
485
Sean Paulef8f1f92015-04-29 16:05:23 -0400486static void hwc_register_procs(struct hwc_composer_device_1 *dev,
487 hwc_procs_t const *procs) {
488 struct hwc_context_t *ctx = (struct hwc_context_t *)&dev->common;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500489
Sean Paulef8f1f92015-04-29 16:05:23 -0400490 ctx->procs = procs;
Sean Paul4057be32015-05-13 06:23:09 -0700491
492 for (hwc_context_t::DisplayMapIter iter = ctx->displays.begin();
493 iter != ctx->displays.end(); ++iter) {
494 iter->second.vsync_worker.SetProcs(procs);
495 }
Sean Paule0c4c3d2015-01-20 16:56:04 -0500496}
497
Sean Paulef8f1f92015-04-29 16:05:23 -0400498static int hwc_get_display_configs(struct hwc_composer_device_1 *dev,
499 int display, uint32_t *configs,
Sean Paul6a55e9f2015-04-30 15:31:06 -0400500 size_t *num_configs) {
501 if (!*num_configs)
Sean Paulef8f1f92015-04-29 16:05:23 -0400502 return 0;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500503
Sean Paulef8f1f92015-04-29 16:05:23 -0400504 struct hwc_context_t *ctx = (struct hwc_context_t *)&dev->common;
Sean Paule42febf2015-05-07 11:35:29 -0700505 hwc_drm_display_t *hd = &ctx->displays[display];
Sean Paul6a55e9f2015-04-30 15:31:06 -0400506 hd->config_ids.clear();
507
508 DrmConnector *connector = ctx->drm.GetConnectorForDisplay(display);
509 if (!connector) {
510 ALOGE("Failed to get connector for display %d", display);
Sean Paulef8f1f92015-04-29 16:05:23 -0400511 return -ENODEV;
512 }
Sean Paule0c4c3d2015-01-20 16:56:04 -0500513
Sean Paule42febf2015-05-07 11:35:29 -0700514 int ret = connector->UpdateModes();
Sean Paul6a55e9f2015-04-30 15:31:06 -0400515 if (ret) {
516 ALOGE("Failed to update display modes %d", ret);
Sean Paulef8f1f92015-04-29 16:05:23 -0400517 return ret;
Sean Paulef8f1f92015-04-29 16:05:23 -0400518 }
Sean Paule0c4c3d2015-01-20 16:56:04 -0500519
Sean Paul6a55e9f2015-04-30 15:31:06 -0400520 for (DrmConnector::ModeIter iter = connector->begin_modes();
521 iter != connector->end_modes(); ++iter) {
522 size_t idx = hd->config_ids.size();
523 if (idx == *num_configs)
524 break;
525 hd->config_ids.push_back(iter->id());
526 configs[idx] = iter->id();
527 }
528 *num_configs = hd->config_ids.size();
529 return *num_configs == 0 ? -1 : 0;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500530}
531
Sean Paulef8f1f92015-04-29 16:05:23 -0400532static int hwc_get_display_attributes(struct hwc_composer_device_1 *dev,
533 int display, uint32_t config,
534 const uint32_t *attributes,
535 int32_t *values) {
536 struct hwc_context_t *ctx = (struct hwc_context_t *)&dev->common;
Sean Paul6a55e9f2015-04-30 15:31:06 -0400537 DrmConnector *c = ctx->drm.GetConnectorForDisplay(display);
Sean Paulef8f1f92015-04-29 16:05:23 -0400538 if (!c) {
Sean Paul6a55e9f2015-04-30 15:31:06 -0400539 ALOGE("Failed to get DrmConnector for display %d", display);
Sean Paulef8f1f92015-04-29 16:05:23 -0400540 return -ENODEV;
541 }
Sean Paul6a55e9f2015-04-30 15:31:06 -0400542 DrmMode mode;
543 for (DrmConnector::ModeIter iter = c->begin_modes(); iter != c->end_modes();
544 ++iter) {
545 if (iter->id() == config) {
546 mode = *iter;
547 break;
548 }
549 }
550 if (mode.id() == 0) {
551 ALOGE("Failed to find active mode for display %d", display);
552 return -ENOENT;
Sean Paulef8f1f92015-04-29 16:05:23 -0400553 }
Sean Paule0c4c3d2015-01-20 16:56:04 -0500554
Sean Paul6a55e9f2015-04-30 15:31:06 -0400555 uint32_t mm_width = c->mm_width();
556 uint32_t mm_height = c->mm_height();
Sean Paulef8f1f92015-04-29 16:05:23 -0400557 for (int i = 0; attributes[i] != HWC_DISPLAY_NO_ATTRIBUTE; ++i) {
558 switch (attributes[i]) {
559 case HWC_DISPLAY_VSYNC_PERIOD:
Sean Paul6a55e9f2015-04-30 15:31:06 -0400560 values[i] = 1000 * 1000 * 1000 / mode.v_refresh();
Sean Paulef8f1f92015-04-29 16:05:23 -0400561 break;
562 case HWC_DISPLAY_WIDTH:
Sean Paul6a55e9f2015-04-30 15:31:06 -0400563 values[i] = mode.h_display();
Sean Paulef8f1f92015-04-29 16:05:23 -0400564 break;
565 case HWC_DISPLAY_HEIGHT:
Sean Paul6a55e9f2015-04-30 15:31:06 -0400566 values[i] = mode.v_display();
Sean Paulef8f1f92015-04-29 16:05:23 -0400567 break;
568 case HWC_DISPLAY_DPI_X:
569 /* Dots per 1000 inches */
Sean Paul6a55e9f2015-04-30 15:31:06 -0400570 values[i] = mm_width ? (mode.h_display() * UM_PER_INCH) / mm_width : 0;
Sean Paulef8f1f92015-04-29 16:05:23 -0400571 break;
572 case HWC_DISPLAY_DPI_Y:
573 /* Dots per 1000 inches */
Sean Paul6a55e9f2015-04-30 15:31:06 -0400574 values[i] =
575 mm_height ? (mode.v_display() * UM_PER_INCH) / mm_height : 0;
Sean Paulef8f1f92015-04-29 16:05:23 -0400576 break;
577 }
578 }
Sean Paulef8f1f92015-04-29 16:05:23 -0400579 return 0;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500580}
581
Sean Paulef8f1f92015-04-29 16:05:23 -0400582static int hwc_get_active_config(struct hwc_composer_device_1 *dev,
583 int display) {
584 struct hwc_context_t *ctx = (struct hwc_context_t *)&dev->common;
Sean Paul6a55e9f2015-04-30 15:31:06 -0400585 DrmConnector *c = ctx->drm.GetConnectorForDisplay(display);
586 if (!c) {
587 ALOGE("Failed to get DrmConnector for display %d", display);
Sean Paulef8f1f92015-04-29 16:05:23 -0400588 return -ENODEV;
589 }
Sean Paule0c4c3d2015-01-20 16:56:04 -0500590
Sean Paul6a55e9f2015-04-30 15:31:06 -0400591 DrmMode mode = c->active_mode();
Sean Paule42febf2015-05-07 11:35:29 -0700592 hwc_drm_display_t *hd = &ctx->displays[display];
Sean Paul6a55e9f2015-04-30 15:31:06 -0400593 for (size_t i = 0; i < hd->config_ids.size(); ++i) {
594 if (hd->config_ids[i] == mode.id())
595 return i;
Sean Paulef8f1f92015-04-29 16:05:23 -0400596 }
Sean Paul6a55e9f2015-04-30 15:31:06 -0400597 return -1;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500598}
599
Sean Paulef8f1f92015-04-29 16:05:23 -0400600static int hwc_set_active_config(struct hwc_composer_device_1 *dev, int display,
601 int index) {
602 struct hwc_context_t *ctx = (struct hwc_context_t *)&dev->common;
Sean Paule42febf2015-05-07 11:35:29 -0700603 hwc_drm_display_t *hd = &ctx->displays[display];
Sean Paul6a55e9f2015-04-30 15:31:06 -0400604 if (index >= (int)hd->config_ids.size()) {
605 ALOGE("Invalid config index %d passed in", index);
606 return -EINVAL;
Sean Paulef8f1f92015-04-29 16:05:23 -0400607 }
Sean Paule0c4c3d2015-01-20 16:56:04 -0500608
Zach Reizner45624d32015-06-10 16:03:01 -0700609 int ret = ctx->drm.SetDisplayActiveMode(display, hd->config_ids[index]);
Sean Paul6a55e9f2015-04-30 15:31:06 -0400610 if (ret) {
611 ALOGE("Failed to set config for display %d", display);
612 return ret;
Sean Paulef8f1f92015-04-29 16:05:23 -0400613 }
Sean Paule0c4c3d2015-01-20 16:56:04 -0500614
Sean Paul6a55e9f2015-04-30 15:31:06 -0400615 return ret;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500616}
617
Sean Paulef8f1f92015-04-29 16:05:23 -0400618static int hwc_device_close(struct hw_device_t *dev) {
619 struct hwc_context_t *ctx = (struct hwc_context_t *)dev;
Sean Paulef8f1f92015-04-29 16:05:23 -0400620 delete ctx;
Sean Paulef8f1f92015-04-29 16:05:23 -0400621 return 0;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500622}
623
Sean Paul24a26e32015-02-04 10:34:47 -0800624/*
625 * TODO: This function sets the active config to the first one in the list. This
626 * should be fixed such that it selects the preferred mode for the display, or
627 * some other, saner, method of choosing the config.
628 */
Sean Paule42febf2015-05-07 11:35:29 -0700629static int hwc_set_initial_config(hwc_drm_display_t *hd) {
Sean Paulef8f1f92015-04-29 16:05:23 -0400630 uint32_t config;
631 size_t num_configs = 1;
632 int ret = hwc_get_display_configs(&hd->ctx->device, hd->display, &config,
633 &num_configs);
634 if (ret || !num_configs)
635 return 0;
Sean Paul24a26e32015-02-04 10:34:47 -0800636
Sean Paulef8f1f92015-04-29 16:05:23 -0400637 ret = hwc_set_active_config(&hd->ctx->device, hd->display, 0);
638 if (ret) {
639 ALOGE("Failed to set active config d=%d ret=%d", hd->display, ret);
640 return ret;
641 }
Sean Paul24a26e32015-02-04 10:34:47 -0800642
Sean Paulef8f1f92015-04-29 16:05:23 -0400643 return ret;
Sean Paul24a26e32015-02-04 10:34:47 -0800644}
645
Sean Paul6a55e9f2015-04-30 15:31:06 -0400646static int hwc_initialize_display(struct hwc_context_t *ctx, int display) {
Sean Paule42febf2015-05-07 11:35:29 -0700647 hwc_drm_display_t *hd = &ctx->displays[display];
Sean Paulef8f1f92015-04-29 16:05:23 -0400648 hd->ctx = ctx;
649 hd->display = display;
Zach Reizner45624d32015-06-10 16:03:01 -0700650 hd->fb_idx = 0;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500651
Sean Paulb386f1b2015-05-13 06:33:23 -0700652 int ret = hwc_set_initial_config(hd);
Sean Paulef8f1f92015-04-29 16:05:23 -0400653 if (ret) {
654 ALOGE("Failed to set initial config for d=%d ret=%d", display, ret);
Sean Paulef8f1f92015-04-29 16:05:23 -0400655 return ret;
656 }
Sean Paul24a26e32015-02-04 10:34:47 -0800657
Sean Paul4057be32015-05-13 06:23:09 -0700658 ret = hd->vsync_worker.Init(&ctx->drm, display);
659 if (ret) {
660 ALOGE("Failed to create event worker for display %d %d\n", display, ret);
661 return ret;
662 }
663
Sean Paulef8f1f92015-04-29 16:05:23 -0400664 return 0;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500665}
666
Sean Paulef8f1f92015-04-29 16:05:23 -0400667static int hwc_enumerate_displays(struct hwc_context_t *ctx) {
Sean Paul6a55e9f2015-04-30 15:31:06 -0400668 int ret;
669 for (DrmResources::ConnectorIter c = ctx->drm.begin_connectors();
670 c != ctx->drm.end_connectors(); ++c) {
671 ret = hwc_initialize_display(ctx, (*c)->display());
672 if (ret) {
673 ALOGE("Failed to initialize display %d", (*c)->display());
674 return ret;
Sean Paulef8f1f92015-04-29 16:05:23 -0400675 }
676 }
Sean Paulef8f1f92015-04-29 16:05:23 -0400677
678 return 0;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500679}
680
Sean Paulef8f1f92015-04-29 16:05:23 -0400681static int hwc_device_open(const struct hw_module_t *module, const char *name,
682 struct hw_device_t **dev) {
683 if (strcmp(name, HWC_HARDWARE_COMPOSER)) {
684 ALOGE("Invalid module name- %s", name);
685 return -EINVAL;
686 }
687
688 struct hwc_context_t *ctx = new hwc_context_t();
689 if (!ctx) {
690 ALOGE("Failed to allocate hwc context");
691 return -ENOMEM;
692 }
693
Sean Paul6a55e9f2015-04-30 15:31:06 -0400694 int ret = ctx->drm.Init();
695 if (ret) {
696 ALOGE("Can't initialize Drm object %d", ret);
697 delete ctx;
698 return ret;
699 }
700
Zach Reizner45624d32015-06-10 16:03:01 -0700701 ret = ctx->pre_compositor.Init();
702 if (ret) {
703 ALOGE("Can't initialize OpenGL Compositor object %d", ret);
704 delete ctx;
705 return ret;
706 }
707
Sean Paulda6270d2015-06-01 14:11:52 -0400708 ctx->importer = Importer::CreateInstance(&ctx->drm);
709 if (!ctx->importer) {
710 ALOGE("Failed to create importer instance");
Sean Paulef8f1f92015-04-29 16:05:23 -0400711 delete ctx;
712 return ret;
713 }
714
Sean Paulef8f1f92015-04-29 16:05:23 -0400715 ret = hwc_enumerate_displays(ctx);
716 if (ret) {
717 ALOGE("Failed to enumerate displays: %s", strerror(ret));
Sean Paul6a55e9f2015-04-30 15:31:06 -0400718 delete ctx;
719 return ret;
720 }
721
Sean Paulef8f1f92015-04-29 16:05:23 -0400722 ctx->device.common.tag = HARDWARE_DEVICE_TAG;
723 ctx->device.common.version = HWC_DEVICE_API_VERSION_1_4;
724 ctx->device.common.module = const_cast<hw_module_t *>(module);
725 ctx->device.common.close = hwc_device_close;
726
Sean Paul9046c642015-06-10 17:27:47 -0400727 ctx->device.dump = hwc_dump;
Sean Paulef8f1f92015-04-29 16:05:23 -0400728 ctx->device.prepare = hwc_prepare;
729 ctx->device.set = hwc_set;
730 ctx->device.eventControl = hwc_event_control;
731 ctx->device.setPowerMode = hwc_set_power_mode;
732 ctx->device.query = hwc_query;
733 ctx->device.registerProcs = hwc_register_procs;
734 ctx->device.getDisplayConfigs = hwc_get_display_configs;
735 ctx->device.getDisplayAttributes = hwc_get_display_attributes;
736 ctx->device.getActiveConfig = hwc_get_active_config;
737 ctx->device.setActiveConfig = hwc_set_active_config;
738 ctx->device.setCursorPositionAsync = NULL; /* TODO: Add cursor */
739
740 *dev = &ctx->device.common;
741
742 return 0;
743}
Sean Paul6a55e9f2015-04-30 15:31:06 -0400744}
Sean Paulef8f1f92015-04-29 16:05:23 -0400745
Sean Paul6a55e9f2015-04-30 15:31:06 -0400746static struct hw_module_methods_t hwc_module_methods = {
747 open : android::hwc_device_open
748};
Sean Paule0c4c3d2015-01-20 16:56:04 -0500749
750hwc_module_t HAL_MODULE_INFO_SYM = {
Sean Paulef8f1f92015-04-29 16:05:23 -0400751 common : {
752 tag : HARDWARE_MODULE_TAG,
753 version_major : 1,
754 version_minor : 0,
755 id : HWC_HARDWARE_MODULE_ID,
756 name : "DRM hwcomposer module",
757 author : "The Android Open Source Project",
758 methods : &hwc_module_methods,
759 dso : NULL,
760 reserved : {0},
761 }
Sean Paule0c4c3d2015-01-20 16:56:04 -0500762};