Sean Paul | e0c4c3d | 2015-01-20 16:56:04 -0500 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2015 The Android Open Source Project |
| 3 | * |
| 4 | * Licensed under the Apache License, Version 2.0 (the "License"); |
| 5 | * you may not use this file except in compliance with the License. |
| 6 | * You may obtain a copy of the License at |
| 7 | * |
| 8 | * http://www.apache.org/licenses/LICENSE-2.0 |
| 9 | * |
| 10 | * Unless required by applicable law or agreed to in writing, software |
| 11 | * distributed under the License is distributed on an "AS IS" BASIS, |
| 12 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
| 13 | * See the License for the specific language governing permissions and |
| 14 | * limitations under the License. |
| 15 | */ |
| 16 | |
| 17 | #define LOG_TAG "hwcomposer-drm" |
| 18 | |
Sean Paul | ef8f1f9 | 2015-04-29 16:05:23 -0400 | [diff] [blame] | 19 | #include "drm_hwcomposer.h" |
Sean Paul | 6a55e9f | 2015-04-30 15:31:06 -0400 | [diff] [blame] | 20 | #include "drmresources.h" |
Sean Paul | da6270d | 2015-06-01 14:11:52 -0400 | [diff] [blame] | 21 | #include "importer.h" |
Sean Paul | 4057be3 | 2015-05-13 06:23:09 -0700 | [diff] [blame] | 22 | #include "vsyncworker.h" |
Sean Paul | ef8f1f9 | 2015-04-29 16:05:23 -0400 | [diff] [blame] | 23 | |
Sean Paul | e0c4c3d | 2015-01-20 16:56:04 -0500 | [diff] [blame] | 24 | #include <errno.h> |
Sean Paul | ef8f1f9 | 2015-04-29 16:05:23 -0400 | [diff] [blame] | 25 | #include <fcntl.h> |
Sean Paul | 5ad302c | 2015-05-11 10:43:31 -0700 | [diff] [blame] | 26 | #include <list> |
Sean Paul | e42febf | 2015-05-07 11:35:29 -0700 | [diff] [blame] | 27 | #include <map> |
Sean Paul | ef8f1f9 | 2015-04-29 16:05:23 -0400 | [diff] [blame] | 28 | #include <pthread.h> |
Dan Albert | c5255b3 | 2015-05-07 23:42:54 -0700 | [diff] [blame] | 29 | #include <stdlib.h> |
Sean Paul | e0c4c3d | 2015-01-20 16:56:04 -0500 | [diff] [blame] | 30 | #include <sys/param.h> |
Sean Paul | 9aa5ad3 | 2015-01-22 15:47:54 -0500 | [diff] [blame] | 31 | #include <sys/resource.h> |
Sean Paul | e0c4c3d | 2015-01-20 16:56:04 -0500 | [diff] [blame] | 32 | #include <xf86drm.h> |
| 33 | #include <xf86drmMode.h> |
Sean Paul | e0c4c3d | 2015-01-20 16:56:04 -0500 | [diff] [blame] | 34 | |
Sean Paul | ef8f1f9 | 2015-04-29 16:05:23 -0400 | [diff] [blame] | 35 | #include <cutils/log.h> |
| 36 | #include <cutils/properties.h> |
Sean Paul | e0c4c3d | 2015-01-20 16:56:04 -0500 | [diff] [blame] | 37 | #include <hardware/hardware.h> |
| 38 | #include <hardware/hwcomposer.h> |
Sean Paul | f1dc191 | 2015-01-24 01:34:31 -0500 | [diff] [blame] | 39 | #include <sw_sync.h> |
Sean Paul | ef8f1f9 | 2015-04-29 16:05:23 -0400 | [diff] [blame] | 40 | #include <sync/sync.h> |
Sean Paul | e0c4c3d | 2015-01-20 16:56:04 -0500 | [diff] [blame] | 41 | |
Sean Paul | e0c4c3d | 2015-01-20 16:56:04 -0500 | [diff] [blame] | 42 | #define UM_PER_INCH 25400 |
| 43 | |
Sean Paul | 6a55e9f | 2015-04-30 15:31:06 -0400 | [diff] [blame] | 44 | namespace android { |
Sean Paul | e0c4c3d | 2015-01-20 16:56:04 -0500 | [diff] [blame] | 45 | |
Sean Paul | e42febf | 2015-05-07 11:35:29 -0700 | [diff] [blame] | 46 | typedef struct hwc_drm_display { |
Sean Paul | ef8f1f9 | 2015-04-29 16:05:23 -0400 | [diff] [blame] | 47 | struct hwc_context_t *ctx; |
| 48 | int display; |
Sean Paul | 9aa5ad3 | 2015-01-22 15:47:54 -0500 | [diff] [blame] | 49 | |
Sean Paul | 6a55e9f | 2015-04-30 15:31:06 -0400 | [diff] [blame] | 50 | std::vector<uint32_t> config_ids; |
Sean Paul | 9aa5ad3 | 2015-01-22 15:47:54 -0500 | [diff] [blame] | 51 | |
Sean Paul | 4057be3 | 2015-05-13 06:23:09 -0700 | [diff] [blame] | 52 | VSyncWorker vsync_worker; |
Sean Paul | e42febf | 2015-05-07 11:35:29 -0700 | [diff] [blame] | 53 | } hwc_drm_display_t; |
Sean Paul | e0c4c3d | 2015-01-20 16:56:04 -0500 | [diff] [blame] | 54 | |
| 55 | struct hwc_context_t { |
Sean Paul | e42febf | 2015-05-07 11:35:29 -0700 | [diff] [blame] | 56 | // map of display:hwc_drm_display_t |
| 57 | typedef std::map<int, hwc_drm_display_t> DisplayMap; |
| 58 | typedef DisplayMap::iterator DisplayMapIter; |
Sean Paul | e0c4c3d | 2015-01-20 16:56:04 -0500 | [diff] [blame] | 59 | |
Sean Paul | da6270d | 2015-06-01 14:11:52 -0400 | [diff] [blame] | 60 | hwc_context_t() : procs(NULL), importer(NULL) { |
| 61 | } |
| 62 | |
| 63 | ~hwc_context_t() { |
| 64 | delete importer; |
| 65 | } |
| 66 | |
Sean Paul | e42febf | 2015-05-07 11:35:29 -0700 | [diff] [blame] | 67 | hwc_composer_device_1_t device; |
Sean Paul | ef8f1f9 | 2015-04-29 16:05:23 -0400 | [diff] [blame] | 68 | hwc_procs_t const *procs; |
Sean Paul | e0c4c3d | 2015-01-20 16:56:04 -0500 | [diff] [blame] | 69 | |
Sean Paul | e42febf | 2015-05-07 11:35:29 -0700 | [diff] [blame] | 70 | DisplayMap displays; |
Sean Paul | 6a55e9f | 2015-04-30 15:31:06 -0400 | [diff] [blame] | 71 | DrmResources drm; |
Sean Paul | da6270d | 2015-06-01 14:11:52 -0400 | [diff] [blame] | 72 | Importer *importer; |
Sean Paul | e0c4c3d | 2015-01-20 16:56:04 -0500 | [diff] [blame] | 73 | }; |
| 74 | |
Sean Paul | b386f1b | 2015-05-13 06:33:23 -0700 | [diff] [blame] | 75 | static int hwc_prepare(hwc_composer_device_1_t *dev, size_t num_displays, |
Sean Paul | ef8f1f9 | 2015-04-29 16:05:23 -0400 | [diff] [blame] | 76 | hwc_display_contents_1_t **display_contents) { |
Sean Paul | b386f1b | 2015-05-13 06:33:23 -0700 | [diff] [blame] | 77 | // XXX: Once we have a GL compositor, just make everything HWC_OVERLAY |
| 78 | struct hwc_context_t *ctx = (struct hwc_context_t *)&dev->common; |
| 79 | Composition *composition = |
| 80 | ctx->drm.compositor()->CreateComposition(ctx->importer); |
| 81 | if (!composition) { |
| 82 | ALOGE("Drm composition init failed"); |
| 83 | return -EINVAL; |
| 84 | } |
Sean Paul | e0c4c3d | 2015-01-20 16:56:04 -0500 | [diff] [blame] | 85 | |
Sean Paul | e42febf | 2015-05-07 11:35:29 -0700 | [diff] [blame] | 86 | for (int i = 0; i < (int)num_displays; ++i) { |
Sean Paul | ef8f1f9 | 2015-04-29 16:05:23 -0400 | [diff] [blame] | 87 | if (!display_contents[i]) |
| 88 | continue; |
Sean Paul | e0c4c3d | 2015-01-20 16:56:04 -0500 | [diff] [blame] | 89 | |
Sean Paul | b386f1b | 2015-05-13 06:33:23 -0700 | [diff] [blame] | 90 | int num_layers = display_contents[i]->numHwLayers; |
| 91 | int num_planes = composition->GetRemainingLayers(i, num_layers); |
| 92 | |
| 93 | // XXX: Should go away with atomic modeset |
| 94 | DrmCrtc *crtc = ctx->drm.GetCrtcForDisplay(i); |
| 95 | if (!crtc) { |
| 96 | ALOGE("No crtc for display %d", i); |
| 97 | delete composition; |
| 98 | return -ENODEV; |
| 99 | } |
| 100 | if (crtc->requires_modeset()) |
| 101 | num_planes = 0; |
| 102 | |
| 103 | for (int j = std::max(0, num_layers - num_planes); j < num_layers; j++) { |
| 104 | if (j >= num_planes) |
| 105 | break; |
| 106 | |
| 107 | hwc_layer_1_t *layer = &display_contents[i]->hwLayers[j]; |
| 108 | if (layer->compositionType == HWC_FRAMEBUFFER) |
| 109 | layer->compositionType = HWC_OVERLAY; |
Sean Paul | ef8f1f9 | 2015-04-29 16:05:23 -0400 | [diff] [blame] | 110 | } |
| 111 | } |
Sean Paul | dffca95 | 2015-02-04 10:19:55 -0800 | [diff] [blame] | 112 | |
Sean Paul | b386f1b | 2015-05-13 06:33:23 -0700 | [diff] [blame] | 113 | delete composition; |
Sean Paul | ef8f1f9 | 2015-04-29 16:05:23 -0400 | [diff] [blame] | 114 | return 0; |
Sean Paul | e0c4c3d | 2015-01-20 16:56:04 -0500 | [diff] [blame] | 115 | } |
| 116 | |
Sean Paul | b386f1b | 2015-05-13 06:33:23 -0700 | [diff] [blame] | 117 | static void hwc_set_cleanup(size_t num_displays, |
| 118 | hwc_display_contents_1_t **display_contents, |
| 119 | Composition *composition) { |
| 120 | for (int i = 0; i < (int)num_displays; ++i) { |
| 121 | if (!display_contents[i]) |
| 122 | continue; |
| 123 | |
| 124 | hwc_display_contents_1_t *dc = display_contents[i]; |
| 125 | for (size_t j = 0; j < dc->numHwLayers; ++j) { |
| 126 | hwc_layer_1_t *layer = &dc->hwLayers[j]; |
| 127 | if (layer->acquireFenceFd >= 0) { |
| 128 | close(layer->acquireFenceFd); |
| 129 | layer->acquireFenceFd = -1; |
| 130 | } |
| 131 | } |
| 132 | if (dc->outbufAcquireFenceFd >= 0) { |
| 133 | close(dc->outbufAcquireFenceFd); |
| 134 | dc->outbufAcquireFenceFd = -1; |
| 135 | } |
| 136 | } |
| 137 | |
| 138 | delete composition; |
| 139 | } |
| 140 | |
Sean Paul | b386f1b | 2015-05-13 06:33:23 -0700 | [diff] [blame] | 141 | static int hwc_add_layer(int display, hwc_context_t *ctx, hwc_layer_1_t *layer, |
| 142 | Composition *composition) { |
| 143 | hwc_drm_bo_t bo; |
| 144 | int ret = ctx->importer->ImportBuffer(layer->handle, &bo); |
| 145 | if (ret) { |
| 146 | ALOGE("Failed to import handle to bo %d", ret); |
| 147 | return ret; |
Sean Paul | ef8f1f9 | 2015-04-29 16:05:23 -0400 | [diff] [blame] | 148 | } |
Sean Paul | efb20cb | 2015-02-04 09:29:15 -0800 | [diff] [blame] | 149 | |
Sean Paul | b386f1b | 2015-05-13 06:33:23 -0700 | [diff] [blame] | 150 | ret = composition->AddLayer(display, layer, &bo); |
| 151 | if (!ret) |
Sean Paul | ef8f1f9 | 2015-04-29 16:05:23 -0400 | [diff] [blame] | 152 | return 0; |
Sean Paul | 9aa5ad3 | 2015-01-22 15:47:54 -0500 | [diff] [blame] | 153 | |
Sean Paul | b386f1b | 2015-05-13 06:33:23 -0700 | [diff] [blame] | 154 | int destroy_ret = ctx->importer->ReleaseBuffer(&bo); |
| 155 | if (destroy_ret) |
| 156 | ALOGE("Failed to destroy buffer %d", destroy_ret); |
Sean Paul | 9aa5ad3 | 2015-01-22 15:47:54 -0500 | [diff] [blame] | 157 | |
Sean Paul | ef8f1f9 | 2015-04-29 16:05:23 -0400 | [diff] [blame] | 158 | return ret; |
Sean Paul | e0c4c3d | 2015-01-20 16:56:04 -0500 | [diff] [blame] | 159 | } |
| 160 | |
| 161 | static int hwc_set(hwc_composer_device_1_t *dev, size_t num_displays, |
Sean Paul | ef8f1f9 | 2015-04-29 16:05:23 -0400 | [diff] [blame] | 162 | hwc_display_contents_1_t **display_contents) { |
| 163 | struct hwc_context_t *ctx = (struct hwc_context_t *)&dev->common; |
Sean Paul | b386f1b | 2015-05-13 06:33:23 -0700 | [diff] [blame] | 164 | Composition *composition = |
| 165 | ctx->drm.compositor()->CreateComposition(ctx->importer); |
| 166 | if (!composition) { |
| 167 | ALOGE("Drm composition init failed"); |
| 168 | hwc_set_cleanup(num_displays, display_contents, NULL); |
| 169 | return -EINVAL; |
Sean Paul | ef8f1f9 | 2015-04-29 16:05:23 -0400 | [diff] [blame] | 170 | } |
Sean Paul | e0c4c3d | 2015-01-20 16:56:04 -0500 | [diff] [blame] | 171 | |
Sean Paul | b386f1b | 2015-05-13 06:33:23 -0700 | [diff] [blame] | 172 | int ret; |
| 173 | for (int i = 0; i < (int)num_displays; ++i) { |
| 174 | if (!display_contents[i]) |
| 175 | continue; |
| 176 | |
| 177 | DrmCrtc *crtc = ctx->drm.GetCrtcForDisplay(i); |
| 178 | if (!crtc) { |
| 179 | ALOGE("No crtc for display %d", i); |
| 180 | hwc_set_cleanup(num_displays, display_contents, composition); |
| 181 | return -ENODEV; |
| 182 | } |
| 183 | |
| 184 | hwc_display_contents_1_t *dc = display_contents[i]; |
| 185 | unsigned num_layers = dc->numHwLayers; |
| 186 | unsigned num_planes = composition->GetRemainingLayers(i, num_layers); |
| 187 | bool use_target = false; |
| 188 | // XXX: We don't need to check for modeset required with atomic modeset |
| 189 | if (crtc->requires_modeset() || num_layers > num_planes) |
| 190 | use_target = true; |
| 191 | |
| 192 | // XXX: Won't need to worry about FB_TARGET with GL Compositor |
| 193 | for (int j = 0; use_target && j < (int)num_layers; ++j) { |
| 194 | hwc_layer_1_t *layer = &dc->hwLayers[j]; |
| 195 | if (layer->compositionType != HWC_FRAMEBUFFER_TARGET) |
| 196 | continue; |
| 197 | |
| 198 | ret = hwc_add_layer(i, ctx, layer, composition); |
| 199 | if (ret) { |
| 200 | ALOGE("Add layer failed %d", ret); |
| 201 | hwc_set_cleanup(num_displays, display_contents, composition); |
| 202 | return ret; |
| 203 | } |
| 204 | --num_planes; |
| 205 | break; |
| 206 | } |
| 207 | |
| 208 | for (int j = 0; num_planes && j < (int)num_layers; ++j) { |
| 209 | hwc_layer_1_t *layer = &dc->hwLayers[j]; |
| 210 | if (layer->compositionType != HWC_OVERLAY) |
| 211 | continue; |
| 212 | |
| 213 | ret = hwc_add_layer(i, ctx, layer, composition); |
| 214 | if (ret) { |
| 215 | ALOGE("Add layer failed %d", ret); |
| 216 | hwc_set_cleanup(num_displays, display_contents, composition); |
| 217 | return ret; |
| 218 | } |
| 219 | --num_planes; |
| 220 | } |
| 221 | } |
| 222 | |
| 223 | ret = ctx->drm.compositor()->QueueComposition(composition); |
| 224 | if (ret) { |
| 225 | ALOGE("Failed to queue the composition"); |
| 226 | hwc_set_cleanup(num_displays, display_contents, composition); |
| 227 | return ret; |
| 228 | } |
| 229 | hwc_set_cleanup(num_displays, display_contents, NULL); |
Sean Paul | ef8f1f9 | 2015-04-29 16:05:23 -0400 | [diff] [blame] | 230 | return ret; |
Sean Paul | e0c4c3d | 2015-01-20 16:56:04 -0500 | [diff] [blame] | 231 | } |
| 232 | |
Sean Paul | ef8f1f9 | 2015-04-29 16:05:23 -0400 | [diff] [blame] | 233 | static int hwc_event_control(struct hwc_composer_device_1 *dev, int display, |
| 234 | int event, int enabled) { |
Sean Paul | ef8f1f9 | 2015-04-29 16:05:23 -0400 | [diff] [blame] | 235 | if (event != HWC_EVENT_VSYNC || (enabled != 0 && enabled != 1)) |
| 236 | return -EINVAL; |
Sean Paul | eb9e75c | 2015-01-25 23:31:30 -0500 | [diff] [blame] | 237 | |
Sean Paul | 4057be3 | 2015-05-13 06:23:09 -0700 | [diff] [blame] | 238 | struct hwc_context_t *ctx = (struct hwc_context_t *)&dev->common; |
| 239 | hwc_drm_display_t *hd = &ctx->displays[display]; |
| 240 | return hd->vsync_worker.VSyncControl(enabled); |
Sean Paul | e0c4c3d | 2015-01-20 16:56:04 -0500 | [diff] [blame] | 241 | } |
| 242 | |
Sean Paul | ef8f1f9 | 2015-04-29 16:05:23 -0400 | [diff] [blame] | 243 | static int hwc_set_power_mode(struct hwc_composer_device_1 *dev, int display, |
| 244 | int mode) { |
| 245 | struct hwc_context_t *ctx = (struct hwc_context_t *)&dev->common; |
Sean Paul | e0c4c3d | 2015-01-20 16:56:04 -0500 | [diff] [blame] | 246 | |
Sean Paul | 6a55e9f | 2015-04-30 15:31:06 -0400 | [diff] [blame] | 247 | uint64_t dpmsValue = 0; |
Sean Paul | ef8f1f9 | 2015-04-29 16:05:23 -0400 | [diff] [blame] | 248 | switch (mode) { |
| 249 | case HWC_POWER_MODE_OFF: |
Sean Paul | 6a55e9f | 2015-04-30 15:31:06 -0400 | [diff] [blame] | 250 | dpmsValue = DRM_MODE_DPMS_OFF; |
Sean Paul | ef8f1f9 | 2015-04-29 16:05:23 -0400 | [diff] [blame] | 251 | break; |
Sean Paul | e0c4c3d | 2015-01-20 16:56:04 -0500 | [diff] [blame] | 252 | |
Sean Paul | ef8f1f9 | 2015-04-29 16:05:23 -0400 | [diff] [blame] | 253 | /* We can't support dozing right now, so go full on */ |
| 254 | case HWC_POWER_MODE_DOZE: |
| 255 | case HWC_POWER_MODE_DOZE_SUSPEND: |
| 256 | case HWC_POWER_MODE_NORMAL: |
Sean Paul | 6a55e9f | 2015-04-30 15:31:06 -0400 | [diff] [blame] | 257 | dpmsValue = DRM_MODE_DPMS_ON; |
Sean Paul | ef8f1f9 | 2015-04-29 16:05:23 -0400 | [diff] [blame] | 258 | break; |
| 259 | }; |
Sean Paul | 6a55e9f | 2015-04-30 15:31:06 -0400 | [diff] [blame] | 260 | return ctx->drm.SetDpmsMode(display, dpmsValue); |
Sean Paul | e0c4c3d | 2015-01-20 16:56:04 -0500 | [diff] [blame] | 261 | } |
| 262 | |
Sean Paul | ef8f1f9 | 2015-04-29 16:05:23 -0400 | [diff] [blame] | 263 | static int hwc_query(struct hwc_composer_device_1 * /* dev */, int what, |
| 264 | int *value) { |
| 265 | switch (what) { |
| 266 | case HWC_BACKGROUND_LAYER_SUPPORTED: |
| 267 | *value = 0; /* TODO: We should do this */ |
| 268 | break; |
| 269 | case HWC_VSYNC_PERIOD: |
| 270 | ALOGW("Query for deprecated vsync value, returning 60Hz"); |
| 271 | *value = 1000 * 1000 * 1000 / 60; |
| 272 | break; |
| 273 | case HWC_DISPLAY_TYPES_SUPPORTED: |
| 274 | *value = HWC_DISPLAY_PRIMARY | HWC_DISPLAY_EXTERNAL; |
| 275 | break; |
| 276 | } |
| 277 | return 0; |
Sean Paul | e0c4c3d | 2015-01-20 16:56:04 -0500 | [diff] [blame] | 278 | } |
| 279 | |
Sean Paul | ef8f1f9 | 2015-04-29 16:05:23 -0400 | [diff] [blame] | 280 | static void hwc_register_procs(struct hwc_composer_device_1 *dev, |
| 281 | hwc_procs_t const *procs) { |
| 282 | struct hwc_context_t *ctx = (struct hwc_context_t *)&dev->common; |
Sean Paul | e0c4c3d | 2015-01-20 16:56:04 -0500 | [diff] [blame] | 283 | |
Sean Paul | ef8f1f9 | 2015-04-29 16:05:23 -0400 | [diff] [blame] | 284 | ctx->procs = procs; |
Sean Paul | 4057be3 | 2015-05-13 06:23:09 -0700 | [diff] [blame] | 285 | |
| 286 | for (hwc_context_t::DisplayMapIter iter = ctx->displays.begin(); |
| 287 | iter != ctx->displays.end(); ++iter) { |
| 288 | iter->second.vsync_worker.SetProcs(procs); |
| 289 | } |
Sean Paul | e0c4c3d | 2015-01-20 16:56:04 -0500 | [diff] [blame] | 290 | } |
| 291 | |
Sean Paul | ef8f1f9 | 2015-04-29 16:05:23 -0400 | [diff] [blame] | 292 | static int hwc_get_display_configs(struct hwc_composer_device_1 *dev, |
| 293 | int display, uint32_t *configs, |
Sean Paul | 6a55e9f | 2015-04-30 15:31:06 -0400 | [diff] [blame] | 294 | size_t *num_configs) { |
| 295 | if (!*num_configs) |
Sean Paul | ef8f1f9 | 2015-04-29 16:05:23 -0400 | [diff] [blame] | 296 | return 0; |
Sean Paul | e0c4c3d | 2015-01-20 16:56:04 -0500 | [diff] [blame] | 297 | |
Sean Paul | ef8f1f9 | 2015-04-29 16:05:23 -0400 | [diff] [blame] | 298 | struct hwc_context_t *ctx = (struct hwc_context_t *)&dev->common; |
Sean Paul | e42febf | 2015-05-07 11:35:29 -0700 | [diff] [blame] | 299 | hwc_drm_display_t *hd = &ctx->displays[display]; |
Sean Paul | 6a55e9f | 2015-04-30 15:31:06 -0400 | [diff] [blame] | 300 | hd->config_ids.clear(); |
| 301 | |
| 302 | DrmConnector *connector = ctx->drm.GetConnectorForDisplay(display); |
| 303 | if (!connector) { |
| 304 | ALOGE("Failed to get connector for display %d", display); |
Sean Paul | ef8f1f9 | 2015-04-29 16:05:23 -0400 | [diff] [blame] | 305 | return -ENODEV; |
| 306 | } |
Sean Paul | e0c4c3d | 2015-01-20 16:56:04 -0500 | [diff] [blame] | 307 | |
Sean Paul | e42febf | 2015-05-07 11:35:29 -0700 | [diff] [blame] | 308 | int ret = connector->UpdateModes(); |
Sean Paul | 6a55e9f | 2015-04-30 15:31:06 -0400 | [diff] [blame] | 309 | if (ret) { |
| 310 | ALOGE("Failed to update display modes %d", ret); |
Sean Paul | ef8f1f9 | 2015-04-29 16:05:23 -0400 | [diff] [blame] | 311 | return ret; |
Sean Paul | ef8f1f9 | 2015-04-29 16:05:23 -0400 | [diff] [blame] | 312 | } |
Sean Paul | e0c4c3d | 2015-01-20 16:56:04 -0500 | [diff] [blame] | 313 | |
Sean Paul | 6a55e9f | 2015-04-30 15:31:06 -0400 | [diff] [blame] | 314 | for (DrmConnector::ModeIter iter = connector->begin_modes(); |
| 315 | iter != connector->end_modes(); ++iter) { |
| 316 | size_t idx = hd->config_ids.size(); |
| 317 | if (idx == *num_configs) |
| 318 | break; |
| 319 | hd->config_ids.push_back(iter->id()); |
| 320 | configs[idx] = iter->id(); |
| 321 | } |
| 322 | *num_configs = hd->config_ids.size(); |
| 323 | return *num_configs == 0 ? -1 : 0; |
Sean Paul | e0c4c3d | 2015-01-20 16:56:04 -0500 | [diff] [blame] | 324 | } |
| 325 | |
Sean Paul | ef8f1f9 | 2015-04-29 16:05:23 -0400 | [diff] [blame] | 326 | static int hwc_get_display_attributes(struct hwc_composer_device_1 *dev, |
| 327 | int display, uint32_t config, |
| 328 | const uint32_t *attributes, |
| 329 | int32_t *values) { |
| 330 | struct hwc_context_t *ctx = (struct hwc_context_t *)&dev->common; |
Sean Paul | 6a55e9f | 2015-04-30 15:31:06 -0400 | [diff] [blame] | 331 | DrmConnector *c = ctx->drm.GetConnectorForDisplay(display); |
Sean Paul | ef8f1f9 | 2015-04-29 16:05:23 -0400 | [diff] [blame] | 332 | if (!c) { |
Sean Paul | 6a55e9f | 2015-04-30 15:31:06 -0400 | [diff] [blame] | 333 | ALOGE("Failed to get DrmConnector for display %d", display); |
Sean Paul | ef8f1f9 | 2015-04-29 16:05:23 -0400 | [diff] [blame] | 334 | return -ENODEV; |
| 335 | } |
Sean Paul | 6a55e9f | 2015-04-30 15:31:06 -0400 | [diff] [blame] | 336 | DrmMode mode; |
| 337 | for (DrmConnector::ModeIter iter = c->begin_modes(); iter != c->end_modes(); |
| 338 | ++iter) { |
| 339 | if (iter->id() == config) { |
| 340 | mode = *iter; |
| 341 | break; |
| 342 | } |
| 343 | } |
| 344 | if (mode.id() == 0) { |
| 345 | ALOGE("Failed to find active mode for display %d", display); |
| 346 | return -ENOENT; |
Sean Paul | ef8f1f9 | 2015-04-29 16:05:23 -0400 | [diff] [blame] | 347 | } |
Sean Paul | e0c4c3d | 2015-01-20 16:56:04 -0500 | [diff] [blame] | 348 | |
Sean Paul | 6a55e9f | 2015-04-30 15:31:06 -0400 | [diff] [blame] | 349 | uint32_t mm_width = c->mm_width(); |
| 350 | uint32_t mm_height = c->mm_height(); |
Sean Paul | ef8f1f9 | 2015-04-29 16:05:23 -0400 | [diff] [blame] | 351 | for (int i = 0; attributes[i] != HWC_DISPLAY_NO_ATTRIBUTE; ++i) { |
| 352 | switch (attributes[i]) { |
| 353 | case HWC_DISPLAY_VSYNC_PERIOD: |
Sean Paul | 6a55e9f | 2015-04-30 15:31:06 -0400 | [diff] [blame] | 354 | values[i] = 1000 * 1000 * 1000 / mode.v_refresh(); |
Sean Paul | ef8f1f9 | 2015-04-29 16:05:23 -0400 | [diff] [blame] | 355 | break; |
| 356 | case HWC_DISPLAY_WIDTH: |
Sean Paul | 6a55e9f | 2015-04-30 15:31:06 -0400 | [diff] [blame] | 357 | values[i] = mode.h_display(); |
Sean Paul | ef8f1f9 | 2015-04-29 16:05:23 -0400 | [diff] [blame] | 358 | break; |
| 359 | case HWC_DISPLAY_HEIGHT: |
Sean Paul | 6a55e9f | 2015-04-30 15:31:06 -0400 | [diff] [blame] | 360 | values[i] = mode.v_display(); |
Sean Paul | ef8f1f9 | 2015-04-29 16:05:23 -0400 | [diff] [blame] | 361 | break; |
| 362 | case HWC_DISPLAY_DPI_X: |
| 363 | /* Dots per 1000 inches */ |
Sean Paul | 6a55e9f | 2015-04-30 15:31:06 -0400 | [diff] [blame] | 364 | values[i] = mm_width ? (mode.h_display() * UM_PER_INCH) / mm_width : 0; |
Sean Paul | ef8f1f9 | 2015-04-29 16:05:23 -0400 | [diff] [blame] | 365 | break; |
| 366 | case HWC_DISPLAY_DPI_Y: |
| 367 | /* Dots per 1000 inches */ |
Sean Paul | 6a55e9f | 2015-04-30 15:31:06 -0400 | [diff] [blame] | 368 | values[i] = |
| 369 | mm_height ? (mode.v_display() * UM_PER_INCH) / mm_height : 0; |
Sean Paul | ef8f1f9 | 2015-04-29 16:05:23 -0400 | [diff] [blame] | 370 | break; |
| 371 | } |
| 372 | } |
Sean Paul | ef8f1f9 | 2015-04-29 16:05:23 -0400 | [diff] [blame] | 373 | return 0; |
Sean Paul | e0c4c3d | 2015-01-20 16:56:04 -0500 | [diff] [blame] | 374 | } |
| 375 | |
Sean Paul | ef8f1f9 | 2015-04-29 16:05:23 -0400 | [diff] [blame] | 376 | static int hwc_get_active_config(struct hwc_composer_device_1 *dev, |
| 377 | int display) { |
| 378 | struct hwc_context_t *ctx = (struct hwc_context_t *)&dev->common; |
Sean Paul | 6a55e9f | 2015-04-30 15:31:06 -0400 | [diff] [blame] | 379 | DrmConnector *c = ctx->drm.GetConnectorForDisplay(display); |
| 380 | if (!c) { |
| 381 | ALOGE("Failed to get DrmConnector for display %d", display); |
Sean Paul | ef8f1f9 | 2015-04-29 16:05:23 -0400 | [diff] [blame] | 382 | return -ENODEV; |
| 383 | } |
Sean Paul | e0c4c3d | 2015-01-20 16:56:04 -0500 | [diff] [blame] | 384 | |
Sean Paul | 6a55e9f | 2015-04-30 15:31:06 -0400 | [diff] [blame] | 385 | DrmMode mode = c->active_mode(); |
Sean Paul | e42febf | 2015-05-07 11:35:29 -0700 | [diff] [blame] | 386 | hwc_drm_display_t *hd = &ctx->displays[display]; |
Sean Paul | 6a55e9f | 2015-04-30 15:31:06 -0400 | [diff] [blame] | 387 | for (size_t i = 0; i < hd->config_ids.size(); ++i) { |
| 388 | if (hd->config_ids[i] == mode.id()) |
| 389 | return i; |
Sean Paul | ef8f1f9 | 2015-04-29 16:05:23 -0400 | [diff] [blame] | 390 | } |
Sean Paul | 6a55e9f | 2015-04-30 15:31:06 -0400 | [diff] [blame] | 391 | return -1; |
Sean Paul | e0c4c3d | 2015-01-20 16:56:04 -0500 | [diff] [blame] | 392 | } |
| 393 | |
Sean Paul | ef8f1f9 | 2015-04-29 16:05:23 -0400 | [diff] [blame] | 394 | static int hwc_set_active_config(struct hwc_composer_device_1 *dev, int display, |
| 395 | int index) { |
| 396 | struct hwc_context_t *ctx = (struct hwc_context_t *)&dev->common; |
Sean Paul | e42febf | 2015-05-07 11:35:29 -0700 | [diff] [blame] | 397 | hwc_drm_display_t *hd = &ctx->displays[display]; |
Sean Paul | 6a55e9f | 2015-04-30 15:31:06 -0400 | [diff] [blame] | 398 | if (index >= (int)hd->config_ids.size()) { |
| 399 | ALOGE("Invalid config index %d passed in", index); |
| 400 | return -EINVAL; |
Sean Paul | ef8f1f9 | 2015-04-29 16:05:23 -0400 | [diff] [blame] | 401 | } |
Sean Paul | e0c4c3d | 2015-01-20 16:56:04 -0500 | [diff] [blame] | 402 | |
Sean Paul | e42febf | 2015-05-07 11:35:29 -0700 | [diff] [blame] | 403 | int ret = |
Sean Paul | 6a55e9f | 2015-04-30 15:31:06 -0400 | [diff] [blame] | 404 | ctx->drm.SetDisplayActiveMode(display, hd->config_ids[index]); |
| 405 | if (ret) { |
| 406 | ALOGE("Failed to set config for display %d", display); |
| 407 | return ret; |
Sean Paul | ef8f1f9 | 2015-04-29 16:05:23 -0400 | [diff] [blame] | 408 | } |
Sean Paul | e0c4c3d | 2015-01-20 16:56:04 -0500 | [diff] [blame] | 409 | |
Sean Paul | 6a55e9f | 2015-04-30 15:31:06 -0400 | [diff] [blame] | 410 | return ret; |
Sean Paul | e0c4c3d | 2015-01-20 16:56:04 -0500 | [diff] [blame] | 411 | } |
| 412 | |
Sean Paul | ef8f1f9 | 2015-04-29 16:05:23 -0400 | [diff] [blame] | 413 | static int hwc_device_close(struct hw_device_t *dev) { |
| 414 | struct hwc_context_t *ctx = (struct hwc_context_t *)dev; |
Sean Paul | ef8f1f9 | 2015-04-29 16:05:23 -0400 | [diff] [blame] | 415 | delete ctx; |
Sean Paul | ef8f1f9 | 2015-04-29 16:05:23 -0400 | [diff] [blame] | 416 | return 0; |
Sean Paul | e0c4c3d | 2015-01-20 16:56:04 -0500 | [diff] [blame] | 417 | } |
| 418 | |
Sean Paul | 24a26e3 | 2015-02-04 10:34:47 -0800 | [diff] [blame] | 419 | /* |
| 420 | * TODO: This function sets the active config to the first one in the list. This |
| 421 | * should be fixed such that it selects the preferred mode for the display, or |
| 422 | * some other, saner, method of choosing the config. |
| 423 | */ |
Sean Paul | e42febf | 2015-05-07 11:35:29 -0700 | [diff] [blame] | 424 | static int hwc_set_initial_config(hwc_drm_display_t *hd) { |
Sean Paul | ef8f1f9 | 2015-04-29 16:05:23 -0400 | [diff] [blame] | 425 | uint32_t config; |
| 426 | size_t num_configs = 1; |
| 427 | int ret = hwc_get_display_configs(&hd->ctx->device, hd->display, &config, |
| 428 | &num_configs); |
| 429 | if (ret || !num_configs) |
| 430 | return 0; |
Sean Paul | 24a26e3 | 2015-02-04 10:34:47 -0800 | [diff] [blame] | 431 | |
Sean Paul | ef8f1f9 | 2015-04-29 16:05:23 -0400 | [diff] [blame] | 432 | ret = hwc_set_active_config(&hd->ctx->device, hd->display, 0); |
| 433 | if (ret) { |
| 434 | ALOGE("Failed to set active config d=%d ret=%d", hd->display, ret); |
| 435 | return ret; |
| 436 | } |
Sean Paul | 24a26e3 | 2015-02-04 10:34:47 -0800 | [diff] [blame] | 437 | |
Sean Paul | ef8f1f9 | 2015-04-29 16:05:23 -0400 | [diff] [blame] | 438 | return ret; |
Sean Paul | 24a26e3 | 2015-02-04 10:34:47 -0800 | [diff] [blame] | 439 | } |
| 440 | |
Sean Paul | 6a55e9f | 2015-04-30 15:31:06 -0400 | [diff] [blame] | 441 | static int hwc_initialize_display(struct hwc_context_t *ctx, int display) { |
Sean Paul | e42febf | 2015-05-07 11:35:29 -0700 | [diff] [blame] | 442 | hwc_drm_display_t *hd = &ctx->displays[display]; |
Sean Paul | ef8f1f9 | 2015-04-29 16:05:23 -0400 | [diff] [blame] | 443 | hd->ctx = ctx; |
| 444 | hd->display = display; |
Sean Paul | e0c4c3d | 2015-01-20 16:56:04 -0500 | [diff] [blame] | 445 | |
Sean Paul | b386f1b | 2015-05-13 06:33:23 -0700 | [diff] [blame] | 446 | int ret = hwc_set_initial_config(hd); |
Sean Paul | ef8f1f9 | 2015-04-29 16:05:23 -0400 | [diff] [blame] | 447 | if (ret) { |
| 448 | ALOGE("Failed to set initial config for d=%d ret=%d", display, ret); |
Sean Paul | ef8f1f9 | 2015-04-29 16:05:23 -0400 | [diff] [blame] | 449 | return ret; |
| 450 | } |
Sean Paul | 24a26e3 | 2015-02-04 10:34:47 -0800 | [diff] [blame] | 451 | |
Sean Paul | 4057be3 | 2015-05-13 06:23:09 -0700 | [diff] [blame] | 452 | ret = hd->vsync_worker.Init(&ctx->drm, display); |
| 453 | if (ret) { |
| 454 | ALOGE("Failed to create event worker for display %d %d\n", display, ret); |
| 455 | return ret; |
| 456 | } |
| 457 | |
Sean Paul | ef8f1f9 | 2015-04-29 16:05:23 -0400 | [diff] [blame] | 458 | return 0; |
Sean Paul | e0c4c3d | 2015-01-20 16:56:04 -0500 | [diff] [blame] | 459 | } |
| 460 | |
Sean Paul | ef8f1f9 | 2015-04-29 16:05:23 -0400 | [diff] [blame] | 461 | static int hwc_enumerate_displays(struct hwc_context_t *ctx) { |
Sean Paul | 6a55e9f | 2015-04-30 15:31:06 -0400 | [diff] [blame] | 462 | int ret; |
| 463 | for (DrmResources::ConnectorIter c = ctx->drm.begin_connectors(); |
| 464 | c != ctx->drm.end_connectors(); ++c) { |
| 465 | ret = hwc_initialize_display(ctx, (*c)->display()); |
| 466 | if (ret) { |
| 467 | ALOGE("Failed to initialize display %d", (*c)->display()); |
| 468 | return ret; |
Sean Paul | ef8f1f9 | 2015-04-29 16:05:23 -0400 | [diff] [blame] | 469 | } |
| 470 | } |
Sean Paul | ef8f1f9 | 2015-04-29 16:05:23 -0400 | [diff] [blame] | 471 | |
| 472 | return 0; |
Sean Paul | e0c4c3d | 2015-01-20 16:56:04 -0500 | [diff] [blame] | 473 | } |
| 474 | |
Sean Paul | ef8f1f9 | 2015-04-29 16:05:23 -0400 | [diff] [blame] | 475 | static int hwc_device_open(const struct hw_module_t *module, const char *name, |
| 476 | struct hw_device_t **dev) { |
| 477 | if (strcmp(name, HWC_HARDWARE_COMPOSER)) { |
| 478 | ALOGE("Invalid module name- %s", name); |
| 479 | return -EINVAL; |
| 480 | } |
| 481 | |
| 482 | struct hwc_context_t *ctx = new hwc_context_t(); |
| 483 | if (!ctx) { |
| 484 | ALOGE("Failed to allocate hwc context"); |
| 485 | return -ENOMEM; |
| 486 | } |
| 487 | |
Sean Paul | 6a55e9f | 2015-04-30 15:31:06 -0400 | [diff] [blame] | 488 | int ret = ctx->drm.Init(); |
| 489 | if (ret) { |
| 490 | ALOGE("Can't initialize Drm object %d", ret); |
| 491 | delete ctx; |
| 492 | return ret; |
| 493 | } |
| 494 | |
Sean Paul | da6270d | 2015-06-01 14:11:52 -0400 | [diff] [blame] | 495 | ctx->importer = Importer::CreateInstance(&ctx->drm); |
| 496 | if (!ctx->importer) { |
| 497 | ALOGE("Failed to create importer instance"); |
Sean Paul | ef8f1f9 | 2015-04-29 16:05:23 -0400 | [diff] [blame] | 498 | delete ctx; |
| 499 | return ret; |
| 500 | } |
| 501 | |
Sean Paul | ef8f1f9 | 2015-04-29 16:05:23 -0400 | [diff] [blame] | 502 | ret = hwc_enumerate_displays(ctx); |
| 503 | if (ret) { |
| 504 | ALOGE("Failed to enumerate displays: %s", strerror(ret)); |
Sean Paul | 6a55e9f | 2015-04-30 15:31:06 -0400 | [diff] [blame] | 505 | delete ctx; |
| 506 | return ret; |
| 507 | } |
| 508 | |
Sean Paul | ef8f1f9 | 2015-04-29 16:05:23 -0400 | [diff] [blame] | 509 | ctx->device.common.tag = HARDWARE_DEVICE_TAG; |
| 510 | ctx->device.common.version = HWC_DEVICE_API_VERSION_1_4; |
| 511 | ctx->device.common.module = const_cast<hw_module_t *>(module); |
| 512 | ctx->device.common.close = hwc_device_close; |
| 513 | |
| 514 | ctx->device.prepare = hwc_prepare; |
| 515 | ctx->device.set = hwc_set; |
| 516 | ctx->device.eventControl = hwc_event_control; |
| 517 | ctx->device.setPowerMode = hwc_set_power_mode; |
| 518 | ctx->device.query = hwc_query; |
| 519 | ctx->device.registerProcs = hwc_register_procs; |
| 520 | ctx->device.getDisplayConfigs = hwc_get_display_configs; |
| 521 | ctx->device.getDisplayAttributes = hwc_get_display_attributes; |
| 522 | ctx->device.getActiveConfig = hwc_get_active_config; |
| 523 | ctx->device.setActiveConfig = hwc_set_active_config; |
| 524 | ctx->device.setCursorPositionAsync = NULL; /* TODO: Add cursor */ |
| 525 | |
| 526 | *dev = &ctx->device.common; |
| 527 | |
| 528 | return 0; |
| 529 | } |
Sean Paul | 6a55e9f | 2015-04-30 15:31:06 -0400 | [diff] [blame] | 530 | } |
Sean Paul | ef8f1f9 | 2015-04-29 16:05:23 -0400 | [diff] [blame] | 531 | |
Sean Paul | 6a55e9f | 2015-04-30 15:31:06 -0400 | [diff] [blame] | 532 | static struct hw_module_methods_t hwc_module_methods = { |
| 533 | open : android::hwc_device_open |
| 534 | }; |
Sean Paul | e0c4c3d | 2015-01-20 16:56:04 -0500 | [diff] [blame] | 535 | |
| 536 | hwc_module_t HAL_MODULE_INFO_SYM = { |
Sean Paul | ef8f1f9 | 2015-04-29 16:05:23 -0400 | [diff] [blame] | 537 | common : { |
| 538 | tag : HARDWARE_MODULE_TAG, |
| 539 | version_major : 1, |
| 540 | version_minor : 0, |
| 541 | id : HWC_HARDWARE_MODULE_ID, |
| 542 | name : "DRM hwcomposer module", |
| 543 | author : "The Android Open Source Project", |
| 544 | methods : &hwc_module_methods, |
| 545 | dso : NULL, |
| 546 | reserved : {0}, |
| 547 | } |
Sean Paul | e0c4c3d | 2015-01-20 16:56:04 -0500 | [diff] [blame] | 548 | }; |