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Andrew Walbran19690632022-12-07 16:41:30 +00001// Copyright 2022, The Android Open Source Project
2//
3// Licensed under the Apache License, Version 2.0 (the "License");
4// you may not use this file except in compliance with the License.
5// You may obtain a copy of the License at
6//
7// http://www.apache.org/licenses/LICENSE-2.0
8//
9// Unless required by applicable law or agreed to in writing, software
10// distributed under the License is distributed on an "AS IS" BASIS,
11// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
12// See the License for the specific language governing permissions and
13// limitations under the License.
14
Andrew Walbran0a8dac72022-12-21 13:49:06 +000015//! Functions to scan the PCI bus for VirtIO devices.
Andrew Walbran19690632022-12-07 16:41:30 +000016
Andrew Walbran848decf2022-12-15 14:39:38 +000017use super::hal::HalImpl;
Alice Wangeade1672023-06-08 14:56:20 +000018use crate::memory::{MemoryTracker, MemoryTrackerError};
Andrew Walbranb398fc82023-01-24 14:45:46 +000019use alloc::boxed::Box;
Alice Wang287de622023-06-08 13:17:03 +000020use core::fmt;
Pierre-Clément Tosi1cc5eb72023-02-02 11:09:18 +000021use fdtpci::PciInfo;
Alice Wang287de622023-06-08 13:17:03 +000022use log::debug;
Andrew Walbranb398fc82023-01-24 14:45:46 +000023use once_cell::race::OnceBox;
Andrew Walbran848decf2022-12-15 14:39:38 +000024use virtio_drivers::{
Pierre-Clément Tosi1cc5eb72023-02-02 11:09:18 +000025 device::blk,
Alice Wang0e086232023-06-12 13:47:40 +000026 transport::pci::{
27 bus::{BusDeviceIterator, PciRoot},
28 virtio_device_type, PciTransport,
Andrew Walbran848decf2022-12-15 14:39:38 +000029 },
30};
Andrew Walbran19690632022-12-07 16:41:30 +000031
Andrew Walbranb398fc82023-01-24 14:45:46 +000032pub(super) static PCI_INFO: OnceBox<PciInfo> = OnceBox::new();
33
Alice Wang287de622023-06-08 13:17:03 +000034/// PCI errors.
35#[derive(Debug, Clone)]
36pub enum PciError {
37 /// Attempted to initialize the PCI more than once.
38 DuplicateInitialization,
39 /// Failed to map PCI CAM.
40 CamMapFailed(MemoryTrackerError),
41 /// Failed to map PCI BAR.
42 BarMapFailed(MemoryTrackerError),
43}
44
45impl fmt::Display for PciError {
46 fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result {
47 match self {
48 Self::DuplicateInitialization => {
49 write!(f, "Attempted to initialize the PCI more than once.")
50 }
51 Self::CamMapFailed(e) => write!(f, "Failed to map PCI CAM: {e}"),
52 Self::BarMapFailed(e) => write!(f, "Failed to map PCI BAR: {e}"),
53 }
54 }
55}
56
Andrew Walbranb398fc82023-01-24 14:45:46 +000057/// Prepares to use VirtIO PCI devices.
58///
59/// In particular:
60///
61/// 1. Maps the PCI CAM and BAR range in the page table and MMIO guard.
62/// 2. Stores the `PciInfo` for the VirtIO HAL to use later.
63/// 3. Creates and returns a `PciRoot`.
64///
65/// This must only be called once; it will panic if it is called a second time.
Alice Wangeff58392023-07-04 13:32:09 +000066pub fn initialize(pci_info: PciInfo, memory: &mut MemoryTracker) -> Result<PciRoot, PciError> {
Alice Wang287de622023-06-08 13:17:03 +000067 PCI_INFO.set(Box::new(pci_info.clone())).map_err(|_| PciError::DuplicateInitialization)?;
Andrew Walbranb398fc82023-01-24 14:45:46 +000068
Alice Wang287de622023-06-08 13:17:03 +000069 memory.map_mmio_range(pci_info.cam_range.clone()).map_err(PciError::CamMapFailed)?;
70 let bar_range = pci_info.bar_range.start as usize..pci_info.bar_range.end as usize;
71 memory.map_mmio_range(bar_range).map_err(PciError::BarMapFailed)?;
Andrew Walbranb398fc82023-01-24 14:45:46 +000072
73 // Safety: This is the only place where we call make_pci_root, and `PCI_INFO.set` above will
74 // panic if it is called a second time.
75 Ok(unsafe { pci_info.make_pci_root() })
76}
77
Alice Wangeade1672023-06-08 14:56:20 +000078/// Virtio Block device.
Pierre-Clément Tosi1cc5eb72023-02-02 11:09:18 +000079pub type VirtIOBlk = blk::VirtIOBlk<HalImpl, PciTransport>;
80
Alice Wang0e086232023-06-12 13:47:40 +000081/// An iterator that iterates over the PCI transport for each device.
82pub struct PciTransportIterator<'a> {
Pierre-Clément Tosie8ec0392023-01-16 15:38:31 +000083 pci_root: &'a mut PciRoot,
84 bus: BusDeviceIterator,
85}
86
Alice Wang0e086232023-06-12 13:47:40 +000087impl<'a> PciTransportIterator<'a> {
Alice Wangeade1672023-06-08 14:56:20 +000088 /// Creates a new iterator.
Pierre-Clément Tosie8ec0392023-01-16 15:38:31 +000089 pub fn new(pci_root: &'a mut PciRoot) -> Self {
90 let bus = pci_root.enumerate_bus(0);
91 Self { pci_root, bus }
92 }
93}
94
Alice Wang0e086232023-06-12 13:47:40 +000095impl<'a> Iterator for PciTransportIterator<'a> {
96 type Item = PciTransport;
Pierre-Clément Tosie8ec0392023-01-16 15:38:31 +000097
98 fn next(&mut self) -> Option<Self::Item> {
99 loop {
100 let (device_function, info) = self.bus.next()?;
101 let (status, command) = self.pci_root.get_status_command(device_function);
102 debug!(
103 "Found PCI device {} at {}, status {:?} command {:?}",
104 info, device_function, status, command
105 );
106
Pierre-Clément Tosiebb37602023-02-17 14:57:26 +0000107 let Some(virtio_type) = virtio_device_type(&info) else {
Pierre-Clément Tosie8ec0392023-01-16 15:38:31 +0000108 continue;
109 };
Andrew Walbrand1d03182022-12-09 18:20:01 +0000110 debug!(" VirtIO {:?}", virtio_type);
Pierre-Clément Tosie8ec0392023-01-16 15:38:31 +0000111
Alice Wang0e086232023-06-12 13:47:40 +0000112 return PciTransport::new::<HalImpl>(self.pci_root, device_function).ok();
Andrew Walbrand1d03182022-12-09 18:20:01 +0000113 }
114 }
Pierre-Clément Tosie8ec0392023-01-16 15:38:31 +0000115}