blob: 92cfea655afa35ecd359719da4902ac891b9a1f0 [file] [log] [blame]
Sean Paule0c4c3d2015-01-20 16:56:04 -05001/*
2 * Copyright (C) 2015 The Android Open Source Project
3 *
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
7 *
8 * http://www.apache.org/licenses/LICENSE-2.0
9 *
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
15 */
16
17#define LOG_TAG "hwcomposer-drm"
18
19#include <fcntl.h>
20#include <errno.h>
21#include <sys/param.h>
Sean Paul9aa5ad32015-01-22 15:47:54 -050022#include <sys/resource.h>
23#include <pthread.h>
Sean Paul9b1bb842015-01-23 01:11:58 -050024#include <queue>
Sean Paule0c4c3d2015-01-20 16:56:04 -050025
26#include <cutils/log.h>
27
28#include <xf86drm.h>
29#include <xf86drmMode.h>
Sean Paule0c4c3d2015-01-20 16:56:04 -050030
31#include <hardware/hardware.h>
32#include <hardware/hwcomposer.h>
33
Lauri Peltonen64717b22015-02-04 16:55:31 +020034#include <cutils/properties.h>
Sean Paul9aa5ad32015-01-22 15:47:54 -050035#include <sync/sync.h>
Sean Paulf1dc1912015-01-24 01:34:31 -050036#include <sw_sync.h>
Sean Paul9aa5ad32015-01-22 15:47:54 -050037
Sean Paulcd36a9e2015-01-22 18:01:18 -050038#include "drm_hwcomposer.h"
Sean Paule0c4c3d2015-01-20 16:56:04 -050039
40#define ARRAY_SIZE(arr) (int)(sizeof(arr) / sizeof((arr)[0]))
41
42#define HWCOMPOSER_DRM_DEVICE "/dev/dri/card0"
43#define MAX_NUM_DISPLAYS 3
44#define UM_PER_INCH 25400
45
46static const uint32_t panel_types[] = {
47 DRM_MODE_CONNECTOR_LVDS,
48 DRM_MODE_CONNECTOR_eDP,
49 DRM_MODE_CONNECTOR_DSI,
50};
51
Sean Paul9aa5ad32015-01-22 15:47:54 -050052struct hwc_worker {
53 pthread_t thread;
54 pthread_mutex_t lock;
55 pthread_cond_t cond;
56 bool exit;
57};
58
Sean Paule0c4c3d2015-01-20 16:56:04 -050059struct hwc_drm_display {
Sean Paul9aa5ad32015-01-22 15:47:54 -050060 struct hwc_context_t *ctx;
61 int display;
62
Sean Paule0c4c3d2015-01-20 16:56:04 -050063 uint32_t connector_id;
64
65 drmModeModeInfoPtr configs;
66 uint32_t num_configs;
67
Sean Paulfa406a12015-02-04 10:05:44 -080068 drmModeModeInfo active_mode;
Sean Paule0c4c3d2015-01-20 16:56:04 -050069 uint32_t active_crtc;
Sean Pauleb9e75c2015-01-25 23:31:30 -050070 int active_pipe;
Sean Paulefb20cb2015-02-04 09:29:15 -080071 bool initial_modeset_required;
Sean Paul9aa5ad32015-01-22 15:47:54 -050072
73 struct hwc_worker set_worker;
74
Sean Paul9b1bb842015-01-23 01:11:58 -050075 std::queue<struct hwc_drm_bo> buf_queue;
Sean Paul9aa5ad32015-01-22 15:47:54 -050076 struct hwc_drm_bo front;
Sean Paulf1dc1912015-01-24 01:34:31 -050077
78 int timeline_fd;
79 unsigned timeline_next;
Sean Pauleb9e75c2015-01-25 23:31:30 -050080
81 struct hwc_worker vsync_worker;
82 bool enable_vsync_events;
Sean Paule0c4c3d2015-01-20 16:56:04 -050083};
84
85struct hwc_context_t {
86 hwc_composer_device_1_t device;
87
88 int fd;
Sean Paule0c4c3d2015-01-20 16:56:04 -050089
90 hwc_procs_t const *procs;
Sean Paulcd36a9e2015-01-22 18:01:18 -050091 struct hwc_import_context *import_ctx;
Sean Paule0c4c3d2015-01-20 16:56:04 -050092
93 struct hwc_drm_display displays[MAX_NUM_DISPLAYS];
94 int num_displays;
95};
96
97static int hwc_get_drm_display(struct hwc_context_t *ctx, int display,
98 struct hwc_drm_display **hd)
99{
100 if (display >= MAX_NUM_DISPLAYS) {
101 ALOGE("Requested display is out-of-bounds %d %d", display,
102 MAX_NUM_DISPLAYS);
103 return -EINVAL;
104 }
105 *hd = &ctx->displays[display];
106 return 0;
107}
108
109static int hwc_prepare_layer(hwc_layer_1_t *layer)
110{
111 /* TODO: We can't handle background right now, defer to sufaceFlinger */
112 if (layer->compositionType == HWC_BACKGROUND) {
113 layer->compositionType = HWC_FRAMEBUFFER;
114 ALOGV("Can't handle background layers yet");
115
116 /* TODO: Support sideband compositions */
117 } else if (layer->compositionType == HWC_SIDEBAND) {
118 layer->compositionType = HWC_FRAMEBUFFER;
119 ALOGV("Can't handle sideband content yet");
120 }
121
122 layer->hints = 0;
123
124 /* TODO: Handle cursor by setting compositionType=HWC_CURSOR_OVERLAY */
125 if (layer->flags & HWC_IS_CURSOR_LAYER) {
126 ALOGV("Can't handle async cursors yet");
127 }
128
129 /* TODO: Handle transformations */
130 if (layer->transform) {
131 ALOGV("Can't handle transformations yet");
132 }
133
134 /* TODO: Handle blending & plane alpha*/
135 if (layer->blending == HWC_BLENDING_PREMULT ||
136 layer->blending == HWC_BLENDING_COVERAGE) {
137 ALOGV("Can't handle blending yet");
138 }
139
140 /* TODO: Handle cropping & scaling */
141
142 return 0;
143}
144
145static int hwc_prepare(hwc_composer_device_1_t */* dev */, size_t num_displays,
146 hwc_display_contents_1_t** display_contents)
147{
148 int ret = 0, i, j;
149
150 /* TODO: Check flags for HWC_GEOMETRY_CHANGED */
151
152 for (i = 0; i < (int)num_displays && i < MAX_NUM_DISPLAYS; i++) {
Sean Pauldffca952015-02-04 10:19:55 -0800153
154 if (!display_contents[i])
155 continue;
156
Sean Paule0c4c3d2015-01-20 16:56:04 -0500157 for (j = 0; j < (int)display_contents[i]->numHwLayers; j++) {
158 ret = hwc_prepare_layer(
159 &display_contents[i]->hwLayers[j]);
160 if (ret) {
161 ALOGE("Failed to prepare layer %d:%d", j, i);
162 return ret;
163 }
164 }
165 }
166
167 return ret;
168}
169
Sean Paule0c4c3d2015-01-20 16:56:04 -0500170static bool hwc_mode_is_equal(drmModeModeInfoPtr a, drmModeModeInfoPtr b)
171{
172 return a->clock == b->clock &&
173 a->hdisplay == b->hdisplay &&
174 a->hsync_start == b->hsync_start &&
175 a->hsync_end == b->hsync_end &&
176 a->htotal == b->htotal &&
177 a->hskew == b->hskew &&
178 a->vdisplay == b->vdisplay &&
179 a->vsync_start == b->vsync_start &&
180 a->vsync_end == b->vsync_end &&
181 a->vtotal == b->vtotal &&
182 a->vscan == b->vscan &&
183 a->vrefresh == b->vrefresh &&
184 a->flags == b->flags &&
185 a->type == b->type &&
186 !strcmp(a->name, b->name);
187}
188
Sean Paul9aa5ad32015-01-22 15:47:54 -0500189static int hwc_modeset_required(struct hwc_drm_display *hd,
190 bool *modeset_required)
191{
192 drmModeCrtcPtr crtc;
193 drmModeModeInfoPtr m;
194
Sean Paulefb20cb2015-02-04 09:29:15 -0800195 if (hd->initial_modeset_required) {
196 *modeset_required = true;
197 hd->initial_modeset_required = false;
198 return 0;
199 }
200
Sean Paul9aa5ad32015-01-22 15:47:54 -0500201 crtc = drmModeGetCrtc(hd->ctx->fd, hd->active_crtc);
202 if (!crtc) {
203 ALOGE("Failed to get crtc for display %d", hd->display);
204 return -ENODEV;
205 }
206
Sean Paulfa406a12015-02-04 10:05:44 -0800207 m = &hd->active_mode;
Sean Paul9aa5ad32015-01-22 15:47:54 -0500208
209 /* Do a modeset if we haven't done one, or the mode has changed */
210 if (!crtc->mode_valid || !hwc_mode_is_equal(m, &crtc->mode))
211 *modeset_required = true;
212 else
213 *modeset_required = false;
214
215 drmModeFreeCrtc(crtc);
216
217 return 0;
218}
219
220static void hwc_flip_handler(int /* fd */, unsigned int /* sequence */,
221 unsigned int /* tv_sec */, unsigned int /* tv_usec */,
222 void */* user_data */)
223{
224}
225
Sean Paul9b1bb842015-01-23 01:11:58 -0500226static int hwc_flip(struct hwc_drm_display *hd, struct hwc_drm_bo *buf)
Sean Paul9aa5ad32015-01-22 15:47:54 -0500227{
228 fd_set fds;
229 drmEventContext event_context;
230 int ret;
231 bool modeset_required;
232
233 ret = hwc_modeset_required(hd, &modeset_required);
234 if (ret) {
235 ALOGE("Failed to determine if modeset is required %d", ret);
236 return ret;
237 }
238 if (modeset_required) {
Sean Paul9b1bb842015-01-23 01:11:58 -0500239 ret = drmModeSetCrtc(hd->ctx->fd, hd->active_crtc, buf->fb_id,
240 0, 0, &hd->connector_id, 1,
Sean Paulfa406a12015-02-04 10:05:44 -0800241 &hd->active_mode);
Sean Paul9aa5ad32015-01-22 15:47:54 -0500242 if (ret) {
243 ALOGE("Modeset failed for crtc %d",
244 hd->active_crtc);
245 return ret;
246 }
247 return 0;
248 }
249
250 FD_ZERO(&fds);
251 FD_SET(hd->ctx->fd, &fds);
252
253 event_context.version = DRM_EVENT_CONTEXT_VERSION;
254 event_context.page_flip_handler = hwc_flip_handler;
255
Sean Paul9b1bb842015-01-23 01:11:58 -0500256 ret = drmModePageFlip(hd->ctx->fd, hd->active_crtc, buf->fb_id,
Sean Paul9aa5ad32015-01-22 15:47:54 -0500257 DRM_MODE_PAGE_FLIP_EVENT, hd);
258 if (ret) {
259 ALOGE("Failed to flip buffer for crtc %d",
260 hd->active_crtc);
261 return ret;
262 }
263
264 do {
265 ret = select(hd->ctx->fd + 1, &fds, NULL, NULL, NULL);
266 } while (ret == -1 && errno == EINTR);
267
268 if (ret != 1) {
269 ALOGE("Failed waiting for flip to complete\n");
270 return -EINVAL;
271 }
272 drmHandleEvent(hd->ctx->fd, &event_context);
273
274 return 0;
275}
276
Sean Paul3bc48e82015-01-23 01:41:13 -0500277static int hwc_wait_and_set(struct hwc_drm_display *hd,
278 struct hwc_drm_bo *buf)
Sean Paul9aa5ad32015-01-22 15:47:54 -0500279{
Sean Paulaea15c22015-02-09 02:24:11 -0500280 struct drm_gem_close args;
281 int ret, i;
Sean Paul9aa5ad32015-01-22 15:47:54 -0500282
Lauri Peltonen132e0102015-02-12 13:54:33 +0200283 if (buf->acquire_fence_fd >= 0) {
284 ret = sync_wait(buf->acquire_fence_fd, -1);
285 close(buf->acquire_fence_fd);
286 buf->acquire_fence_fd = -1;
287 if (ret) {
288 ALOGE("Failed to wait for acquire %d", ret);
289 return ret;
290 }
291 }
292
Sean Paulaea15c22015-02-09 02:24:11 -0500293 ret = drmModeAddFB2(hd->ctx->fd, buf->width,
Sean Paul3bc48e82015-01-23 01:41:13 -0500294 buf->height, buf->format, buf->gem_handles, buf->pitches,
295 buf->offsets, &buf->fb_id, 0);
Sean Paul9aa5ad32015-01-22 15:47:54 -0500296 if (ret) {
297 ALOGE("could not create drm fb %d", ret);
298 return ret;
299 }
300
Sean Paul3bc48e82015-01-23 01:41:13 -0500301 ret = hwc_flip(hd, buf);
Sean Paul9aa5ad32015-01-22 15:47:54 -0500302 if (ret) {
303 ALOGE("Failed to perform flip\n");
304 return ret;
305 }
306
307 if (hd->front.fb_id) {
Sean Paulaea15c22015-02-09 02:24:11 -0500308 ret = drmModeRmFB(hd->ctx->fd, hd->front.fb_id);
Sean Paul9aa5ad32015-01-22 15:47:54 -0500309 if (ret) {
310 ALOGE("Failed to rm fb from front %d", ret);
311 return ret;
312 }
313 }
Sean Paulaea15c22015-02-09 02:24:11 -0500314
315 memset(&args, 0, sizeof(args));
316 for (i = 0; i < ARRAY_SIZE(hd->front.gem_handles); i++) {
317 if (!hd->front.gem_handles[i])
318 continue;
319 args.handle = hd->front.gem_handles[i];
320 drmIoctl(hd->ctx->fd, DRM_IOCTL_GEM_CLOSE, &args);
321 }
Sean Paul3bc48e82015-01-23 01:41:13 -0500322 hd->front = *buf;
323
Sean Paul9aa5ad32015-01-22 15:47:54 -0500324 return ret;
325}
326
327static void *hwc_set_worker(void *arg)
328{
329 struct hwc_drm_display *hd = (struct hwc_drm_display *)arg;
330 int ret;
331
332 setpriority(PRIO_PROCESS, 0, HAL_PRIORITY_URGENT_DISPLAY);
333
Sean Paul9aa5ad32015-01-22 15:47:54 -0500334 do {
Sean Paul3bc48e82015-01-23 01:41:13 -0500335 struct hwc_drm_bo buf;
336
337 ret = pthread_mutex_lock(&hd->set_worker.lock);
Sean Paul9aa5ad32015-01-22 15:47:54 -0500338 if (ret) {
Sean Paul3bc48e82015-01-23 01:41:13 -0500339 ALOGE("Failed to lock set lock %d", ret);
340 return NULL;
Sean Paul9aa5ad32015-01-22 15:47:54 -0500341 }
342
Sean Paul3bc48e82015-01-23 01:41:13 -0500343 if (hd->set_worker.exit)
344 goto out;
345
346 if (hd->buf_queue.empty()) {
347 ret = pthread_cond_wait(&hd->set_worker.cond,
348 &hd->set_worker.lock);
349 if (ret) {
350 ALOGE("Failed to wait on condition %d", ret);
351 goto out;
352 }
353 }
354
355 buf = hd->buf_queue.front();
356 hd->buf_queue.pop();
357
358 ret = pthread_mutex_unlock(&hd->set_worker.lock);
359 if (ret) {
360 ALOGE("Failed to unlock set lock %d", ret);
361 return NULL;
362 }
363
364 ret = hwc_wait_and_set(hd, &buf);
Sean Paul9aa5ad32015-01-22 15:47:54 -0500365 if (ret)
366 ALOGE("Failed to wait and set %d", ret);
Sean Paulf1dc1912015-01-24 01:34:31 -0500367
368 ret = sw_sync_timeline_inc(hd->timeline_fd, 1);
369 if (ret)
370 ALOGE("Failed to increment sync timeline %d", ret);
Sean Paul9aa5ad32015-01-22 15:47:54 -0500371 } while (true);
372
Sean Paul3bc48e82015-01-23 01:41:13 -0500373out:
Sean Paul9aa5ad32015-01-22 15:47:54 -0500374 ret = pthread_mutex_unlock(&hd->set_worker.lock);
Sean Paul3bc48e82015-01-23 01:41:13 -0500375 if (ret)
376 ALOGE("Failed to unlock set lock while exiting %d", ret);
Sean Paul9aa5ad32015-01-22 15:47:54 -0500377
378 return NULL;
379}
380
Sean Paule0c4c3d2015-01-20 16:56:04 -0500381static int hwc_set_display(hwc_context_t *ctx, int display,
382 hwc_display_contents_1_t* display_contents)
383{
384 struct hwc_drm_display *hd = NULL;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500385 hwc_layer_1_t *layer = NULL;
Sean Paul9b1bb842015-01-23 01:11:58 -0500386 struct hwc_drm_bo buf;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500387 int ret, i;
Sean Paul9aa5ad32015-01-22 15:47:54 -0500388 uint32_t fb_id;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500389
Sean Paul9b1bb842015-01-23 01:11:58 -0500390 memset(&buf, 0, sizeof(buf));
391
Sean Paule0c4c3d2015-01-20 16:56:04 -0500392 ret = hwc_get_drm_display(ctx, display, &hd);
393 if (ret)
Lauri Peltonen132e0102015-02-12 13:54:33 +0200394 goto out;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500395
396 if (!hd->active_crtc) {
397 ALOGE("There is no active crtc for display %d", display);
Lauri Peltonen132e0102015-02-12 13:54:33 +0200398 ret = -ENOENT;
399 goto out;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500400 }
401
402 /*
403 * TODO: We can only support one hw layer atm, so choose either the
404 * first one or the framebuffer target.
405 */
406 if (!display_contents->numHwLayers) {
407 return 0;
408 } else if (display_contents->numHwLayers == 1) {
409 layer = &display_contents->hwLayers[0];
410 } else {
411 for (i = 0; i < (int)display_contents->numHwLayers; i++) {
412 layer = &display_contents->hwLayers[i];
413 if (layer->compositionType == HWC_FRAMEBUFFER_TARGET)
414 break;
415 }
416 if (i == (int)display_contents->numHwLayers) {
417 ALOGE("Could not find a suitable layer for display %d",
418 display);
419 }
420 }
421
Sean Paul3bc48e82015-01-23 01:41:13 -0500422 ret = hwc_create_bo_from_import(ctx->fd, ctx->import_ctx, layer->handle,
423 &buf);
424 if (ret) {
425 ALOGE("Failed to import handle to drm bo %d", ret);
Lauri Peltonen132e0102015-02-12 13:54:33 +0200426 goto out;
Sean Paul3bc48e82015-01-23 01:41:13 -0500427 }
428 buf.acquire_fence_fd = layer->acquireFenceFd;
Lauri Peltonen132e0102015-02-12 13:54:33 +0200429 layer->acquireFenceFd = -1;
Sean Paul3bc48e82015-01-23 01:41:13 -0500430
Sean Paul9aa5ad32015-01-22 15:47:54 -0500431 ret = pthread_mutex_lock(&hd->set_worker.lock);
Sean Paule0c4c3d2015-01-20 16:56:04 -0500432 if (ret) {
Sean Paul9aa5ad32015-01-22 15:47:54 -0500433 ALOGE("Failed to lock set lock in set() %d", ret);
Lauri Peltonen132e0102015-02-12 13:54:33 +0200434 goto out;
Sean Paul9aa5ad32015-01-22 15:47:54 -0500435 }
Sean Paulf1dc1912015-01-24 01:34:31 -0500436
437 /*
438 * TODO: Retire and release can use the same sync point here b/c hwc is
439 * restricted to one layer. Once that is no longer true, this will need
440 * to change
441 */
442 hd->timeline_next++;
443 display_contents->retireFenceFd = sw_sync_fence_create(hd->timeline_fd,
444 "drm_hwc_retire", hd->timeline_next);
445 layer->releaseFenceFd = sw_sync_fence_create(hd->timeline_fd,
446 "drm_hwc_release", hd->timeline_next);
Sean Paul9b1bb842015-01-23 01:11:58 -0500447 hd->buf_queue.push(buf);
448
Sean Paul9aa5ad32015-01-22 15:47:54 -0500449 ret = pthread_cond_signal(&hd->set_worker.cond);
Lauri Peltonen132e0102015-02-12 13:54:33 +0200450 if (ret)
Sean Paul9aa5ad32015-01-22 15:47:54 -0500451 ALOGE("Failed to signal set worker %d", ret);
Sean Paul9aa5ad32015-01-22 15:47:54 -0500452
Lauri Peltonen132e0102015-02-12 13:54:33 +0200453 if (pthread_mutex_unlock(&hd->set_worker.lock))
454 ALOGE("Failed to unlock set lock in set()");
Sean Paul9aa5ad32015-01-22 15:47:54 -0500455
Sean Paule0c4c3d2015-01-20 16:56:04 -0500456out:
Lauri Peltonen132e0102015-02-12 13:54:33 +0200457 /* Close input fences. */
458 for (i = 0; i < (int)display_contents->numHwLayers; i++) {
459 layer = &display_contents->hwLayers[i];
460 if (layer->acquireFenceFd >= 0) {
461 close(layer->acquireFenceFd);
462 layer->acquireFenceFd = -1;
463 }
464 }
465 if (display_contents->outbufAcquireFenceFd >= 0) {
466 close(display_contents->outbufAcquireFenceFd);
467 display_contents->outbufAcquireFenceFd = -1;
468 }
Sean Paul9aa5ad32015-01-22 15:47:54 -0500469
Sean Paule0c4c3d2015-01-20 16:56:04 -0500470 return ret;
471}
472
473static int hwc_set(hwc_composer_device_1_t *dev, size_t num_displays,
474 hwc_display_contents_1_t** display_contents)
475{
476 struct hwc_context_t *ctx = (struct hwc_context_t *)&dev->common;
477 int ret = 0, i;
478
Sean Paule0c4c3d2015-01-20 16:56:04 -0500479 for (i = 0; i < (int)num_displays && i < MAX_NUM_DISPLAYS; i++) {
Sean Pauldffca952015-02-04 10:19:55 -0800480 if (display_contents[i])
481 ret = hwc_set_display(ctx, i, display_contents[i]);
Sean Paule0c4c3d2015-01-20 16:56:04 -0500482 }
483
484 return ret;
485}
486
Sean Pauleb9e75c2015-01-25 23:31:30 -0500487static int hwc_wait_for_vsync(struct hwc_drm_display *hd)
Sean Paule0c4c3d2015-01-20 16:56:04 -0500488{
Sean Pauleb9e75c2015-01-25 23:31:30 -0500489 drmVBlank vblank;
490 int ret;
491 uint32_t high_crtc;
492 int64_t timestamp;
493
494 if (hd->active_pipe == -1)
495 return -EINVAL;
496
497 memset(&vblank, 0, sizeof(vblank));
498
499 high_crtc = (hd->active_pipe << DRM_VBLANK_HIGH_CRTC_SHIFT);
500 vblank.request.type = (drmVBlankSeqType)(DRM_VBLANK_RELATIVE |
501 (high_crtc & DRM_VBLANK_HIGH_CRTC_MASK));
502 vblank.request.sequence = 1;
503
504 ret = drmWaitVBlank(hd->ctx->fd, &vblank);
505 if (ret) {
506 ALOGE("Failed to wait for vblank %d", ret);
507 return ret;
508 }
509
510 if (hd->ctx->procs->vsync) {
511 timestamp = vblank.reply.tval_sec * 1000 * 1000 * 1000 +
512 vblank.reply.tval_usec * 1000;
513 hd->ctx->procs->vsync(hd->ctx->procs, hd->display, timestamp);
514 }
515
516 return 0;
517}
518
519static void *hwc_vsync_worker(void *arg)
520{
521 struct hwc_drm_display *hd = (struct hwc_drm_display *)arg;
522 struct hwc_worker *w = &hd->vsync_worker;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500523 int ret;
524
Sean Pauleb9e75c2015-01-25 23:31:30 -0500525 setpriority(PRIO_PROCESS, 0, HAL_PRIORITY_URGENT_DISPLAY);
526
527 do {
528 ret = pthread_mutex_lock(&w->lock);
529 if (ret) {
530 ALOGE("Failed to lock vsync lock %d", ret);
531 return NULL;
532 }
533
534 if (hd->active_pipe == -1) {
535 ALOGE("Pipe is no longer active, disable events");
536 hd->enable_vsync_events = false;
537 }
538
539 if (!hd->enable_vsync_events) {
540 ret = pthread_cond_wait(&w->cond, &w->lock);
541 if (ret) {
542 ALOGE("Failed to wait on vsync cond %d", ret);
543 break;
544 }
545 }
546
547 if (w->exit)
548 break;
549
550 ret = pthread_mutex_unlock(&w->lock);
551 if (ret) {
552 ALOGE("Failed to unlock vsync lock %d", ret);
553 return NULL;
554 }
555
556 if (!hd->enable_vsync_events)
557 continue;
558
559 ret = hwc_wait_for_vsync(hd);
560 if (ret)
561 ALOGE("Failed to wait for vsync %d", ret);
562
563 } while (true);
564
565out:
566 ret = pthread_mutex_unlock(&hd->set_worker.lock);
567 if (ret)
568 ALOGE("Failed to unlock set lock while exiting %d", ret);
569
570 return NULL;
571}
572
573static int hwc_event_control(struct hwc_composer_device_1* dev, int display,
574 int event, int enabled)
575{
576 struct hwc_context_t *ctx = (struct hwc_context_t *)&dev->common;
577 struct hwc_drm_display *hd = NULL;
578 int ret;
579
580 ret = hwc_get_drm_display(ctx, display, &hd);
581 if (ret)
582 return ret;
583
584 if (event != HWC_EVENT_VSYNC || (enabled != 0 && enabled != 1))
585 return -EINVAL;
586
587 if (hd->active_pipe == -1) {
588 ALOGD("Can't service events for display %d, no pipe", display);
589 return -EINVAL;
590 }
591
592 ret = pthread_mutex_lock(&hd->vsync_worker.lock);
593 if (ret) {
594 ALOGE("Failed to lock vsync lock %d", ret);
595 return ret;
596 }
597
598 hd->enable_vsync_events = !!enabled;
599
600 ret = pthread_cond_signal(&hd->vsync_worker.cond);
601 if (ret) {
602 ALOGE("Failed to signal vsync thread %d", ret);
603 goto out;
604 }
605
606 ret = pthread_mutex_unlock(&hd->vsync_worker.lock);
607 if (ret) {
608 ALOGE("Failed to unlock vsync lock %d", ret);
609 return ret;
610 }
611
Sean Paule0c4c3d2015-01-20 16:56:04 -0500612 return 0;
Sean Pauleb9e75c2015-01-25 23:31:30 -0500613
614out:
615 if (pthread_mutex_unlock(&hd->vsync_worker.lock))
616 ALOGE("Failed to unlock vsync worker in error path");
617
618 return ret;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500619}
620
621static int hwc_set_power_mode(struct hwc_composer_device_1* dev, int display,
622 int mode)
623{
624 struct hwc_context_t *ctx = (struct hwc_context_t *)&dev->common;
625 struct hwc_drm_display *hd = NULL;
626 drmModeConnectorPtr c;
627 int ret, i;
628 uint32_t dpms_prop = 0;
629 uint64_t dpms_value = 0;
630
631 ret = hwc_get_drm_display(ctx, display, &hd);
632 if (ret)
633 return ret;
634
635 c = drmModeGetConnector(ctx->fd, hd->connector_id);
636 if (!c) {
637 ALOGE("Failed to get connector %d", display);
638 return -ENODEV;
639 }
640
641 for (i = 0; !dpms_prop && i < c->count_props; i++) {
642 drmModePropertyPtr p;
643
644 p = drmModeGetProperty(ctx->fd, c->props[i]);
645 if (!p)
646 continue;
647
648 if (!strcmp(p->name, "DPMS"))
649 dpms_prop = c->props[i];
650
651 drmModeFreeProperty(p);
652 }
653 if (!dpms_prop) {
654 ALOGE("Failed to get DPMS property from display %d", display);
655 ret = -ENOENT;
656 goto out;
657 }
658
659 switch(mode) {
660 case HWC_POWER_MODE_OFF:
661 dpms_value = DRM_MODE_DPMS_OFF;
662 break;
663
664 /* We can't support dozing right now, so go full on */
665 case HWC_POWER_MODE_DOZE:
666 case HWC_POWER_MODE_DOZE_SUSPEND:
667 case HWC_POWER_MODE_NORMAL:
668 dpms_value = DRM_MODE_DPMS_ON;
669 break;
670 };
671
672 ret = drmModeConnectorSetProperty(ctx->fd, c->connector_id,
673 dpms_prop, dpms_value);
674 if (ret) {
675 ALOGE("Failed to set DPMS property for display %d", display);
676 goto out;
677 }
678
679out:
680 drmModeFreeConnector(c);
681 return ret;
682}
683
684static int hwc_query(struct hwc_composer_device_1 */* dev */, int what,
685 int *value)
686{
687 switch(what) {
688 case HWC_BACKGROUND_LAYER_SUPPORTED:
689 *value = 0; /* TODO: We should do this */
690 break;
691 case HWC_VSYNC_PERIOD:
692 ALOGW("Query for deprecated vsync value, returning 60Hz");
693 *value = 1000 * 1000 * 1000 / 60;
694 break;
695 case HWC_DISPLAY_TYPES_SUPPORTED:
696 *value = HWC_DISPLAY_PRIMARY | HWC_DISPLAY_EXTERNAL;
697 break;
698 }
699 return 0;
700}
701
702static void hwc_register_procs(struct hwc_composer_device_1* dev,
703 hwc_procs_t const* procs)
704{
705 struct hwc_context_t *ctx = (struct hwc_context_t *)&dev->common;
706
707 ctx->procs = procs;
708}
709
710static int hwc_get_display_configs(struct hwc_composer_device_1* dev,
711 int display, uint32_t* configs, size_t* numConfigs)
712{
713 struct hwc_context_t *ctx = (struct hwc_context_t *)&dev->common;
714 struct hwc_drm_display *hd = NULL;
715 drmModeConnectorPtr c;
716 int ret = 0, i;
717
718 if (!*numConfigs)
719 return 0;
720
721 ret = hwc_get_drm_display(ctx, display, &hd);
722 if (ret)
723 return ret;
724
725 c = drmModeGetConnector(ctx->fd, hd->connector_id);
726 if (!c) {
727 ALOGE("Failed to get connector %d", display);
728 return -ENODEV;
729 }
730
Sean Paula4283c52015-02-04 10:08:00 -0800731 if (hd->configs) {
Sean Paule0c4c3d2015-01-20 16:56:04 -0500732 free(hd->configs);
Sean Paula4283c52015-02-04 10:08:00 -0800733 hd->configs = NULL;
734 }
735
736 if (c->connection == DRM_MODE_DISCONNECTED) {
737 ret = -ENODEV;
738 goto out;
739 }
Sean Paule0c4c3d2015-01-20 16:56:04 -0500740
Sean Paule0c4c3d2015-01-20 16:56:04 -0500741 hd->configs = (drmModeModeInfoPtr)calloc(c->count_modes,
742 sizeof(*hd->configs));
743 if (!hd->configs) {
744 ALOGE("Failed to allocate config list for display %d", display);
745 ret = -ENOMEM;
746 hd->num_configs = 0;
747 goto out;
748 }
749
750 for (i = 0; i < c->count_modes; i++) {
751 drmModeModeInfoPtr m = &hd->configs[i];
752
753 memcpy(m, &c->modes[i], sizeof(*m));
754
755 if (i < (int)*numConfigs)
756 configs[i] = i;
757 }
758
759 hd->num_configs = c->count_modes;
760 *numConfigs = MIN(c->count_modes, *numConfigs);
761
762out:
763 drmModeFreeConnector(c);
764 return ret;
765}
766
767static int hwc_check_config_valid(struct hwc_context_t *ctx,
768 drmModeConnectorPtr connector, int display,
769 int config_idx)
770{
771 struct hwc_drm_display *hd = NULL;
772 drmModeModeInfoPtr m = NULL;
773 int ret = 0, i;
774
775 ret = hwc_get_drm_display(ctx, display, &hd);
776 if (ret)
777 return ret;
778
779 /* Make sure the requested config is still valid for the display */
780 for (i = 0; i < connector->count_modes; i++) {
781 if (hwc_mode_is_equal(&connector->modes[i],
782 &hd->configs[config_idx])) {
783 m = &hd->configs[config_idx];
784 break;
785 }
786 }
787 if (!m)
788 return -ENOENT;
789
790 return 0;
791}
792
793static int hwc_get_display_attributes(struct hwc_composer_device_1* dev,
794 int display, uint32_t config, const uint32_t* attributes,
795 int32_t* values)
796{
797 struct hwc_context_t *ctx = (struct hwc_context_t *)&dev->common;
798 struct hwc_drm_display *hd = NULL;
799 drmModeConnectorPtr c;
800 drmModeModeInfoPtr m;
801 int ret, i;
802
803 ret = hwc_get_drm_display(ctx, display, &hd);
804 if (ret)
805 return ret;
806
807 if (config >= hd->num_configs) {
808 ALOGE("Requested config is out-of-bounds %d %d", config,
809 hd->num_configs);
810 return -EINVAL;
811 }
812
813 c = drmModeGetConnector(ctx->fd, hd->connector_id);
814 if (!c) {
815 ALOGE("Failed to get connector %d", display);
816 return -ENODEV;
817 }
818
819 ret = hwc_check_config_valid(ctx, c, display, (int)config);
820 if (ret) {
821 ALOGE("Provided config is no longer valid %u", config);
822 goto out;
823 }
824
825 m = &hd->configs[config];
826 for (i = 0; attributes[i] != HWC_DISPLAY_NO_ATTRIBUTE; i++) {
827 switch(attributes[i]) {
828 case HWC_DISPLAY_VSYNC_PERIOD:
829 values[i] = 1000 * 1000 * 1000 / m->vrefresh;
830 break;
831 case HWC_DISPLAY_WIDTH:
832 values[i] = m->hdisplay;
833 break;
834 case HWC_DISPLAY_HEIGHT:
835 values[i] = m->vdisplay;
836 break;
837 case HWC_DISPLAY_DPI_X:
838 /* Dots per 1000 inches */
839 values[i] = c->mmWidth ?
840 (m->hdisplay * UM_PER_INCH) / c->mmWidth : 0;
841 break;
842 case HWC_DISPLAY_DPI_Y:
843 /* Dots per 1000 inches */
844 values[i] = c->mmHeight ?
845 (m->vdisplay * UM_PER_INCH) / c->mmHeight : 0;
846 break;
847 }
848 }
849
850out:
851 drmModeFreeConnector(c);
852 return ret;
853}
854
855static int hwc_get_active_config(struct hwc_composer_device_1* dev, int display)
856{
857 struct hwc_context_t *ctx = (struct hwc_context_t *)&dev->common;
858 struct hwc_drm_display *hd = NULL;
Sean Paulfa406a12015-02-04 10:05:44 -0800859 int ret, i, index = -1;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500860
861 ret = hwc_get_drm_display(ctx, display, &hd);
862 if (ret)
863 return ret;
864
Sean Paulfa406a12015-02-04 10:05:44 -0800865 /* Find the current mode in the config list */
866 for (i = 0; i < (int)hd->num_configs; i++) {
867 if (hwc_mode_is_equal(&hd->configs[i], &hd->active_mode)) {
868 index = i;
869 break;
870 }
Sean Paule0c4c3d2015-01-20 16:56:04 -0500871 }
872
Sean Paulfa406a12015-02-04 10:05:44 -0800873 return index;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500874}
875
876static bool hwc_crtc_is_bound(struct hwc_context_t *ctx, uint32_t crtc_id)
877{
878 int i;
879
880 for (i = 0; i < MAX_NUM_DISPLAYS; i++) {
881 if (ctx->displays[i].active_crtc == crtc_id)
882 return true;
883 }
884 return false;
885}
886
887static int hwc_try_encoder(struct hwc_context_t *ctx, drmModeResPtr r,
888 uint32_t encoder_id, uint32_t *crtc_id)
889{
890 drmModeEncoderPtr e;
891 int ret, i;
892
893 e = drmModeGetEncoder(ctx->fd, encoder_id);
894 if (!e) {
895 ALOGE("Failed to get encoder for connector %d", encoder_id);
896 return -ENODEV;
897 }
898
899 /* First try to use the currently-bound crtc */
900 if (e->crtc_id) {
901 if (!hwc_crtc_is_bound(ctx, e->crtc_id)) {
902 *crtc_id = e->crtc_id;
903 ret = 0;
904 goto out;
905 }
906 }
907
908 /* Try to find a possible crtc which will work */
909 for (i = 0; i < r->count_crtcs; i++) {
910 if (!(e->possible_crtcs & (1 << i)))
911 continue;
912
913 /* We've already tried this earlier */
914 if (e->crtc_id == r->crtcs[i])
915 continue;
916
917 if (!hwc_crtc_is_bound(ctx, r->crtcs[i])) {
918 *crtc_id = r->crtcs[i];
919 ret = 0;
920 goto out;
921 }
922 }
923
924 /* We can't use the encoder, but nothing went wrong, try another one */
925 ret = -EAGAIN;
926
927out:
928 drmModeFreeEncoder(e);
929 return ret;
930}
931
932static int hwc_set_active_config(struct hwc_composer_device_1* dev, int display,
933 int index)
934{
935 struct hwc_context_t *ctx = (struct hwc_context_t *)&dev->common;
936 struct hwc_drm_display *hd = NULL;
937 drmModeResPtr r = NULL;
938 drmModeConnectorPtr c;
939 uint32_t crtc_id = 0;
940 int ret, i;
941 bool new_crtc, new_encoder;
942
943 ret = hwc_get_drm_display(ctx, display, &hd);
944 if (ret)
945 return ret;
946
947 c = drmModeGetConnector(ctx->fd, hd->connector_id);
948 if (!c) {
949 ALOGE("Failed to get connector %d", display);
950 return -ENODEV;
951 }
952
953 if (c->connection == DRM_MODE_DISCONNECTED) {
954 ALOGE("Tried to configure a disconnected display %d", display);
955 ret = -ENODEV;
956 goto out;
957 }
958
Sean Paulfa406a12015-02-04 10:05:44 -0800959 if (index >= c->count_modes) {
960 ALOGE("Index is out-of-bounds %d/%d", index, c->count_modes);
Sean Paule0c4c3d2015-01-20 16:56:04 -0500961 ret = -ENOENT;
962 goto out;
963 }
964
965 r = drmModeGetResources(ctx->fd);
966 if (!r) {
967 ALOGE("Failed to get drm resources");
968 goto out;
969 }
970
971 /* We no longer have an active_crtc */
972 hd->active_crtc = 0;
Sean Pauleb9e75c2015-01-25 23:31:30 -0500973 hd->active_pipe = -1;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500974
975 /* First, try to use the currently-connected encoder */
976 if (c->encoder_id) {
977 ret = hwc_try_encoder(ctx, r, c->encoder_id, &crtc_id);
978 if (ret && ret != -EAGAIN) {
979 ALOGE("Encoder try failed %d", ret);
980 goto out;
981 }
982 }
983
984 /* We couldn't find a crtc with the attached encoder, try the others */
985 if (!crtc_id) {
986 for (i = 0; i < c->count_encoders; i++) {
987 ret = hwc_try_encoder(ctx, r, c->encoders[i], &crtc_id);
988 if (!ret) {
989 break;
990 } else if (ret != -EAGAIN) {
991 ALOGE("Encoder try failed %d", ret);
992 goto out;
993 }
994 }
995 if (!crtc_id) {
996 ALOGE("Couldn't find valid crtc to modeset");
997 ret = -EINVAL;
998 goto out;
999 }
1000 }
1001
1002 hd->active_crtc = crtc_id;
Sean Paulfa406a12015-02-04 10:05:44 -08001003
1004 memcpy(&hd->active_mode, &hd->configs[index], sizeof(hd->active_mode));
Sean Paule0c4c3d2015-01-20 16:56:04 -05001005
Sean Pauleb9e75c2015-01-25 23:31:30 -05001006 /* Find the pipe corresponding to the crtc_id */
1007 for (i = 0; i < r->count_crtcs; i++) {
1008 /* We've already tried this earlier */
1009 if (r->crtcs[i] == crtc_id) {
1010 hd->active_pipe = i;
1011 break;
1012 }
1013 }
1014 /* This should never happen... hehehe */
1015 if (hd->active_pipe == -1) {
1016 ALOGE("Active crtc was not found in resources!!");
1017 ret = -ENODEV;
1018 goto out;
1019 }
1020
Sean Paule0c4c3d2015-01-20 16:56:04 -05001021 /* TODO: Once we have atomic, set the crtc timing info here */
1022
1023out:
1024 if (r)
1025 drmModeFreeResources(r);
1026
1027 drmModeFreeConnector(c);
1028 return ret;
1029}
1030
Sean Paul9aa5ad32015-01-22 15:47:54 -05001031static int hwc_destroy_worker(struct hwc_worker *worker)
1032{
1033 int ret;
1034
1035 ret = pthread_mutex_lock(&worker->lock);
1036 if (ret) {
1037 ALOGE("Failed to lock in destroy() %d", ret);
1038 return ret;
1039 }
1040
1041 worker->exit = true;
1042
1043 ret |= pthread_cond_signal(&worker->cond);
1044 if (ret)
1045 ALOGE("Failed to signal cond in destroy() %d", ret);
1046
1047 ret |= pthread_mutex_unlock(&worker->lock);
1048 if (ret)
1049 ALOGE("Failed to unlock in destroy() %d", ret);
1050
1051 ret |= pthread_join(worker->thread, NULL);
1052 if (ret && ret != ESRCH)
1053 ALOGE("Failed to join thread in destroy() %d", ret);
1054
1055 return ret;
1056}
1057
1058static void hwc_destroy_display(struct hwc_drm_display *hd)
1059{
1060 int ret;
1061
1062 if (hwc_destroy_worker(&hd->set_worker))
1063 ALOGE("Destroy set worker failed");
Sean Pauleb9e75c2015-01-25 23:31:30 -05001064
1065 if (hwc_destroy_worker(&hd->vsync_worker))
1066 ALOGE("Destroy vsync worker failed");
Sean Paul9aa5ad32015-01-22 15:47:54 -05001067}
1068
Sean Paule0c4c3d2015-01-20 16:56:04 -05001069static int hwc_device_close(struct hw_device_t *dev)
1070{
1071 struct hwc_context_t *ctx = (struct hwc_context_t *)dev;
Sean Paulcd36a9e2015-01-22 18:01:18 -05001072 int ret, i;
Sean Paule0c4c3d2015-01-20 16:56:04 -05001073
Sean Paul9aa5ad32015-01-22 15:47:54 -05001074 for (i = 0; i < MAX_NUM_DISPLAYS; i++)
1075 hwc_destroy_display(&ctx->displays[i]);
1076
1077 drmClose(ctx->fd);
Sean Paulcd36a9e2015-01-22 18:01:18 -05001078
1079 ret = hwc_import_destroy(ctx->import_ctx);
1080 if (ret)
1081 ALOGE("Could not destroy import %d", ret);
1082
Sean Paule0c4c3d2015-01-20 16:56:04 -05001083 free(ctx);
1084
1085 return 0;
1086}
1087
Sean Paul9aa5ad32015-01-22 15:47:54 -05001088static int hwc_initialize_worker(struct hwc_drm_display *hd,
1089 struct hwc_worker *worker, void *(*routine)(void*))
1090{
1091 int ret;
1092
1093 ret = pthread_cond_init(&worker->cond, NULL);
1094 if (ret) {
1095 ALOGE("Failed to create worker condition %d", ret);
1096 return ret;
1097 }
1098
1099 ret = pthread_mutex_init(&worker->lock, NULL);
1100 if (ret) {
1101 ALOGE("Failed to initialize worker lock %d", ret);
1102 goto err_cond;
1103 }
1104
1105 worker->exit = false;
1106
1107 ret = pthread_create(&worker->thread, NULL, routine, hd);
1108 if (ret) {
1109 ALOGE("Could not create worker thread %d", ret);
1110 goto err_lock;
1111 }
1112 return 0;
1113
1114err_lock:
1115 pthread_mutex_destroy(&worker->lock);
1116err_cond:
1117 pthread_cond_destroy(&worker->cond);
1118 return ret;
1119}
1120
Sean Paul24a26e32015-02-04 10:34:47 -08001121/*
1122 * TODO: This function sets the active config to the first one in the list. This
1123 * should be fixed such that it selects the preferred mode for the display, or
1124 * some other, saner, method of choosing the config.
1125 */
1126static int hwc_set_initial_config(struct hwc_drm_display *hd)
1127{
1128 int ret;
1129 uint32_t config;
1130 size_t num_configs = 1;
1131
1132 ret = hwc_get_display_configs(&hd->ctx->device, hd->display, &config,
1133 &num_configs);
Sean Paulaea15c22015-02-09 02:24:11 -05001134 if (ret || !num_configs)
Sean Paul24a26e32015-02-04 10:34:47 -08001135 return 0;
1136
1137 ret = hwc_set_active_config(&hd->ctx->device, hd->display, 0);
1138 if (ret) {
1139 ALOGE("Failed to set active config d=%d ret=%d", hd->display,
1140 ret);
1141 return ret;
1142 }
1143
1144 return ret;
1145}
1146
Sean Paule0c4c3d2015-01-20 16:56:04 -05001147static int hwc_initialize_display(struct hwc_context_t *ctx, int display,
1148 uint32_t connector_id)
1149{
1150 struct hwc_drm_display *hd = NULL;
1151 int ret;
1152
1153 ret = hwc_get_drm_display(ctx, display, &hd);
1154 if (ret)
1155 return ret;
1156
Sean Paul9aa5ad32015-01-22 15:47:54 -05001157 hd->ctx = ctx;
1158 hd->display = display;
Sean Pauleb9e75c2015-01-25 23:31:30 -05001159 hd->active_pipe = -1;
Sean Paulefb20cb2015-02-04 09:29:15 -08001160 hd->initial_modeset_required = true;
Sean Paule0c4c3d2015-01-20 16:56:04 -05001161 hd->connector_id = connector_id;
1162
Sean Paulf1dc1912015-01-24 01:34:31 -05001163 ret = sw_sync_timeline_create();
1164 if (ret < 0) {
1165 ALOGE("Failed to create sw sync timeline %d", ret);
1166 return ret;
1167 }
1168 hd->timeline_fd = ret;
1169
Sean Paul24a26e32015-02-04 10:34:47 -08001170 ret = hwc_set_initial_config(hd);
1171 if (ret) {
1172 ALOGE("Failed to set initial config for d=%d ret=%d", display,
1173 ret);
1174 return ret;
1175 }
1176
Sean Paul9aa5ad32015-01-22 15:47:54 -05001177 ret = hwc_initialize_worker(hd, &hd->set_worker, hwc_set_worker);
1178 if (ret) {
1179 ALOGE("Failed to create set worker %d\n", ret);
1180 return ret;
1181 }
1182
Sean Pauleb9e75c2015-01-25 23:31:30 -05001183 ret = hwc_initialize_worker(hd, &hd->vsync_worker, hwc_vsync_worker);
1184 if (ret) {
1185 ALOGE("Failed to create vsync worker %d", ret);
1186 goto err;
1187 }
1188
Sean Paule0c4c3d2015-01-20 16:56:04 -05001189 return 0;
Sean Pauleb9e75c2015-01-25 23:31:30 -05001190
1191err:
1192 if (hwc_destroy_worker(&hd->set_worker))
1193 ALOGE("Failed to destroy set worker");
1194
1195 return ret;
Sean Paule0c4c3d2015-01-20 16:56:04 -05001196}
1197
1198static int hwc_enumerate_displays(struct hwc_context_t *ctx)
1199{
1200 struct hwc_drm_display *panel_hd;
1201 drmModeResPtr res;
1202 drmModeConnectorPtr *conn_list;
1203 int ret = 0, i, j;
1204
1205 res = drmModeGetResources(ctx->fd);
1206 if (!res) {
1207 ALOGE("Failed to get drm resources");
1208 return -ENODEV;
1209 }
1210
1211 conn_list = (drmModeConnector **)calloc(res->count_connectors,
1212 sizeof(*conn_list));
1213 if (!conn_list) {
1214 ALOGE("Failed to allocate connector list");
1215 ret = -ENOMEM;
1216 goto out;
1217 }
1218
1219 for (i = 0; i < res->count_connectors; i++) {
1220 conn_list[i] = drmModeGetConnector(ctx->fd, res->connectors[i]);
1221 if (!conn_list[i]) {
1222 ALOGE("Failed to get connector %d", res->connectors[i]);
1223 ret = -ENODEV;
1224 goto out;
1225 }
1226 }
1227
1228 ctx->num_displays = 0;
1229
1230 /* Find a connected, panel type connector for display 0 */
1231 for (i = 0; i < res->count_connectors; i++) {
1232 drmModeConnectorPtr c = conn_list[i];
1233
1234 for (j = 0; j < ARRAY_SIZE(panel_types); j++) {
1235 if (c->connector_type == panel_types[j] &&
1236 c->connection == DRM_MODE_CONNECTED)
1237 break;
1238 }
1239 if (j == ARRAY_SIZE(panel_types))
1240 continue;
1241
1242 hwc_initialize_display(ctx, ctx->num_displays, c->connector_id);
1243 ctx->num_displays++;
1244 break;
1245 }
1246
1247 ret = hwc_get_drm_display(ctx, 0, &panel_hd);
1248 if (ret)
1249 goto out;
1250
1251 /* Fill in the other displays */
1252 for (i = 0; i < res->count_connectors; i++) {
1253 drmModeConnectorPtr c = conn_list[i];
1254
1255 if (panel_hd->connector_id == c->connector_id)
1256 continue;
1257
1258 hwc_initialize_display(ctx, ctx->num_displays, c->connector_id);
1259 ctx->num_displays++;
1260 }
1261
1262out:
1263 for (i = 0; i < res->count_connectors; i++) {
1264 if (conn_list[i])
1265 drmModeFreeConnector(conn_list[i]);
1266 }
1267 free(conn_list);
1268
1269 if (res)
1270 drmModeFreeResources(res);
1271
1272 return ret;
1273}
1274
1275static int hwc_device_open(const struct hw_module_t* module, const char* name,
1276 struct hw_device_t** dev)
1277{
1278 int ret = 0;
1279 struct hwc_context_t *ctx;
Lauri Peltonen64717b22015-02-04 16:55:31 +02001280 char path[PROPERTY_VALUE_MAX];
Sean Paule0c4c3d2015-01-20 16:56:04 -05001281
1282 if (strcmp(name, HWC_HARDWARE_COMPOSER)) {
1283 ALOGE("Invalid module name- %s", name);
1284 return -EINVAL;
1285 }
1286
Sean Paul9b1bb842015-01-23 01:11:58 -05001287 ctx = new hwc_context_t();
Sean Paule0c4c3d2015-01-20 16:56:04 -05001288 if (!ctx) {
1289 ALOGE("Failed to allocate hwc context");
1290 return -ENOMEM;
1291 }
1292
Sean Paulcd36a9e2015-01-22 18:01:18 -05001293 ret = hwc_import_init(&ctx->import_ctx);
Sean Paule0c4c3d2015-01-20 16:56:04 -05001294 if (ret) {
Sean Paulcd36a9e2015-01-22 18:01:18 -05001295 ALOGE("Failed to initialize import context");
Sean Paule0c4c3d2015-01-20 16:56:04 -05001296 goto out;
1297 }
1298
Lauri Peltonen64717b22015-02-04 16:55:31 +02001299 property_get("hwc.drm.device", path, HWCOMPOSER_DRM_DEVICE);
Sean Paule0c4c3d2015-01-20 16:56:04 -05001300 /* TODO: Use drmOpenControl here instead */
Lauri Peltonen64717b22015-02-04 16:55:31 +02001301 ctx->fd = open(path, O_RDWR);
Sean Paule0c4c3d2015-01-20 16:56:04 -05001302 if (ctx->fd < 0) {
1303 ALOGE("Failed to open dri- %s", strerror(-errno));
1304 goto out;
1305 }
1306
Sean Paule0c4c3d2015-01-20 16:56:04 -05001307 ret = hwc_enumerate_displays(ctx);
1308 if (ret) {
1309 ALOGE("Failed to enumerate displays: %s", strerror(ret));
1310 goto out;
1311 }
1312
1313 ctx->device.common.tag = HARDWARE_DEVICE_TAG;
1314 ctx->device.common.version = HWC_DEVICE_API_VERSION_1_4;
1315 ctx->device.common.module = const_cast<hw_module_t*>(module);
1316 ctx->device.common.close = hwc_device_close;
1317
1318 ctx->device.prepare = hwc_prepare;
1319 ctx->device.set = hwc_set;
1320 ctx->device.eventControl = hwc_event_control;
1321 ctx->device.setPowerMode = hwc_set_power_mode;
1322 ctx->device.query = hwc_query;
1323 ctx->device.registerProcs = hwc_register_procs;
1324 ctx->device.getDisplayConfigs = hwc_get_display_configs;
1325 ctx->device.getDisplayAttributes = hwc_get_display_attributes;
1326 ctx->device.getActiveConfig = hwc_get_active_config;
1327 ctx->device.setActiveConfig = hwc_set_active_config;
1328 ctx->device.setCursorPositionAsync = NULL; /* TODO: Add cursor */
1329
1330 *dev = &ctx->device.common;
1331
1332 return 0;
1333out:
1334 if (ctx->fd >= 0)
1335 close(ctx->fd);
1336
1337 free(ctx);
1338 return ret;
1339}
1340
1341static struct hw_module_methods_t hwc_module_methods = {
1342 open: hwc_device_open
1343};
1344
1345hwc_module_t HAL_MODULE_INFO_SYM = {
1346 common: {
1347 tag: HARDWARE_MODULE_TAG,
1348 version_major: 1,
1349 version_minor: 0,
1350 id: HWC_HARDWARE_MODULE_ID,
1351 name: "DRM hwcomposer module",
1352 author: "The Android Open Source Project",
1353 methods: &hwc_module_methods,
1354 dso: NULL,
1355 reserved: { 0 },
1356 }
1357};