blob: cf0a8c3a73ef2d65d4827c5b321eefeec39fb74e [file] [log] [blame]
Sean Paule0c4c3d2015-01-20 16:56:04 -05001/*
2 * Copyright (C) 2015 The Android Open Source Project
3 *
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
7 *
8 * http://www.apache.org/licenses/LICENSE-2.0
9 *
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
15 */
16
17#define LOG_TAG "hwcomposer-drm"
18
19#include <fcntl.h>
20#include <errno.h>
21#include <sys/param.h>
Sean Paul9aa5ad32015-01-22 15:47:54 -050022#include <sys/resource.h>
23#include <pthread.h>
Sean Paul9b1bb842015-01-23 01:11:58 -050024#include <queue>
Sean Paule0c4c3d2015-01-20 16:56:04 -050025
26#include <cutils/log.h>
27
28#include <xf86drm.h>
29#include <xf86drmMode.h>
Sean Paule0c4c3d2015-01-20 16:56:04 -050030
31#include <hardware/hardware.h>
32#include <hardware/hwcomposer.h>
33
Sean Paul9aa5ad32015-01-22 15:47:54 -050034#include <sync/sync.h>
Sean Paulf1dc1912015-01-24 01:34:31 -050035#include <sw_sync.h>
Sean Paul9aa5ad32015-01-22 15:47:54 -050036
Sean Paulcd36a9e2015-01-22 18:01:18 -050037#include "drm_hwcomposer.h"
Sean Paule0c4c3d2015-01-20 16:56:04 -050038
39#define ARRAY_SIZE(arr) (int)(sizeof(arr) / sizeof((arr)[0]))
40
41#define HWCOMPOSER_DRM_DEVICE "/dev/dri/card0"
42#define MAX_NUM_DISPLAYS 3
43#define UM_PER_INCH 25400
44
45static const uint32_t panel_types[] = {
46 DRM_MODE_CONNECTOR_LVDS,
47 DRM_MODE_CONNECTOR_eDP,
48 DRM_MODE_CONNECTOR_DSI,
49};
50
Sean Paul9aa5ad32015-01-22 15:47:54 -050051struct hwc_worker {
52 pthread_t thread;
53 pthread_mutex_t lock;
54 pthread_cond_t cond;
55 bool exit;
56};
57
Sean Paule0c4c3d2015-01-20 16:56:04 -050058struct hwc_drm_display {
Sean Paul9aa5ad32015-01-22 15:47:54 -050059 struct hwc_context_t *ctx;
60 int display;
61
Sean Paule0c4c3d2015-01-20 16:56:04 -050062 uint32_t connector_id;
63
64 drmModeModeInfoPtr configs;
65 uint32_t num_configs;
66
Sean Paulfa406a12015-02-04 10:05:44 -080067 drmModeModeInfo active_mode;
Sean Paule0c4c3d2015-01-20 16:56:04 -050068 uint32_t active_crtc;
Sean Pauleb9e75c2015-01-25 23:31:30 -050069 int active_pipe;
Sean Paulefb20cb2015-02-04 09:29:15 -080070 bool initial_modeset_required;
Sean Paul9aa5ad32015-01-22 15:47:54 -050071
72 struct hwc_worker set_worker;
73
Sean Paul9b1bb842015-01-23 01:11:58 -050074 std::queue<struct hwc_drm_bo> buf_queue;
Sean Paul9aa5ad32015-01-22 15:47:54 -050075 struct hwc_drm_bo front;
Sean Paulf1dc1912015-01-24 01:34:31 -050076
77 int timeline_fd;
78 unsigned timeline_next;
Sean Pauleb9e75c2015-01-25 23:31:30 -050079
80 struct hwc_worker vsync_worker;
81 bool enable_vsync_events;
Sean Paule0c4c3d2015-01-20 16:56:04 -050082};
83
84struct hwc_context_t {
85 hwc_composer_device_1_t device;
86
87 int fd;
Sean Paule0c4c3d2015-01-20 16:56:04 -050088
89 hwc_procs_t const *procs;
Sean Paulcd36a9e2015-01-22 18:01:18 -050090 struct hwc_import_context *import_ctx;
Sean Paule0c4c3d2015-01-20 16:56:04 -050091
92 struct hwc_drm_display displays[MAX_NUM_DISPLAYS];
93 int num_displays;
94};
95
96static int hwc_get_drm_display(struct hwc_context_t *ctx, int display,
97 struct hwc_drm_display **hd)
98{
99 if (display >= MAX_NUM_DISPLAYS) {
100 ALOGE("Requested display is out-of-bounds %d %d", display,
101 MAX_NUM_DISPLAYS);
102 return -EINVAL;
103 }
104 *hd = &ctx->displays[display];
105 return 0;
106}
107
108static int hwc_prepare_layer(hwc_layer_1_t *layer)
109{
110 /* TODO: We can't handle background right now, defer to sufaceFlinger */
111 if (layer->compositionType == HWC_BACKGROUND) {
112 layer->compositionType = HWC_FRAMEBUFFER;
113 ALOGV("Can't handle background layers yet");
114
115 /* TODO: Support sideband compositions */
116 } else if (layer->compositionType == HWC_SIDEBAND) {
117 layer->compositionType = HWC_FRAMEBUFFER;
118 ALOGV("Can't handle sideband content yet");
119 }
120
121 layer->hints = 0;
122
123 /* TODO: Handle cursor by setting compositionType=HWC_CURSOR_OVERLAY */
124 if (layer->flags & HWC_IS_CURSOR_LAYER) {
125 ALOGV("Can't handle async cursors yet");
126 }
127
128 /* TODO: Handle transformations */
129 if (layer->transform) {
130 ALOGV("Can't handle transformations yet");
131 }
132
133 /* TODO: Handle blending & plane alpha*/
134 if (layer->blending == HWC_BLENDING_PREMULT ||
135 layer->blending == HWC_BLENDING_COVERAGE) {
136 ALOGV("Can't handle blending yet");
137 }
138
139 /* TODO: Handle cropping & scaling */
140
141 return 0;
142}
143
144static int hwc_prepare(hwc_composer_device_1_t */* dev */, size_t num_displays,
145 hwc_display_contents_1_t** display_contents)
146{
147 int ret = 0, i, j;
148
149 /* TODO: Check flags for HWC_GEOMETRY_CHANGED */
150
151 for (i = 0; i < (int)num_displays && i < MAX_NUM_DISPLAYS; i++) {
Sean Pauldffca952015-02-04 10:19:55 -0800152
153 if (!display_contents[i])
154 continue;
155
Sean Paule0c4c3d2015-01-20 16:56:04 -0500156 for (j = 0; j < (int)display_contents[i]->numHwLayers; j++) {
157 ret = hwc_prepare_layer(
158 &display_contents[i]->hwLayers[j]);
159 if (ret) {
160 ALOGE("Failed to prepare layer %d:%d", j, i);
161 return ret;
162 }
163 }
164 }
165
166 return ret;
167}
168
Sean Paule0c4c3d2015-01-20 16:56:04 -0500169static bool hwc_mode_is_equal(drmModeModeInfoPtr a, drmModeModeInfoPtr b)
170{
171 return a->clock == b->clock &&
172 a->hdisplay == b->hdisplay &&
173 a->hsync_start == b->hsync_start &&
174 a->hsync_end == b->hsync_end &&
175 a->htotal == b->htotal &&
176 a->hskew == b->hskew &&
177 a->vdisplay == b->vdisplay &&
178 a->vsync_start == b->vsync_start &&
179 a->vsync_end == b->vsync_end &&
180 a->vtotal == b->vtotal &&
181 a->vscan == b->vscan &&
182 a->vrefresh == b->vrefresh &&
183 a->flags == b->flags &&
184 a->type == b->type &&
185 !strcmp(a->name, b->name);
186}
187
Sean Paul9aa5ad32015-01-22 15:47:54 -0500188static int hwc_modeset_required(struct hwc_drm_display *hd,
189 bool *modeset_required)
190{
191 drmModeCrtcPtr crtc;
192 drmModeModeInfoPtr m;
193
Sean Paulefb20cb2015-02-04 09:29:15 -0800194 if (hd->initial_modeset_required) {
195 *modeset_required = true;
196 hd->initial_modeset_required = false;
197 return 0;
198 }
199
Sean Paul9aa5ad32015-01-22 15:47:54 -0500200 crtc = drmModeGetCrtc(hd->ctx->fd, hd->active_crtc);
201 if (!crtc) {
202 ALOGE("Failed to get crtc for display %d", hd->display);
203 return -ENODEV;
204 }
205
Sean Paulfa406a12015-02-04 10:05:44 -0800206 m = &hd->active_mode;
Sean Paul9aa5ad32015-01-22 15:47:54 -0500207
208 /* Do a modeset if we haven't done one, or the mode has changed */
209 if (!crtc->mode_valid || !hwc_mode_is_equal(m, &crtc->mode))
210 *modeset_required = true;
211 else
212 *modeset_required = false;
213
214 drmModeFreeCrtc(crtc);
215
216 return 0;
217}
218
219static void hwc_flip_handler(int /* fd */, unsigned int /* sequence */,
220 unsigned int /* tv_sec */, unsigned int /* tv_usec */,
221 void */* user_data */)
222{
223}
224
Sean Paul9b1bb842015-01-23 01:11:58 -0500225static int hwc_flip(struct hwc_drm_display *hd, struct hwc_drm_bo *buf)
Sean Paul9aa5ad32015-01-22 15:47:54 -0500226{
227 fd_set fds;
228 drmEventContext event_context;
229 int ret;
230 bool modeset_required;
231
232 ret = hwc_modeset_required(hd, &modeset_required);
233 if (ret) {
234 ALOGE("Failed to determine if modeset is required %d", ret);
235 return ret;
236 }
237 if (modeset_required) {
Sean Paul9b1bb842015-01-23 01:11:58 -0500238 ret = drmModeSetCrtc(hd->ctx->fd, hd->active_crtc, buf->fb_id,
239 0, 0, &hd->connector_id, 1,
Sean Paulfa406a12015-02-04 10:05:44 -0800240 &hd->active_mode);
Sean Paul9aa5ad32015-01-22 15:47:54 -0500241 if (ret) {
242 ALOGE("Modeset failed for crtc %d",
243 hd->active_crtc);
244 return ret;
245 }
246 return 0;
247 }
248
249 FD_ZERO(&fds);
250 FD_SET(hd->ctx->fd, &fds);
251
252 event_context.version = DRM_EVENT_CONTEXT_VERSION;
253 event_context.page_flip_handler = hwc_flip_handler;
254
Sean Paul9b1bb842015-01-23 01:11:58 -0500255 ret = drmModePageFlip(hd->ctx->fd, hd->active_crtc, buf->fb_id,
Sean Paul9aa5ad32015-01-22 15:47:54 -0500256 DRM_MODE_PAGE_FLIP_EVENT, hd);
257 if (ret) {
258 ALOGE("Failed to flip buffer for crtc %d",
259 hd->active_crtc);
260 return ret;
261 }
262
263 do {
264 ret = select(hd->ctx->fd + 1, &fds, NULL, NULL, NULL);
265 } while (ret == -1 && errno == EINTR);
266
267 if (ret != 1) {
268 ALOGE("Failed waiting for flip to complete\n");
269 return -EINVAL;
270 }
271 drmHandleEvent(hd->ctx->fd, &event_context);
272
273 return 0;
274}
275
Sean Paul3bc48e82015-01-23 01:41:13 -0500276static int hwc_wait_and_set(struct hwc_drm_display *hd,
277 struct hwc_drm_bo *buf)
Sean Paul9aa5ad32015-01-22 15:47:54 -0500278{
Sean Paulaea15c22015-02-09 02:24:11 -0500279 struct drm_gem_close args;
280 int ret, i;
Sean Paul9aa5ad32015-01-22 15:47:54 -0500281
Lauri Peltonen132e0102015-02-12 13:54:33 +0200282 if (buf->acquire_fence_fd >= 0) {
283 ret = sync_wait(buf->acquire_fence_fd, -1);
284 close(buf->acquire_fence_fd);
285 buf->acquire_fence_fd = -1;
286 if (ret) {
287 ALOGE("Failed to wait for acquire %d", ret);
288 return ret;
289 }
290 }
291
Sean Paulaea15c22015-02-09 02:24:11 -0500292 ret = drmModeAddFB2(hd->ctx->fd, buf->width,
Sean Paul3bc48e82015-01-23 01:41:13 -0500293 buf->height, buf->format, buf->gem_handles, buf->pitches,
294 buf->offsets, &buf->fb_id, 0);
Sean Paul9aa5ad32015-01-22 15:47:54 -0500295 if (ret) {
296 ALOGE("could not create drm fb %d", ret);
297 return ret;
298 }
299
Sean Paul3bc48e82015-01-23 01:41:13 -0500300 ret = hwc_flip(hd, buf);
Sean Paul9aa5ad32015-01-22 15:47:54 -0500301 if (ret) {
302 ALOGE("Failed to perform flip\n");
303 return ret;
304 }
305
306 if (hd->front.fb_id) {
Sean Paulaea15c22015-02-09 02:24:11 -0500307 ret = drmModeRmFB(hd->ctx->fd, hd->front.fb_id);
Sean Paul9aa5ad32015-01-22 15:47:54 -0500308 if (ret) {
309 ALOGE("Failed to rm fb from front %d", ret);
310 return ret;
311 }
312 }
Sean Paulaea15c22015-02-09 02:24:11 -0500313
314 memset(&args, 0, sizeof(args));
315 for (i = 0; i < ARRAY_SIZE(hd->front.gem_handles); i++) {
316 if (!hd->front.gem_handles[i])
317 continue;
318 args.handle = hd->front.gem_handles[i];
319 drmIoctl(hd->ctx->fd, DRM_IOCTL_GEM_CLOSE, &args);
320 }
Sean Paul3bc48e82015-01-23 01:41:13 -0500321 hd->front = *buf;
322
Sean Paul9aa5ad32015-01-22 15:47:54 -0500323 return ret;
324}
325
326static void *hwc_set_worker(void *arg)
327{
328 struct hwc_drm_display *hd = (struct hwc_drm_display *)arg;
329 int ret;
330
331 setpriority(PRIO_PROCESS, 0, HAL_PRIORITY_URGENT_DISPLAY);
332
Sean Paul9aa5ad32015-01-22 15:47:54 -0500333 do {
Sean Paul3bc48e82015-01-23 01:41:13 -0500334 struct hwc_drm_bo buf;
335
336 ret = pthread_mutex_lock(&hd->set_worker.lock);
Sean Paul9aa5ad32015-01-22 15:47:54 -0500337 if (ret) {
Sean Paul3bc48e82015-01-23 01:41:13 -0500338 ALOGE("Failed to lock set lock %d", ret);
339 return NULL;
Sean Paul9aa5ad32015-01-22 15:47:54 -0500340 }
341
Sean Paul3bc48e82015-01-23 01:41:13 -0500342 if (hd->set_worker.exit)
343 goto out;
344
345 if (hd->buf_queue.empty()) {
346 ret = pthread_cond_wait(&hd->set_worker.cond,
347 &hd->set_worker.lock);
348 if (ret) {
349 ALOGE("Failed to wait on condition %d", ret);
350 goto out;
351 }
352 }
353
354 buf = hd->buf_queue.front();
355 hd->buf_queue.pop();
356
357 ret = pthread_mutex_unlock(&hd->set_worker.lock);
358 if (ret) {
359 ALOGE("Failed to unlock set lock %d", ret);
360 return NULL;
361 }
362
363 ret = hwc_wait_and_set(hd, &buf);
Sean Paul9aa5ad32015-01-22 15:47:54 -0500364 if (ret)
365 ALOGE("Failed to wait and set %d", ret);
Sean Paulf1dc1912015-01-24 01:34:31 -0500366
367 ret = sw_sync_timeline_inc(hd->timeline_fd, 1);
368 if (ret)
369 ALOGE("Failed to increment sync timeline %d", ret);
Sean Paul9aa5ad32015-01-22 15:47:54 -0500370 } while (true);
371
Sean Paul3bc48e82015-01-23 01:41:13 -0500372out:
Sean Paul9aa5ad32015-01-22 15:47:54 -0500373 ret = pthread_mutex_unlock(&hd->set_worker.lock);
Sean Paul3bc48e82015-01-23 01:41:13 -0500374 if (ret)
375 ALOGE("Failed to unlock set lock while exiting %d", ret);
Sean Paul9aa5ad32015-01-22 15:47:54 -0500376
377 return NULL;
378}
379
Sean Paule0c4c3d2015-01-20 16:56:04 -0500380static int hwc_set_display(hwc_context_t *ctx, int display,
381 hwc_display_contents_1_t* display_contents)
382{
383 struct hwc_drm_display *hd = NULL;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500384 hwc_layer_1_t *layer = NULL;
Sean Paul9b1bb842015-01-23 01:11:58 -0500385 struct hwc_drm_bo buf;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500386 int ret, i;
Sean Paul9aa5ad32015-01-22 15:47:54 -0500387 uint32_t fb_id;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500388
Sean Paul9b1bb842015-01-23 01:11:58 -0500389 memset(&buf, 0, sizeof(buf));
390
Sean Paule0c4c3d2015-01-20 16:56:04 -0500391 ret = hwc_get_drm_display(ctx, display, &hd);
392 if (ret)
Lauri Peltonen132e0102015-02-12 13:54:33 +0200393 goto out;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500394
395 if (!hd->active_crtc) {
396 ALOGE("There is no active crtc for display %d", display);
Lauri Peltonen132e0102015-02-12 13:54:33 +0200397 ret = -ENOENT;
398 goto out;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500399 }
400
401 /*
402 * TODO: We can only support one hw layer atm, so choose either the
403 * first one or the framebuffer target.
404 */
405 if (!display_contents->numHwLayers) {
406 return 0;
407 } else if (display_contents->numHwLayers == 1) {
408 layer = &display_contents->hwLayers[0];
409 } else {
410 for (i = 0; i < (int)display_contents->numHwLayers; i++) {
411 layer = &display_contents->hwLayers[i];
412 if (layer->compositionType == HWC_FRAMEBUFFER_TARGET)
413 break;
414 }
415 if (i == (int)display_contents->numHwLayers) {
416 ALOGE("Could not find a suitable layer for display %d",
417 display);
418 }
419 }
420
Sean Paul3bc48e82015-01-23 01:41:13 -0500421 ret = hwc_create_bo_from_import(ctx->fd, ctx->import_ctx, layer->handle,
422 &buf);
423 if (ret) {
424 ALOGE("Failed to import handle to drm bo %d", ret);
Lauri Peltonen132e0102015-02-12 13:54:33 +0200425 goto out;
Sean Paul3bc48e82015-01-23 01:41:13 -0500426 }
427 buf.acquire_fence_fd = layer->acquireFenceFd;
Lauri Peltonen132e0102015-02-12 13:54:33 +0200428 layer->acquireFenceFd = -1;
Sean Paul3bc48e82015-01-23 01:41:13 -0500429
Sean Paul9aa5ad32015-01-22 15:47:54 -0500430 ret = pthread_mutex_lock(&hd->set_worker.lock);
Sean Paule0c4c3d2015-01-20 16:56:04 -0500431 if (ret) {
Sean Paul9aa5ad32015-01-22 15:47:54 -0500432 ALOGE("Failed to lock set lock in set() %d", ret);
Lauri Peltonen132e0102015-02-12 13:54:33 +0200433 goto out;
Sean Paul9aa5ad32015-01-22 15:47:54 -0500434 }
Sean Paulf1dc1912015-01-24 01:34:31 -0500435
436 /*
437 * TODO: Retire and release can use the same sync point here b/c hwc is
438 * restricted to one layer. Once that is no longer true, this will need
439 * to change
440 */
441 hd->timeline_next++;
442 display_contents->retireFenceFd = sw_sync_fence_create(hd->timeline_fd,
443 "drm_hwc_retire", hd->timeline_next);
444 layer->releaseFenceFd = sw_sync_fence_create(hd->timeline_fd,
445 "drm_hwc_release", hd->timeline_next);
Sean Paul9b1bb842015-01-23 01:11:58 -0500446 hd->buf_queue.push(buf);
447
Sean Paul9aa5ad32015-01-22 15:47:54 -0500448 ret = pthread_cond_signal(&hd->set_worker.cond);
Lauri Peltonen132e0102015-02-12 13:54:33 +0200449 if (ret)
Sean Paul9aa5ad32015-01-22 15:47:54 -0500450 ALOGE("Failed to signal set worker %d", ret);
Sean Paul9aa5ad32015-01-22 15:47:54 -0500451
Lauri Peltonen132e0102015-02-12 13:54:33 +0200452 if (pthread_mutex_unlock(&hd->set_worker.lock))
453 ALOGE("Failed to unlock set lock in set()");
Sean Paul9aa5ad32015-01-22 15:47:54 -0500454
Sean Paule0c4c3d2015-01-20 16:56:04 -0500455out:
Lauri Peltonen132e0102015-02-12 13:54:33 +0200456 /* Close input fences. */
457 for (i = 0; i < (int)display_contents->numHwLayers; i++) {
458 layer = &display_contents->hwLayers[i];
459 if (layer->acquireFenceFd >= 0) {
460 close(layer->acquireFenceFd);
461 layer->acquireFenceFd = -1;
462 }
463 }
464 if (display_contents->outbufAcquireFenceFd >= 0) {
465 close(display_contents->outbufAcquireFenceFd);
466 display_contents->outbufAcquireFenceFd = -1;
467 }
Sean Paul9aa5ad32015-01-22 15:47:54 -0500468
Sean Paule0c4c3d2015-01-20 16:56:04 -0500469 return ret;
470}
471
472static int hwc_set(hwc_composer_device_1_t *dev, size_t num_displays,
473 hwc_display_contents_1_t** display_contents)
474{
475 struct hwc_context_t *ctx = (struct hwc_context_t *)&dev->common;
476 int ret = 0, i;
477
Sean Paule0c4c3d2015-01-20 16:56:04 -0500478 for (i = 0; i < (int)num_displays && i < MAX_NUM_DISPLAYS; i++) {
Sean Pauldffca952015-02-04 10:19:55 -0800479 if (display_contents[i])
480 ret = hwc_set_display(ctx, i, display_contents[i]);
Sean Paule0c4c3d2015-01-20 16:56:04 -0500481 }
482
483 return ret;
484}
485
Sean Pauleb9e75c2015-01-25 23:31:30 -0500486static int hwc_wait_for_vsync(struct hwc_drm_display *hd)
Sean Paule0c4c3d2015-01-20 16:56:04 -0500487{
Sean Pauleb9e75c2015-01-25 23:31:30 -0500488 drmVBlank vblank;
489 int ret;
490 uint32_t high_crtc;
491 int64_t timestamp;
492
493 if (hd->active_pipe == -1)
494 return -EINVAL;
495
496 memset(&vblank, 0, sizeof(vblank));
497
498 high_crtc = (hd->active_pipe << DRM_VBLANK_HIGH_CRTC_SHIFT);
499 vblank.request.type = (drmVBlankSeqType)(DRM_VBLANK_RELATIVE |
500 (high_crtc & DRM_VBLANK_HIGH_CRTC_MASK));
501 vblank.request.sequence = 1;
502
503 ret = drmWaitVBlank(hd->ctx->fd, &vblank);
504 if (ret) {
505 ALOGE("Failed to wait for vblank %d", ret);
506 return ret;
507 }
508
509 if (hd->ctx->procs->vsync) {
510 timestamp = vblank.reply.tval_sec * 1000 * 1000 * 1000 +
511 vblank.reply.tval_usec * 1000;
512 hd->ctx->procs->vsync(hd->ctx->procs, hd->display, timestamp);
513 }
514
515 return 0;
516}
517
518static void *hwc_vsync_worker(void *arg)
519{
520 struct hwc_drm_display *hd = (struct hwc_drm_display *)arg;
521 struct hwc_worker *w = &hd->vsync_worker;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500522 int ret;
523
Sean Pauleb9e75c2015-01-25 23:31:30 -0500524 setpriority(PRIO_PROCESS, 0, HAL_PRIORITY_URGENT_DISPLAY);
525
526 do {
527 ret = pthread_mutex_lock(&w->lock);
528 if (ret) {
529 ALOGE("Failed to lock vsync lock %d", ret);
530 return NULL;
531 }
532
533 if (hd->active_pipe == -1) {
534 ALOGE("Pipe is no longer active, disable events");
535 hd->enable_vsync_events = false;
536 }
537
538 if (!hd->enable_vsync_events) {
539 ret = pthread_cond_wait(&w->cond, &w->lock);
540 if (ret) {
541 ALOGE("Failed to wait on vsync cond %d", ret);
542 break;
543 }
544 }
545
546 if (w->exit)
547 break;
548
549 ret = pthread_mutex_unlock(&w->lock);
550 if (ret) {
551 ALOGE("Failed to unlock vsync lock %d", ret);
552 return NULL;
553 }
554
555 if (!hd->enable_vsync_events)
556 continue;
557
558 ret = hwc_wait_for_vsync(hd);
559 if (ret)
560 ALOGE("Failed to wait for vsync %d", ret);
561
562 } while (true);
563
564out:
565 ret = pthread_mutex_unlock(&hd->set_worker.lock);
566 if (ret)
567 ALOGE("Failed to unlock set lock while exiting %d", ret);
568
569 return NULL;
570}
571
572static int hwc_event_control(struct hwc_composer_device_1* dev, int display,
573 int event, int enabled)
574{
575 struct hwc_context_t *ctx = (struct hwc_context_t *)&dev->common;
576 struct hwc_drm_display *hd = NULL;
577 int ret;
578
579 ret = hwc_get_drm_display(ctx, display, &hd);
580 if (ret)
581 return ret;
582
583 if (event != HWC_EVENT_VSYNC || (enabled != 0 && enabled != 1))
584 return -EINVAL;
585
586 if (hd->active_pipe == -1) {
587 ALOGD("Can't service events for display %d, no pipe", display);
588 return -EINVAL;
589 }
590
591 ret = pthread_mutex_lock(&hd->vsync_worker.lock);
592 if (ret) {
593 ALOGE("Failed to lock vsync lock %d", ret);
594 return ret;
595 }
596
597 hd->enable_vsync_events = !!enabled;
598
599 ret = pthread_cond_signal(&hd->vsync_worker.cond);
600 if (ret) {
601 ALOGE("Failed to signal vsync thread %d", ret);
602 goto out;
603 }
604
605 ret = pthread_mutex_unlock(&hd->vsync_worker.lock);
606 if (ret) {
607 ALOGE("Failed to unlock vsync lock %d", ret);
608 return ret;
609 }
610
Sean Paule0c4c3d2015-01-20 16:56:04 -0500611 return 0;
Sean Pauleb9e75c2015-01-25 23:31:30 -0500612
613out:
614 if (pthread_mutex_unlock(&hd->vsync_worker.lock))
615 ALOGE("Failed to unlock vsync worker in error path");
616
617 return ret;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500618}
619
620static int hwc_set_power_mode(struct hwc_composer_device_1* dev, int display,
621 int mode)
622{
623 struct hwc_context_t *ctx = (struct hwc_context_t *)&dev->common;
624 struct hwc_drm_display *hd = NULL;
625 drmModeConnectorPtr c;
626 int ret, i;
627 uint32_t dpms_prop = 0;
628 uint64_t dpms_value = 0;
629
630 ret = hwc_get_drm_display(ctx, display, &hd);
631 if (ret)
632 return ret;
633
634 c = drmModeGetConnector(ctx->fd, hd->connector_id);
635 if (!c) {
636 ALOGE("Failed to get connector %d", display);
637 return -ENODEV;
638 }
639
640 for (i = 0; !dpms_prop && i < c->count_props; i++) {
641 drmModePropertyPtr p;
642
643 p = drmModeGetProperty(ctx->fd, c->props[i]);
644 if (!p)
645 continue;
646
647 if (!strcmp(p->name, "DPMS"))
648 dpms_prop = c->props[i];
649
650 drmModeFreeProperty(p);
651 }
652 if (!dpms_prop) {
653 ALOGE("Failed to get DPMS property from display %d", display);
654 ret = -ENOENT;
655 goto out;
656 }
657
658 switch(mode) {
659 case HWC_POWER_MODE_OFF:
660 dpms_value = DRM_MODE_DPMS_OFF;
661 break;
662
663 /* We can't support dozing right now, so go full on */
664 case HWC_POWER_MODE_DOZE:
665 case HWC_POWER_MODE_DOZE_SUSPEND:
666 case HWC_POWER_MODE_NORMAL:
667 dpms_value = DRM_MODE_DPMS_ON;
668 break;
669 };
670
671 ret = drmModeConnectorSetProperty(ctx->fd, c->connector_id,
672 dpms_prop, dpms_value);
673 if (ret) {
674 ALOGE("Failed to set DPMS property for display %d", display);
675 goto out;
676 }
677
678out:
679 drmModeFreeConnector(c);
680 return ret;
681}
682
683static int hwc_query(struct hwc_composer_device_1 */* dev */, int what,
684 int *value)
685{
686 switch(what) {
687 case HWC_BACKGROUND_LAYER_SUPPORTED:
688 *value = 0; /* TODO: We should do this */
689 break;
690 case HWC_VSYNC_PERIOD:
691 ALOGW("Query for deprecated vsync value, returning 60Hz");
692 *value = 1000 * 1000 * 1000 / 60;
693 break;
694 case HWC_DISPLAY_TYPES_SUPPORTED:
695 *value = HWC_DISPLAY_PRIMARY | HWC_DISPLAY_EXTERNAL;
696 break;
697 }
698 return 0;
699}
700
701static void hwc_register_procs(struct hwc_composer_device_1* dev,
702 hwc_procs_t const* procs)
703{
704 struct hwc_context_t *ctx = (struct hwc_context_t *)&dev->common;
705
706 ctx->procs = procs;
707}
708
709static int hwc_get_display_configs(struct hwc_composer_device_1* dev,
710 int display, uint32_t* configs, size_t* numConfigs)
711{
712 struct hwc_context_t *ctx = (struct hwc_context_t *)&dev->common;
713 struct hwc_drm_display *hd = NULL;
714 drmModeConnectorPtr c;
715 int ret = 0, i;
716
717 if (!*numConfigs)
718 return 0;
719
720 ret = hwc_get_drm_display(ctx, display, &hd);
721 if (ret)
722 return ret;
723
724 c = drmModeGetConnector(ctx->fd, hd->connector_id);
725 if (!c) {
726 ALOGE("Failed to get connector %d", display);
727 return -ENODEV;
728 }
729
Sean Paula4283c52015-02-04 10:08:00 -0800730 if (hd->configs) {
Sean Paule0c4c3d2015-01-20 16:56:04 -0500731 free(hd->configs);
Sean Paula4283c52015-02-04 10:08:00 -0800732 hd->configs = NULL;
733 }
734
735 if (c->connection == DRM_MODE_DISCONNECTED) {
736 ret = -ENODEV;
737 goto out;
738 }
Sean Paule0c4c3d2015-01-20 16:56:04 -0500739
Sean Paule0c4c3d2015-01-20 16:56:04 -0500740 hd->configs = (drmModeModeInfoPtr)calloc(c->count_modes,
741 sizeof(*hd->configs));
742 if (!hd->configs) {
743 ALOGE("Failed to allocate config list for display %d", display);
744 ret = -ENOMEM;
745 hd->num_configs = 0;
746 goto out;
747 }
748
749 for (i = 0; i < c->count_modes; i++) {
750 drmModeModeInfoPtr m = &hd->configs[i];
751
752 memcpy(m, &c->modes[i], sizeof(*m));
753
754 if (i < (int)*numConfigs)
755 configs[i] = i;
756 }
757
758 hd->num_configs = c->count_modes;
759 *numConfigs = MIN(c->count_modes, *numConfigs);
760
761out:
762 drmModeFreeConnector(c);
763 return ret;
764}
765
766static int hwc_check_config_valid(struct hwc_context_t *ctx,
767 drmModeConnectorPtr connector, int display,
768 int config_idx)
769{
770 struct hwc_drm_display *hd = NULL;
771 drmModeModeInfoPtr m = NULL;
772 int ret = 0, i;
773
774 ret = hwc_get_drm_display(ctx, display, &hd);
775 if (ret)
776 return ret;
777
778 /* Make sure the requested config is still valid for the display */
779 for (i = 0; i < connector->count_modes; i++) {
780 if (hwc_mode_is_equal(&connector->modes[i],
781 &hd->configs[config_idx])) {
782 m = &hd->configs[config_idx];
783 break;
784 }
785 }
786 if (!m)
787 return -ENOENT;
788
789 return 0;
790}
791
792static int hwc_get_display_attributes(struct hwc_composer_device_1* dev,
793 int display, uint32_t config, const uint32_t* attributes,
794 int32_t* values)
795{
796 struct hwc_context_t *ctx = (struct hwc_context_t *)&dev->common;
797 struct hwc_drm_display *hd = NULL;
798 drmModeConnectorPtr c;
799 drmModeModeInfoPtr m;
800 int ret, i;
801
802 ret = hwc_get_drm_display(ctx, display, &hd);
803 if (ret)
804 return ret;
805
806 if (config >= hd->num_configs) {
807 ALOGE("Requested config is out-of-bounds %d %d", config,
808 hd->num_configs);
809 return -EINVAL;
810 }
811
812 c = drmModeGetConnector(ctx->fd, hd->connector_id);
813 if (!c) {
814 ALOGE("Failed to get connector %d", display);
815 return -ENODEV;
816 }
817
818 ret = hwc_check_config_valid(ctx, c, display, (int)config);
819 if (ret) {
820 ALOGE("Provided config is no longer valid %u", config);
821 goto out;
822 }
823
824 m = &hd->configs[config];
825 for (i = 0; attributes[i] != HWC_DISPLAY_NO_ATTRIBUTE; i++) {
826 switch(attributes[i]) {
827 case HWC_DISPLAY_VSYNC_PERIOD:
828 values[i] = 1000 * 1000 * 1000 / m->vrefresh;
829 break;
830 case HWC_DISPLAY_WIDTH:
831 values[i] = m->hdisplay;
832 break;
833 case HWC_DISPLAY_HEIGHT:
834 values[i] = m->vdisplay;
835 break;
836 case HWC_DISPLAY_DPI_X:
837 /* Dots per 1000 inches */
838 values[i] = c->mmWidth ?
839 (m->hdisplay * UM_PER_INCH) / c->mmWidth : 0;
840 break;
841 case HWC_DISPLAY_DPI_Y:
842 /* Dots per 1000 inches */
843 values[i] = c->mmHeight ?
844 (m->vdisplay * UM_PER_INCH) / c->mmHeight : 0;
845 break;
846 }
847 }
848
849out:
850 drmModeFreeConnector(c);
851 return ret;
852}
853
854static int hwc_get_active_config(struct hwc_composer_device_1* dev, int display)
855{
856 struct hwc_context_t *ctx = (struct hwc_context_t *)&dev->common;
857 struct hwc_drm_display *hd = NULL;
Sean Paulfa406a12015-02-04 10:05:44 -0800858 int ret, i, index = -1;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500859
860 ret = hwc_get_drm_display(ctx, display, &hd);
861 if (ret)
862 return ret;
863
Sean Paulfa406a12015-02-04 10:05:44 -0800864 /* Find the current mode in the config list */
865 for (i = 0; i < (int)hd->num_configs; i++) {
866 if (hwc_mode_is_equal(&hd->configs[i], &hd->active_mode)) {
867 index = i;
868 break;
869 }
Sean Paule0c4c3d2015-01-20 16:56:04 -0500870 }
871
Sean Paulfa406a12015-02-04 10:05:44 -0800872 return index;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500873}
874
875static bool hwc_crtc_is_bound(struct hwc_context_t *ctx, uint32_t crtc_id)
876{
877 int i;
878
879 for (i = 0; i < MAX_NUM_DISPLAYS; i++) {
880 if (ctx->displays[i].active_crtc == crtc_id)
881 return true;
882 }
883 return false;
884}
885
886static int hwc_try_encoder(struct hwc_context_t *ctx, drmModeResPtr r,
887 uint32_t encoder_id, uint32_t *crtc_id)
888{
889 drmModeEncoderPtr e;
890 int ret, i;
891
892 e = drmModeGetEncoder(ctx->fd, encoder_id);
893 if (!e) {
894 ALOGE("Failed to get encoder for connector %d", encoder_id);
895 return -ENODEV;
896 }
897
898 /* First try to use the currently-bound crtc */
899 if (e->crtc_id) {
900 if (!hwc_crtc_is_bound(ctx, e->crtc_id)) {
901 *crtc_id = e->crtc_id;
902 ret = 0;
903 goto out;
904 }
905 }
906
907 /* Try to find a possible crtc which will work */
908 for (i = 0; i < r->count_crtcs; i++) {
909 if (!(e->possible_crtcs & (1 << i)))
910 continue;
911
912 /* We've already tried this earlier */
913 if (e->crtc_id == r->crtcs[i])
914 continue;
915
916 if (!hwc_crtc_is_bound(ctx, r->crtcs[i])) {
917 *crtc_id = r->crtcs[i];
918 ret = 0;
919 goto out;
920 }
921 }
922
923 /* We can't use the encoder, but nothing went wrong, try another one */
924 ret = -EAGAIN;
925
926out:
927 drmModeFreeEncoder(e);
928 return ret;
929}
930
931static int hwc_set_active_config(struct hwc_composer_device_1* dev, int display,
932 int index)
933{
934 struct hwc_context_t *ctx = (struct hwc_context_t *)&dev->common;
935 struct hwc_drm_display *hd = NULL;
936 drmModeResPtr r = NULL;
937 drmModeConnectorPtr c;
938 uint32_t crtc_id = 0;
939 int ret, i;
940 bool new_crtc, new_encoder;
941
942 ret = hwc_get_drm_display(ctx, display, &hd);
943 if (ret)
944 return ret;
945
946 c = drmModeGetConnector(ctx->fd, hd->connector_id);
947 if (!c) {
948 ALOGE("Failed to get connector %d", display);
949 return -ENODEV;
950 }
951
952 if (c->connection == DRM_MODE_DISCONNECTED) {
953 ALOGE("Tried to configure a disconnected display %d", display);
954 ret = -ENODEV;
955 goto out;
956 }
957
Sean Paulfa406a12015-02-04 10:05:44 -0800958 if (index >= c->count_modes) {
959 ALOGE("Index is out-of-bounds %d/%d", index, c->count_modes);
Sean Paule0c4c3d2015-01-20 16:56:04 -0500960 ret = -ENOENT;
961 goto out;
962 }
963
964 r = drmModeGetResources(ctx->fd);
965 if (!r) {
966 ALOGE("Failed to get drm resources");
967 goto out;
968 }
969
970 /* We no longer have an active_crtc */
971 hd->active_crtc = 0;
Sean Pauleb9e75c2015-01-25 23:31:30 -0500972 hd->active_pipe = -1;
Sean Paule0c4c3d2015-01-20 16:56:04 -0500973
974 /* First, try to use the currently-connected encoder */
975 if (c->encoder_id) {
976 ret = hwc_try_encoder(ctx, r, c->encoder_id, &crtc_id);
977 if (ret && ret != -EAGAIN) {
978 ALOGE("Encoder try failed %d", ret);
979 goto out;
980 }
981 }
982
983 /* We couldn't find a crtc with the attached encoder, try the others */
984 if (!crtc_id) {
985 for (i = 0; i < c->count_encoders; i++) {
986 ret = hwc_try_encoder(ctx, r, c->encoders[i], &crtc_id);
987 if (!ret) {
988 break;
989 } else if (ret != -EAGAIN) {
990 ALOGE("Encoder try failed %d", ret);
991 goto out;
992 }
993 }
994 if (!crtc_id) {
995 ALOGE("Couldn't find valid crtc to modeset");
996 ret = -EINVAL;
997 goto out;
998 }
999 }
1000
1001 hd->active_crtc = crtc_id;
Sean Paulfa406a12015-02-04 10:05:44 -08001002
1003 memcpy(&hd->active_mode, &hd->configs[index], sizeof(hd->active_mode));
Sean Paule0c4c3d2015-01-20 16:56:04 -05001004
Sean Pauleb9e75c2015-01-25 23:31:30 -05001005 /* Find the pipe corresponding to the crtc_id */
1006 for (i = 0; i < r->count_crtcs; i++) {
1007 /* We've already tried this earlier */
1008 if (r->crtcs[i] == crtc_id) {
1009 hd->active_pipe = i;
1010 break;
1011 }
1012 }
1013 /* This should never happen... hehehe */
1014 if (hd->active_pipe == -1) {
1015 ALOGE("Active crtc was not found in resources!!");
1016 ret = -ENODEV;
1017 goto out;
1018 }
1019
Sean Paule0c4c3d2015-01-20 16:56:04 -05001020 /* TODO: Once we have atomic, set the crtc timing info here */
1021
1022out:
1023 if (r)
1024 drmModeFreeResources(r);
1025
1026 drmModeFreeConnector(c);
1027 return ret;
1028}
1029
Sean Paul9aa5ad32015-01-22 15:47:54 -05001030static int hwc_destroy_worker(struct hwc_worker *worker)
1031{
1032 int ret;
1033
1034 ret = pthread_mutex_lock(&worker->lock);
1035 if (ret) {
1036 ALOGE("Failed to lock in destroy() %d", ret);
1037 return ret;
1038 }
1039
1040 worker->exit = true;
1041
1042 ret |= pthread_cond_signal(&worker->cond);
1043 if (ret)
1044 ALOGE("Failed to signal cond in destroy() %d", ret);
1045
1046 ret |= pthread_mutex_unlock(&worker->lock);
1047 if (ret)
1048 ALOGE("Failed to unlock in destroy() %d", ret);
1049
1050 ret |= pthread_join(worker->thread, NULL);
1051 if (ret && ret != ESRCH)
1052 ALOGE("Failed to join thread in destroy() %d", ret);
1053
1054 return ret;
1055}
1056
1057static void hwc_destroy_display(struct hwc_drm_display *hd)
1058{
1059 int ret;
1060
1061 if (hwc_destroy_worker(&hd->set_worker))
1062 ALOGE("Destroy set worker failed");
Sean Pauleb9e75c2015-01-25 23:31:30 -05001063
1064 if (hwc_destroy_worker(&hd->vsync_worker))
1065 ALOGE("Destroy vsync worker failed");
Sean Paul9aa5ad32015-01-22 15:47:54 -05001066}
1067
Sean Paule0c4c3d2015-01-20 16:56:04 -05001068static int hwc_device_close(struct hw_device_t *dev)
1069{
1070 struct hwc_context_t *ctx = (struct hwc_context_t *)dev;
Sean Paulcd36a9e2015-01-22 18:01:18 -05001071 int ret, i;
Sean Paule0c4c3d2015-01-20 16:56:04 -05001072
Sean Paul9aa5ad32015-01-22 15:47:54 -05001073 for (i = 0; i < MAX_NUM_DISPLAYS; i++)
1074 hwc_destroy_display(&ctx->displays[i]);
1075
1076 drmClose(ctx->fd);
Sean Paulcd36a9e2015-01-22 18:01:18 -05001077
1078 ret = hwc_import_destroy(ctx->import_ctx);
1079 if (ret)
1080 ALOGE("Could not destroy import %d", ret);
1081
Sean Paule0c4c3d2015-01-20 16:56:04 -05001082 free(ctx);
1083
1084 return 0;
1085}
1086
Sean Paul9aa5ad32015-01-22 15:47:54 -05001087static int hwc_initialize_worker(struct hwc_drm_display *hd,
1088 struct hwc_worker *worker, void *(*routine)(void*))
1089{
1090 int ret;
1091
1092 ret = pthread_cond_init(&worker->cond, NULL);
1093 if (ret) {
1094 ALOGE("Failed to create worker condition %d", ret);
1095 return ret;
1096 }
1097
1098 ret = pthread_mutex_init(&worker->lock, NULL);
1099 if (ret) {
1100 ALOGE("Failed to initialize worker lock %d", ret);
1101 goto err_cond;
1102 }
1103
1104 worker->exit = false;
1105
1106 ret = pthread_create(&worker->thread, NULL, routine, hd);
1107 if (ret) {
1108 ALOGE("Could not create worker thread %d", ret);
1109 goto err_lock;
1110 }
1111 return 0;
1112
1113err_lock:
1114 pthread_mutex_destroy(&worker->lock);
1115err_cond:
1116 pthread_cond_destroy(&worker->cond);
1117 return ret;
1118}
1119
Sean Paul24a26e32015-02-04 10:34:47 -08001120/*
1121 * TODO: This function sets the active config to the first one in the list. This
1122 * should be fixed such that it selects the preferred mode for the display, or
1123 * some other, saner, method of choosing the config.
1124 */
1125static int hwc_set_initial_config(struct hwc_drm_display *hd)
1126{
1127 int ret;
1128 uint32_t config;
1129 size_t num_configs = 1;
1130
1131 ret = hwc_get_display_configs(&hd->ctx->device, hd->display, &config,
1132 &num_configs);
Sean Paulaea15c22015-02-09 02:24:11 -05001133 if (ret || !num_configs)
Sean Paul24a26e32015-02-04 10:34:47 -08001134 return 0;
1135
1136 ret = hwc_set_active_config(&hd->ctx->device, hd->display, 0);
1137 if (ret) {
1138 ALOGE("Failed to set active config d=%d ret=%d", hd->display,
1139 ret);
1140 return ret;
1141 }
1142
1143 return ret;
1144}
1145
Sean Paule0c4c3d2015-01-20 16:56:04 -05001146static int hwc_initialize_display(struct hwc_context_t *ctx, int display,
1147 uint32_t connector_id)
1148{
1149 struct hwc_drm_display *hd = NULL;
1150 int ret;
1151
1152 ret = hwc_get_drm_display(ctx, display, &hd);
1153 if (ret)
1154 return ret;
1155
Sean Paul9aa5ad32015-01-22 15:47:54 -05001156 hd->ctx = ctx;
1157 hd->display = display;
Sean Pauleb9e75c2015-01-25 23:31:30 -05001158 hd->active_pipe = -1;
Sean Paulefb20cb2015-02-04 09:29:15 -08001159 hd->initial_modeset_required = true;
Sean Paule0c4c3d2015-01-20 16:56:04 -05001160 hd->connector_id = connector_id;
1161
Sean Paulf1dc1912015-01-24 01:34:31 -05001162 ret = sw_sync_timeline_create();
1163 if (ret < 0) {
1164 ALOGE("Failed to create sw sync timeline %d", ret);
1165 return ret;
1166 }
1167 hd->timeline_fd = ret;
1168
Sean Paul24a26e32015-02-04 10:34:47 -08001169 ret = hwc_set_initial_config(hd);
1170 if (ret) {
1171 ALOGE("Failed to set initial config for d=%d ret=%d", display,
1172 ret);
1173 return ret;
1174 }
1175
Sean Paul9aa5ad32015-01-22 15:47:54 -05001176 ret = hwc_initialize_worker(hd, &hd->set_worker, hwc_set_worker);
1177 if (ret) {
1178 ALOGE("Failed to create set worker %d\n", ret);
1179 return ret;
1180 }
1181
Sean Pauleb9e75c2015-01-25 23:31:30 -05001182 ret = hwc_initialize_worker(hd, &hd->vsync_worker, hwc_vsync_worker);
1183 if (ret) {
1184 ALOGE("Failed to create vsync worker %d", ret);
1185 goto err;
1186 }
1187
Sean Paule0c4c3d2015-01-20 16:56:04 -05001188 return 0;
Sean Pauleb9e75c2015-01-25 23:31:30 -05001189
1190err:
1191 if (hwc_destroy_worker(&hd->set_worker))
1192 ALOGE("Failed to destroy set worker");
1193
1194 return ret;
Sean Paule0c4c3d2015-01-20 16:56:04 -05001195}
1196
1197static int hwc_enumerate_displays(struct hwc_context_t *ctx)
1198{
1199 struct hwc_drm_display *panel_hd;
1200 drmModeResPtr res;
1201 drmModeConnectorPtr *conn_list;
1202 int ret = 0, i, j;
1203
1204 res = drmModeGetResources(ctx->fd);
1205 if (!res) {
1206 ALOGE("Failed to get drm resources");
1207 return -ENODEV;
1208 }
1209
1210 conn_list = (drmModeConnector **)calloc(res->count_connectors,
1211 sizeof(*conn_list));
1212 if (!conn_list) {
1213 ALOGE("Failed to allocate connector list");
1214 ret = -ENOMEM;
1215 goto out;
1216 }
1217
1218 for (i = 0; i < res->count_connectors; i++) {
1219 conn_list[i] = drmModeGetConnector(ctx->fd, res->connectors[i]);
1220 if (!conn_list[i]) {
1221 ALOGE("Failed to get connector %d", res->connectors[i]);
1222 ret = -ENODEV;
1223 goto out;
1224 }
1225 }
1226
1227 ctx->num_displays = 0;
1228
1229 /* Find a connected, panel type connector for display 0 */
1230 for (i = 0; i < res->count_connectors; i++) {
1231 drmModeConnectorPtr c = conn_list[i];
1232
1233 for (j = 0; j < ARRAY_SIZE(panel_types); j++) {
1234 if (c->connector_type == panel_types[j] &&
1235 c->connection == DRM_MODE_CONNECTED)
1236 break;
1237 }
1238 if (j == ARRAY_SIZE(panel_types))
1239 continue;
1240
1241 hwc_initialize_display(ctx, ctx->num_displays, c->connector_id);
1242 ctx->num_displays++;
1243 break;
1244 }
1245
1246 ret = hwc_get_drm_display(ctx, 0, &panel_hd);
1247 if (ret)
1248 goto out;
1249
1250 /* Fill in the other displays */
1251 for (i = 0; i < res->count_connectors; i++) {
1252 drmModeConnectorPtr c = conn_list[i];
1253
1254 if (panel_hd->connector_id == c->connector_id)
1255 continue;
1256
1257 hwc_initialize_display(ctx, ctx->num_displays, c->connector_id);
1258 ctx->num_displays++;
1259 }
1260
1261out:
1262 for (i = 0; i < res->count_connectors; i++) {
1263 if (conn_list[i])
1264 drmModeFreeConnector(conn_list[i]);
1265 }
1266 free(conn_list);
1267
1268 if (res)
1269 drmModeFreeResources(res);
1270
1271 return ret;
1272}
1273
1274static int hwc_device_open(const struct hw_module_t* module, const char* name,
1275 struct hw_device_t** dev)
1276{
1277 int ret = 0;
1278 struct hwc_context_t *ctx;
1279
1280 if (strcmp(name, HWC_HARDWARE_COMPOSER)) {
1281 ALOGE("Invalid module name- %s", name);
1282 return -EINVAL;
1283 }
1284
Sean Paul9b1bb842015-01-23 01:11:58 -05001285 ctx = new hwc_context_t();
Sean Paule0c4c3d2015-01-20 16:56:04 -05001286 if (!ctx) {
1287 ALOGE("Failed to allocate hwc context");
1288 return -ENOMEM;
1289 }
1290
Sean Paulcd36a9e2015-01-22 18:01:18 -05001291 ret = hwc_import_init(&ctx->import_ctx);
Sean Paule0c4c3d2015-01-20 16:56:04 -05001292 if (ret) {
Sean Paulcd36a9e2015-01-22 18:01:18 -05001293 ALOGE("Failed to initialize import context");
Sean Paule0c4c3d2015-01-20 16:56:04 -05001294 goto out;
1295 }
1296
1297 /* TODO: Use drmOpenControl here instead */
1298 ctx->fd = open(HWCOMPOSER_DRM_DEVICE, O_RDWR);
1299 if (ctx->fd < 0) {
1300 ALOGE("Failed to open dri- %s", strerror(-errno));
1301 goto out;
1302 }
1303
Sean Paule0c4c3d2015-01-20 16:56:04 -05001304 ret = hwc_enumerate_displays(ctx);
1305 if (ret) {
1306 ALOGE("Failed to enumerate displays: %s", strerror(ret));
1307 goto out;
1308 }
1309
1310 ctx->device.common.tag = HARDWARE_DEVICE_TAG;
1311 ctx->device.common.version = HWC_DEVICE_API_VERSION_1_4;
1312 ctx->device.common.module = const_cast<hw_module_t*>(module);
1313 ctx->device.common.close = hwc_device_close;
1314
1315 ctx->device.prepare = hwc_prepare;
1316 ctx->device.set = hwc_set;
1317 ctx->device.eventControl = hwc_event_control;
1318 ctx->device.setPowerMode = hwc_set_power_mode;
1319 ctx->device.query = hwc_query;
1320 ctx->device.registerProcs = hwc_register_procs;
1321 ctx->device.getDisplayConfigs = hwc_get_display_configs;
1322 ctx->device.getDisplayAttributes = hwc_get_display_attributes;
1323 ctx->device.getActiveConfig = hwc_get_active_config;
1324 ctx->device.setActiveConfig = hwc_set_active_config;
1325 ctx->device.setCursorPositionAsync = NULL; /* TODO: Add cursor */
1326
1327 *dev = &ctx->device.common;
1328
1329 return 0;
1330out:
1331 if (ctx->fd >= 0)
1332 close(ctx->fd);
1333
1334 free(ctx);
1335 return ret;
1336}
1337
1338static struct hw_module_methods_t hwc_module_methods = {
1339 open: hwc_device_open
1340};
1341
1342hwc_module_t HAL_MODULE_INFO_SYM = {
1343 common: {
1344 tag: HARDWARE_MODULE_TAG,
1345 version_major: 1,
1346 version_minor: 0,
1347 id: HWC_HARDWARE_MODULE_ID,
1348 name: "DRM hwcomposer module",
1349 author: "The Android Open Source Project",
1350 methods: &hwc_module_methods,
1351 dso: NULL,
1352 reserved: { 0 },
1353 }
1354};