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Pierre-Clément Tosi5bbfca52022-10-21 12:14:35 +01001// Copyright 2022, The Android Open Source Project
2//
3// Licensed under the Apache License, Version 2.0 (the "License");
4// you may not use this file except in compliance with the License.
5// You may obtain a copy of the License at
6//
7// http://www.apache.org/licenses/LICENSE-2.0
8//
9// Unless required by applicable law or agreed to in writing, software
10// distributed under the License is distributed on an "AS IS" BASIS,
11// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
12// See the License for the specific language governing permissions and
13// limitations under the License.
14
15//! Low-level entry and exit points of pvmfw.
16
Pierre-Clément Tosi20b60962022-10-17 13:35:27 +010017use crate::config;
Alice Wang93ee98a2023-06-08 08:20:39 +000018use crate::memory;
Pierre-Clément Tosi645e90e2022-10-21 13:27:19 +010019use core::arch::asm;
Pierre-Clément Tosic26e2202024-11-01 23:12:23 +000020use core::mem::size_of;
Pierre-Clément Tosi97f52492023-04-04 15:52:17 +010021use core::ops::Range;
Pierre-Clément Tosi5bbfca52022-10-21 12:14:35 +010022use core::slice;
Pierre-Clément Tosie8726e42022-10-17 13:35:27 +010023use log::error;
Pierre-Clément Tosi20b60962022-10-17 13:35:27 +010024use log::warn;
Pierre-Clément Tosie8726e42022-10-17 13:35:27 +010025use log::LevelFilter;
Alice Wang4be4dd02023-06-07 07:50:40 +000026use vmbase::util::RangeExt as _;
Alice Wangeacb7382023-06-05 12:53:54 +000027use vmbase::{
Pierre-Clément Tosi8ab7c372024-10-30 20:46:04 +000028 arch::aarch64::min_dcache_line_size,
Pierre-Clément Tosieba83162024-11-02 12:11:48 +000029 configure_heap, console_writeln, layout, limit_stack_size, main,
Pierre-Clément Tosic26e2202024-11-01 23:12:23 +000030 memory::{
31 deactivate_dynamic_page_tables, map_image_footer, switch_to_dynamic_page_tables,
32 unshare_all_memory, unshare_all_mmio_except_uart, unshare_uart, MemoryTrackerError,
33 SIZE_128KB, SIZE_4KB,
34 },
Alice Wangeacb7382023-06-05 12:53:54 +000035 power::reboot,
36};
Jakob Vukalovic44b1ce32023-04-17 19:10:10 +010037use zeroize::Zeroize;
Pierre-Clément Tosi5bbfca52022-10-21 12:14:35 +010038
39#[derive(Debug, Clone)]
Andrew Walbran19690632022-12-07 16:41:30 +000040pub enum RebootReason {
Pierre-Clément Tosie8726e42022-10-17 13:35:27 +010041 /// A malformed BCC was received.
42 InvalidBcc,
Pierre-Clément Tosi20b60962022-10-17 13:35:27 +010043 /// An invalid configuration was appended to pvmfw.
44 InvalidConfig,
Pierre-Clément Tosi5bbfca52022-10-21 12:14:35 +010045 /// An unexpected internal error happened.
46 InternalError,
Pierre-Clément Tosia0934c12022-11-25 20:54:11 +000047 /// The provided FDT was invalid.
48 InvalidFdt,
49 /// The provided payload was invalid.
50 InvalidPayload,
51 /// The provided ramdisk was invalid.
52 InvalidRamdisk,
Alice Wang28cbcf12022-12-01 07:58:28 +000053 /// Failed to verify the payload.
54 PayloadVerificationError,
Pierre-Clément Tosi4f4f5eb2022-12-08 14:31:42 +000055 /// DICE layering process failed.
56 SecretDerivationError,
Pierre-Clément Tosi5bbfca52022-10-21 12:14:35 +010057}
58
Pierre-Clément Tosib5a3ab12023-09-15 11:18:38 +010059impl RebootReason {
60 pub fn as_avf_reboot_string(&self) -> &'static str {
61 match self {
62 Self::InvalidBcc => "PVM_FIRMWARE_INVALID_BCC",
63 Self::InvalidConfig => "PVM_FIRMWARE_INVALID_CONFIG_DATA",
64 Self::InternalError => "PVM_FIRMWARE_INTERNAL_ERROR",
65 Self::InvalidFdt => "PVM_FIRMWARE_INVALID_FDT",
66 Self::InvalidPayload => "PVM_FIRMWARE_INVALID_PAYLOAD",
67 Self::InvalidRamdisk => "PVM_FIRMWARE_INVALID_RAMDISK",
68 Self::PayloadVerificationError => "PVM_FIRMWARE_PAYLOAD_VERIFICATION_FAILED",
69 Self::SecretDerivationError => "PVM_FIRMWARE_SECRET_DERIVATION_FAILED",
70 }
71 }
72}
73
Pierre-Clément Tosi5bbfca52022-10-21 12:14:35 +010074main!(start);
Pierre-Clément Tosi6a4808c2023-06-29 09:19:38 +000075configure_heap!(SIZE_128KB);
Pierre-Clément Tosieba83162024-11-02 12:11:48 +000076limit_stack_size!(SIZE_4KB * 12);
Pierre-Clément Tosi5bbfca52022-10-21 12:14:35 +010077
78/// Entry point for pVM firmware.
79pub fn start(fdt_address: u64, payload_start: u64, payload_size: u64, _arg3: u64) {
80 // Limitations in this function:
81 // - can't access non-pvmfw memory (only statically-mapped memory)
Pierre-Clément Tosi8e92d1a2024-06-18 16:15:14 +010082 // - can't access MMIO (except the console, already configured by vmbase)
Pierre-Clément Tosi5bbfca52022-10-21 12:14:35 +010083
84 match main_wrapper(fdt_address as usize, payload_start as usize, payload_size as usize) {
Pierre-Clément Tosi97f52492023-04-04 15:52:17 +010085 Ok((entry, bcc)) => jump_to_payload(fdt_address, entry.try_into().unwrap(), bcc),
Pierre-Clément Tosib5a3ab12023-09-15 11:18:38 +010086 Err(e) => {
87 const REBOOT_REASON_CONSOLE: usize = 1;
88 console_writeln!(REBOOT_REASON_CONSOLE, "{}", e.as_avf_reboot_string());
89 reboot()
90 }
Pierre-Clément Tosi5bbfca52022-10-21 12:14:35 +010091 }
92
93 // if we reach this point and return, vmbase::entry::rust_entry() will call power::shutdown().
94}
95
96/// Sets up the environment for main() and wraps its result for start().
97///
98/// Provide the abstractions necessary for start() to abort the pVM boot and for main() to run with
99/// the assumption that its environment has been properly configured.
Pierre-Clément Tosi97f52492023-04-04 15:52:17 +0100100fn main_wrapper(
101 fdt: usize,
102 payload: usize,
103 payload_size: usize,
104) -> Result<(usize, Range<usize>), RebootReason> {
Pierre-Clément Tosi5bbfca52022-10-21 12:14:35 +0100105 // Limitations in this function:
106 // - only access MMIO once (and while) it has been mapped and configured
107 // - only perform logging once the logger has been initialized
108 // - only access non-pvmfw memory once (and while) it has been mapped
Pierre-Clément Tosifc531152022-10-20 12:22:23 +0100109
Pierre-Clément Tosid3305482023-06-29 15:03:48 +0000110 log::set_max_level(LevelFilter::Info);
Pierre-Clément Tosi41748ed2023-03-31 18:20:40 +0100111
Alice Wang807fa592023-06-02 09:54:43 +0000112 let page_table = memory::init_page_table().map_err(|e| {
Pierre-Clément Tosia8a4a202022-11-03 14:16:46 +0000113 error!("Failed to set up the dynamic page tables: {e}");
114 RebootReason::InternalError
115 })?;
Pierre-Clément Tosi229dd9d2024-11-02 10:34:27 +0000116 // Up to this point, we were using the built-in static (from .rodata) page tables.
Pierre-Clément Tosic26e2202024-11-01 23:12:23 +0000117 switch_to_dynamic_page_tables(page_table);
Pierre-Clément Tosi229dd9d2024-11-02 10:34:27 +0000118
119 let appended_data = get_appended_data_slice().map_err(|e| {
120 error!("Failed to map the appended data: {e}");
121 RebootReason::InternalError
122 })?;
Alan Stokesc3829f12023-06-02 15:02:23 +0100123
Alan Stokes65618332023-12-15 14:09:25 +0000124 let appended = AppendedPayload::new(appended_data).ok_or_else(|| {
Pierre-Clément Tosi20b60962022-10-17 13:35:27 +0100125 error!("No valid configuration found");
126 RebootReason::InvalidConfig
Pierre-Clément Tosia8a4a202022-11-03 14:16:46 +0000127 })?;
128
Alan Stokesd0cf3cd2023-12-12 14:36:37 +0000129 let config_entries = appended.get_entries();
Pierre-Clément Tosie8726e42022-10-17 13:35:27 +0100130
Pierre-Clément Tosi462bdf42024-10-30 17:46:23 +0000131 let slices = memory::MemorySlices::new(
Seungjae Yoo013f4c42024-01-02 13:04:19 +0900132 fdt,
133 payload,
134 payload_size,
135 config_entries.vm_dtbo,
Seungjae Yoof0af81d2024-01-17 13:48:36 +0900136 config_entries.vm_ref_dt,
Seungjae Yoo013f4c42024-01-02 13:04:19 +0900137 )?;
Pierre-Clément Tosia0934c12022-11-25 20:54:11 +0000138
Pierre-Clément Tosi072969b2022-10-19 17:32:24 +0100139 // This wrapper allows main() to be blissfully ignorant of platform details.
Pierre-Clément Tosi64aff642024-07-31 16:20:21 +0100140 let (next_bcc, debuggable_payload) = crate::main(
Alan Stokesd0cf3cd2023-12-12 14:36:37 +0000141 slices.fdt,
142 slices.kernel,
143 slices.ramdisk,
144 config_entries.bcc,
145 config_entries.debug_policy,
146 )?;
Pierre-Clément Tosie8726e42022-10-17 13:35:27 +0100147
Jakob Vukalovic44b1ce32023-04-17 19:10:10 +0100148 // Writable-dirty regions will be flushed when MemoryTracker is dropped.
Alan Stokesd0cf3cd2023-12-12 14:36:37 +0000149 config_entries.bcc.zeroize();
Pierre-Clément Tosi072969b2022-10-19 17:32:24 +0100150
Pierre-Clément Tosic26e2202024-11-01 23:12:23 +0000151 unshare_all_mmio_except_uart().map_err(|e| {
Andrew Walbran19690632022-12-07 16:41:30 +0000152 error!("Failed to unshare MMIO ranges: {e}");
153 RebootReason::InternalError
154 })?;
Pierre-Clément Tosif19c0e62023-05-02 13:56:58 +0000155 // Call unshare_all_memory here (instead of relying on the dtor) while UART is still mapped.
Pierre-Clément Tosic26e2202024-11-01 23:12:23 +0000156 unshare_all_memory();
Pierre-Clément Tosi64aff642024-07-31 16:20:21 +0100157
Pierre-Clément Tosic26e2202024-11-01 23:12:23 +0000158 if cfg!(debuggable_vms_improvements) && debuggable_payload {
159 // Keep UART MMIO_GUARD-ed for debuggable payloads, to enable earlycon.
160 } else {
161 unshare_uart().map_err(|e| {
162 error!("Failed to unshare the UART: {e}");
163 RebootReason::InternalError
164 })?;
Pierre-Clément Tosi5ad1e8c2023-06-29 10:36:48 +0000165 }
Jakob Vukalovic4c1edbe2023-04-17 19:10:57 +0100166
Pierre-Clément Tosic26e2202024-11-01 23:12:23 +0000167 deactivate_dynamic_page_tables();
Pierre-Clément Tosia99bfa62022-10-06 13:30:52 +0100168
Pierre-Clément Tosi97f52492023-04-04 15:52:17 +0100169 Ok((slices.kernel.as_ptr() as usize, next_bcc))
Pierre-Clément Tosi5bbfca52022-10-21 12:14:35 +0100170}
Pierre-Clément Tosi645e90e2022-10-21 13:27:19 +0100171
Pierre-Clément Tosi97f52492023-04-04 15:52:17 +0100172fn jump_to_payload(fdt_address: u64, payload_start: u64, bcc: Range<usize>) -> ! {
173 const ASM_STP_ALIGN: usize = size_of::<u64>() * 2;
Pierre-Clément Tosi6c0d48b2022-11-07 11:00:32 +0000174 const SCTLR_EL1_RES1: u64 = (0b11 << 28) | (0b101 << 20) | (0b1 << 11);
Pierre-Clément Tosi645e90e2022-10-21 13:27:19 +0100175 // Stage 1 instruction access cacheability is unaffected.
Pierre-Clément Tosi6c0d48b2022-11-07 11:00:32 +0000176 const SCTLR_EL1_I: u64 = 0b1 << 12;
Pierre-Clément Tosi645e90e2022-10-21 13:27:19 +0100177 // SETEND instruction disabled at EL0 in aarch32 mode.
Pierre-Clément Tosi6c0d48b2022-11-07 11:00:32 +0000178 const SCTLR_EL1_SED: u64 = 0b1 << 8;
Pierre-Clément Tosi645e90e2022-10-21 13:27:19 +0100179 // Various IT instructions are disabled at EL0 in aarch32 mode.
Pierre-Clément Tosi6c0d48b2022-11-07 11:00:32 +0000180 const SCTLR_EL1_ITD: u64 = 0b1 << 7;
Pierre-Clément Tosi645e90e2022-10-21 13:27:19 +0100181
Pierre-Clément Tosi6c0d48b2022-11-07 11:00:32 +0000182 const SCTLR_EL1_VAL: u64 = SCTLR_EL1_RES1 | SCTLR_EL1_ITD | SCTLR_EL1_SED | SCTLR_EL1_I;
Pierre-Clément Tosi645e90e2022-10-21 13:27:19 +0100183
Pierre-Clément Tosi0b02a2b2024-11-28 22:48:27 +0000184 let scratch = layout::data_bss_range();
Pierre-Clément Tosi97f52492023-04-04 15:52:17 +0100185
Alice Wanga3931aa2023-07-05 12:52:09 +0000186 assert_ne!(scratch.end - scratch.start, 0, "scratch memory is empty.");
187 assert_eq!(scratch.start.0 % ASM_STP_ALIGN, 0, "scratch memory is misaligned.");
188 assert_eq!(scratch.end.0 % ASM_STP_ALIGN, 0, "scratch memory is misaligned.");
Pierre-Clément Tosi97f52492023-04-04 15:52:17 +0100189
Alice Wanga3931aa2023-07-05 12:52:09 +0000190 assert!(bcc.is_within(&(scratch.start.0..scratch.end.0)));
Pierre-Clément Tosi97f52492023-04-04 15:52:17 +0100191 assert_eq!(bcc.start % ASM_STP_ALIGN, 0, "Misaligned guest BCC.");
192 assert_eq!(bcc.end % ASM_STP_ALIGN, 0, "Misaligned guest BCC.");
193
Pierre-Clément Tosieba83162024-11-02 12:11:48 +0000194 let stack = layout::stack_range();
Pierre-Clément Tosi97f52492023-04-04 15:52:17 +0100195
Alice Wanga3931aa2023-07-05 12:52:09 +0000196 assert_ne!(stack.end - stack.start, 0, "stack region is empty.");
197 assert_eq!(stack.start.0 % ASM_STP_ALIGN, 0, "Misaligned stack region.");
198 assert_eq!(stack.end.0 % ASM_STP_ALIGN, 0, "Misaligned stack region.");
Pierre-Clément Tosi97f52492023-04-04 15:52:17 +0100199
Pierre-Clément Tosi0b02a2b2024-11-28 22:48:27 +0000200 let eh_stack = layout::eh_stack_range();
201
202 assert_ne!(eh_stack.end - eh_stack.start, 0, "EH stack region is empty.");
203 assert_eq!(eh_stack.start.0 % ASM_STP_ALIGN, 0, "Misaligned EH stack region.");
204 assert_eq!(eh_stack.end.0 % ASM_STP_ALIGN, 0, "Misaligned EH stack region.");
205
Pierre-Clément Tosi97f52492023-04-04 15:52:17 +0100206 // Zero all memory that could hold secrets and that can't be safely written to from Rust.
Pierre-Clément Tosi6c0d48b2022-11-07 11:00:32 +0000207 // Disable the exception vector, caches and page table and then jump to the payload at the
208 // given address, passing it the given FDT pointer.
209 //
Andrew Walbran20bb4e42023-07-07 13:55:55 +0100210 // SAFETY: We're exiting pvmfw by passing the register values we need to a noreturn asm!().
Pierre-Clément Tosi645e90e2022-10-21 13:27:19 +0100211 unsafe {
212 asm!(
Pierre-Clément Tosi97f52492023-04-04 15:52:17 +0100213 "cmp {scratch}, {bcc}",
214 "b.hs 1f",
215
216 // Zero .data & .bss until BCC.
217 "0: stp xzr, xzr, [{scratch}], 16",
218 "cmp {scratch}, {bcc}",
219 "b.lo 0b",
220
221 "1:",
222 // Skip BCC.
223 "mov {scratch}, {bcc_end}",
224 "cmp {scratch}, {scratch_end}",
225 "b.hs 1f",
226
227 // Keep zeroing .data & .bss.
228 "0: stp xzr, xzr, [{scratch}], 16",
229 "cmp {scratch}, {scratch_end}",
230 "b.lo 0b",
231
232 "1:",
233 // Flush d-cache over .data & .bss (including BCC).
234 "0: dc cvau, {cache_line}",
235 "add {cache_line}, {cache_line}, {dcache_line_size}",
236 "cmp {cache_line}, {scratch_end}",
237 "b.lo 0b",
238
239 "mov {cache_line}, {stack}",
240 // Zero stack region.
241 "0: stp xzr, xzr, [{stack}], 16",
242 "cmp {stack}, {stack_end}",
243 "b.lo 0b",
244
245 // Flush d-cache over stack region.
246 "0: dc cvau, {cache_line}",
247 "add {cache_line}, {cache_line}, {dcache_line_size}",
248 "cmp {cache_line}, {stack_end}",
249 "b.lo 0b",
250
Pierre-Clément Tosi0b02a2b2024-11-28 22:48:27 +0000251 "mov {cache_line}, {eh_stack}",
252 // Zero EH stack region.
253 "0: stp xzr, xzr, [{eh_stack}], 16",
254 "cmp {eh_stack}, {eh_stack_end}",
255 "b.lo 0b",
256
257 // Flush d-cache over EH stack region.
258 "0: dc cvau, {cache_line}",
259 "add {cache_line}, {cache_line}, {dcache_line_size}",
260 "cmp {cache_line}, {eh_stack_end}",
261 "b.lo 0b",
262
Pierre-Clément Tosi645e90e2022-10-21 13:27:19 +0100263 "msr sctlr_el1, {sctlr_el1_val}",
264 "isb",
265 "mov x1, xzr",
266 "mov x2, xzr",
267 "mov x3, xzr",
268 "mov x4, xzr",
269 "mov x5, xzr",
270 "mov x6, xzr",
271 "mov x7, xzr",
272 "mov x8, xzr",
273 "mov x9, xzr",
274 "mov x10, xzr",
275 "mov x11, xzr",
276 "mov x12, xzr",
277 "mov x13, xzr",
278 "mov x14, xzr",
279 "mov x15, xzr",
280 "mov x16, xzr",
281 "mov x17, xzr",
282 "mov x18, xzr",
283 "mov x19, xzr",
284 "mov x20, xzr",
285 "mov x21, xzr",
286 "mov x22, xzr",
287 "mov x23, xzr",
288 "mov x24, xzr",
289 "mov x25, xzr",
290 "mov x26, xzr",
291 "mov x27, xzr",
292 "mov x28, xzr",
293 "mov x29, xzr",
294 "msr ttbr0_el1, xzr",
Pierre-Clément Tosi97f52492023-04-04 15:52:17 +0100295 // Ensure that CMOs have completed before entering payload.
Pierre-Clément Tosi645e90e2022-10-21 13:27:19 +0100296 "dsb nsh",
297 "br x30",
298 sctlr_el1_val = in(reg) SCTLR_EL1_VAL,
Pierre-Clément Tosi97f52492023-04-04 15:52:17 +0100299 bcc = in(reg) u64::try_from(bcc.start).unwrap(),
300 bcc_end = in(reg) u64::try_from(bcc.end).unwrap(),
Alice Wanga3931aa2023-07-05 12:52:09 +0000301 cache_line = in(reg) u64::try_from(scratch.start.0).unwrap(),
302 scratch = in(reg) u64::try_from(scratch.start.0).unwrap(),
303 scratch_end = in(reg) u64::try_from(scratch.end.0).unwrap(),
304 stack = in(reg) u64::try_from(stack.start.0).unwrap(),
305 stack_end = in(reg) u64::try_from(stack.end.0).unwrap(),
Pierre-Clément Tosi0b02a2b2024-11-28 22:48:27 +0000306 eh_stack = in(reg) u64::try_from(eh_stack.start.0).unwrap(),
307 eh_stack_end = in(reg) u64::try_from(eh_stack.end.0).unwrap(),
Alice Wang3fa9b802023-06-06 07:52:31 +0000308 dcache_line_size = in(reg) u64::try_from(min_dcache_line_size()).unwrap(),
Pierre-Clément Tosi645e90e2022-10-21 13:27:19 +0100309 in("x0") fdt_address,
310 in("x30") payload_start,
Pierre-Clément Tosi97f52492023-04-04 15:52:17 +0100311 options(noreturn),
Pierre-Clément Tosi645e90e2022-10-21 13:27:19 +0100312 );
313 };
314}
Pierre-Clément Tosie8726e42022-10-17 13:35:27 +0100315
Pierre-Clément Tosi229dd9d2024-11-02 10:34:27 +0000316fn get_appended_data_slice() -> Result<&'static mut [u8], MemoryTrackerError> {
Pierre-Clément Tosic26e2202024-11-01 23:12:23 +0000317 let range = map_image_footer()?;
Pierre-Clément Tosi229dd9d2024-11-02 10:34:27 +0000318 // SAFETY: This region was just mapped for the first time (as map_image_footer() didn't fail)
319 // and the linker script prevents it from overlapping with other objects.
320 Ok(unsafe { slice::from_raw_parts_mut(range.start as *mut u8, range.len()) })
Pierre-Clément Tosie8726e42022-10-17 13:35:27 +0100321}
322
Pierre-Clément Tosi20b60962022-10-17 13:35:27 +0100323enum AppendedPayload<'a> {
324 /// Configuration data.
325 Config(config::Config<'a>),
326 /// Deprecated raw BCC, as used in Android T.
327 LegacyBcc(&'a mut [u8]),
328}
Pierre-Clément Tosie8726e42022-10-17 13:35:27 +0100329
Pierre-Clément Tosi20b60962022-10-17 13:35:27 +0100330impl<'a> AppendedPayload<'a> {
Alan Stokesc3829f12023-06-02 15:02:23 +0100331 fn new(data: &'a mut [u8]) -> Option<Self> {
Pierre-Clément Tosi147addf2024-04-15 15:07:58 +0100332 // The borrow checker gets confused about the ownership of data (see inline comments) so we
333 // intentionally obfuscate it using a raw pointer; see a similar issue (still not addressed
334 // in v1.77) in https://users.rust-lang.org/t/78467.
335 let data_ptr = data as *mut [u8];
336
337 // Config::new() borrows data as mutable ...
338 match config::Config::new(data) {
339 // ... so this branch has a mutable reference to data, from the Ok(Config<'a>). But ...
340 Ok(valid) => Some(Self::Config(valid)),
341 // ... if Config::new(data).is_err(), the Err holds no ref to data. However ...
342 Err(config::Error::InvalidMagic) if cfg!(feature = "legacy") => {
343 // ... the borrow checker still complains about a second mutable ref without this.
344 // SAFETY: Pointer to a valid mut (not accessed elsewhere), 'a lifetime re-used.
345 let data: &'a mut _ = unsafe { &mut *data_ptr };
346
Alice Wangeacb7382023-06-05 12:53:54 +0000347 const BCC_SIZE: usize = SIZE_4KB;
Pierre-Clément Tosi7aca7ff2022-12-12 14:04:30 +0000348 warn!("Assuming the appended data at {:?} to be a raw BCC", data.as_ptr());
349 Some(Self::LegacyBcc(&mut data[..BCC_SIZE]))
350 }
Pierre-Clément Tosi7aca7ff2022-12-12 14:04:30 +0000351 Err(e) => {
Pierre-Clément Tosi147addf2024-04-15 15:07:58 +0100352 error!("Invalid configuration data at {data_ptr:?}: {e}");
353 None
Pierre-Clément Tosi7aca7ff2022-12-12 14:04:30 +0000354 }
Pierre-Clément Tosi7aca7ff2022-12-12 14:04:30 +0000355 }
Pierre-Clément Tosi20b60962022-10-17 13:35:27 +0100356 }
357
Alan Stokes65618332023-12-15 14:09:25 +0000358 fn get_entries(self) -> config::Entries<'a> {
Pierre-Clément Tosi20b60962022-10-17 13:35:27 +0100359 match self {
Alan Stokesd0cf3cd2023-12-12 14:36:37 +0000360 Self::Config(cfg) => cfg.get_entries(),
361 Self::LegacyBcc(bcc) => config::Entries { bcc, ..Default::default() },
Pierre-Clément Tosi8edf72e2022-12-06 16:02:57 +0000362 }
Pierre-Clément Tosie8726e42022-10-17 13:35:27 +0100363 }
364}