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Pierre-Clément Tosi5bbfca52022-10-21 12:14:35 +01001// Copyright 2022, The Android Open Source Project
2//
3// Licensed under the Apache License, Version 2.0 (the "License");
4// you may not use this file except in compliance with the License.
5// You may obtain a copy of the License at
6//
7// http://www.apache.org/licenses/LICENSE-2.0
8//
9// Unless required by applicable law or agreed to in writing, software
10// distributed under the License is distributed on an "AS IS" BASIS,
11// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
12// See the License for the specific language governing permissions and
13// limitations under the License.
14
15//! Low-level entry and exit points of pvmfw.
16
Pierre-Clément Tosi20b60962022-10-17 13:35:27 +010017use crate::config;
Alice Wang93ee98a2023-06-08 08:20:39 +000018use crate::memory;
Pierre-Clément Tosi645e90e2022-10-21 13:27:19 +010019use core::arch::asm;
Jakob Vukalovic4c1edbe2023-04-17 19:10:57 +010020use core::mem::{drop, size_of};
Pierre-Clément Tosi97f52492023-04-04 15:52:17 +010021use core::ops::Range;
Pierre-Clément Tosi5bbfca52022-10-21 12:14:35 +010022use core::slice;
Per Larsen7ec45d32024-11-02 00:56:46 +000023use hypervisor_backends::get_mmio_guard;
Pierre-Clément Tosie8726e42022-10-17 13:35:27 +010024use log::error;
Pierre-Clément Tosia0934c12022-11-25 20:54:11 +000025use log::info;
Pierre-Clément Tosi20b60962022-10-17 13:35:27 +010026use log::warn;
Pierre-Clément Tosie8726e42022-10-17 13:35:27 +010027use log::LevelFilter;
Alice Wang4be4dd02023-06-07 07:50:40 +000028use vmbase::util::RangeExt as _;
Alice Wangeacb7382023-06-05 12:53:54 +000029use vmbase::{
Pierre-Clément Tosi8ab7c372024-10-30 20:46:04 +000030 arch::aarch64::min_dcache_line_size,
Pierre-Clément Tosib5a3ab12023-09-15 11:18:38 +010031 configure_heap, console_writeln,
Pierre-Clément Tosi38a36212024-06-06 11:30:39 +010032 layout::{self, crosvm, UART_PAGE_ADDR},
Pierre-Clément Tosid3305482023-06-29 15:03:48 +000033 main,
Pierre-Clément Tosi229dd9d2024-11-02 10:34:27 +000034 memory::{MemoryTracker, MemoryTrackerError, MEMORY, SIZE_128KB, SIZE_4KB},
Alice Wangeacb7382023-06-05 12:53:54 +000035 power::reboot,
36};
Jakob Vukalovic44b1ce32023-04-17 19:10:10 +010037use zeroize::Zeroize;
Pierre-Clément Tosi5bbfca52022-10-21 12:14:35 +010038
39#[derive(Debug, Clone)]
Andrew Walbran19690632022-12-07 16:41:30 +000040pub enum RebootReason {
Pierre-Clément Tosie8726e42022-10-17 13:35:27 +010041 /// A malformed BCC was received.
42 InvalidBcc,
Pierre-Clément Tosi20b60962022-10-17 13:35:27 +010043 /// An invalid configuration was appended to pvmfw.
44 InvalidConfig,
Pierre-Clément Tosi5bbfca52022-10-21 12:14:35 +010045 /// An unexpected internal error happened.
46 InternalError,
Pierre-Clément Tosia0934c12022-11-25 20:54:11 +000047 /// The provided FDT was invalid.
48 InvalidFdt,
49 /// The provided payload was invalid.
50 InvalidPayload,
51 /// The provided ramdisk was invalid.
52 InvalidRamdisk,
Alice Wang28cbcf12022-12-01 07:58:28 +000053 /// Failed to verify the payload.
54 PayloadVerificationError,
Pierre-Clément Tosi4f4f5eb2022-12-08 14:31:42 +000055 /// DICE layering process failed.
56 SecretDerivationError,
Pierre-Clément Tosi5bbfca52022-10-21 12:14:35 +010057}
58
Pierre-Clément Tosib5a3ab12023-09-15 11:18:38 +010059impl RebootReason {
60 pub fn as_avf_reboot_string(&self) -> &'static str {
61 match self {
62 Self::InvalidBcc => "PVM_FIRMWARE_INVALID_BCC",
63 Self::InvalidConfig => "PVM_FIRMWARE_INVALID_CONFIG_DATA",
64 Self::InternalError => "PVM_FIRMWARE_INTERNAL_ERROR",
65 Self::InvalidFdt => "PVM_FIRMWARE_INVALID_FDT",
66 Self::InvalidPayload => "PVM_FIRMWARE_INVALID_PAYLOAD",
67 Self::InvalidRamdisk => "PVM_FIRMWARE_INVALID_RAMDISK",
68 Self::PayloadVerificationError => "PVM_FIRMWARE_PAYLOAD_VERIFICATION_FAILED",
69 Self::SecretDerivationError => "PVM_FIRMWARE_SECRET_DERIVATION_FAILED",
70 }
71 }
72}
73
Pierre-Clément Tosi5bbfca52022-10-21 12:14:35 +010074main!(start);
Pierre-Clément Tosi6a4808c2023-06-29 09:19:38 +000075configure_heap!(SIZE_128KB);
Pierre-Clément Tosi5bbfca52022-10-21 12:14:35 +010076
77/// Entry point for pVM firmware.
78pub fn start(fdt_address: u64, payload_start: u64, payload_size: u64, _arg3: u64) {
79 // Limitations in this function:
80 // - can't access non-pvmfw memory (only statically-mapped memory)
Pierre-Clément Tosi8e92d1a2024-06-18 16:15:14 +010081 // - can't access MMIO (except the console, already configured by vmbase)
Pierre-Clément Tosi5bbfca52022-10-21 12:14:35 +010082
83 match main_wrapper(fdt_address as usize, payload_start as usize, payload_size as usize) {
Pierre-Clément Tosi97f52492023-04-04 15:52:17 +010084 Ok((entry, bcc)) => jump_to_payload(fdt_address, entry.try_into().unwrap(), bcc),
Pierre-Clément Tosib5a3ab12023-09-15 11:18:38 +010085 Err(e) => {
86 const REBOOT_REASON_CONSOLE: usize = 1;
87 console_writeln!(REBOOT_REASON_CONSOLE, "{}", e.as_avf_reboot_string());
88 reboot()
89 }
Pierre-Clément Tosi5bbfca52022-10-21 12:14:35 +010090 }
91
92 // if we reach this point and return, vmbase::entry::rust_entry() will call power::shutdown().
93}
94
95/// Sets up the environment for main() and wraps its result for start().
96///
97/// Provide the abstractions necessary for start() to abort the pVM boot and for main() to run with
98/// the assumption that its environment has been properly configured.
Pierre-Clément Tosi97f52492023-04-04 15:52:17 +010099fn main_wrapper(
100 fdt: usize,
101 payload: usize,
102 payload_size: usize,
103) -> Result<(usize, Range<usize>), RebootReason> {
Pierre-Clément Tosi5bbfca52022-10-21 12:14:35 +0100104 // Limitations in this function:
105 // - only access MMIO once (and while) it has been mapped and configured
106 // - only perform logging once the logger has been initialized
107 // - only access non-pvmfw memory once (and while) it has been mapped
Pierre-Clément Tosifc531152022-10-20 12:22:23 +0100108
Pierre-Clément Tosid3305482023-06-29 15:03:48 +0000109 log::set_max_level(LevelFilter::Info);
Pierre-Clément Tosi41748ed2023-03-31 18:20:40 +0100110
Alice Wang807fa592023-06-02 09:54:43 +0000111 let page_table = memory::init_page_table().map_err(|e| {
Pierre-Clément Tosia8a4a202022-11-03 14:16:46 +0000112 error!("Failed to set up the dynamic page tables: {e}");
113 RebootReason::InternalError
114 })?;
Alan Stokesc3829f12023-06-02 15:02:23 +0100115
Pierre-Clément Tosi229dd9d2024-11-02 10:34:27 +0000116 // Up to this point, we were using the built-in static (from .rodata) page tables.
117 MEMORY.lock().replace(MemoryTracker::new(
118 page_table,
119 crosvm::MEM_START..layout::MAX_VIRT_ADDR,
120 crosvm::MMIO_RANGE,
121 ));
122
123 let appended_data = get_appended_data_slice().map_err(|e| {
124 error!("Failed to map the appended data: {e}");
125 RebootReason::InternalError
126 })?;
Alan Stokesc3829f12023-06-02 15:02:23 +0100127
Alan Stokes65618332023-12-15 14:09:25 +0000128 let appended = AppendedPayload::new(appended_data).ok_or_else(|| {
Pierre-Clément Tosi20b60962022-10-17 13:35:27 +0100129 error!("No valid configuration found");
130 RebootReason::InvalidConfig
Pierre-Clément Tosia8a4a202022-11-03 14:16:46 +0000131 })?;
132
Alan Stokesd0cf3cd2023-12-12 14:36:37 +0000133 let config_entries = appended.get_entries();
Pierre-Clément Tosie8726e42022-10-17 13:35:27 +0100134
Pierre-Clément Tosi462bdf42024-10-30 17:46:23 +0000135 let slices = memory::MemorySlices::new(
Seungjae Yoo013f4c42024-01-02 13:04:19 +0900136 fdt,
137 payload,
138 payload_size,
139 config_entries.vm_dtbo,
Seungjae Yoof0af81d2024-01-17 13:48:36 +0900140 config_entries.vm_ref_dt,
Seungjae Yoo013f4c42024-01-02 13:04:19 +0900141 )?;
Pierre-Clément Tosia0934c12022-11-25 20:54:11 +0000142
Pierre-Clément Tosi072969b2022-10-19 17:32:24 +0100143 // This wrapper allows main() to be blissfully ignorant of platform details.
Pierre-Clément Tosi64aff642024-07-31 16:20:21 +0100144 let (next_bcc, debuggable_payload) = crate::main(
Alan Stokesd0cf3cd2023-12-12 14:36:37 +0000145 slices.fdt,
146 slices.kernel,
147 slices.ramdisk,
148 config_entries.bcc,
149 config_entries.debug_policy,
150 )?;
Pierre-Clément Tosie8726e42022-10-17 13:35:27 +0100151
Jakob Vukalovic44b1ce32023-04-17 19:10:10 +0100152 // Writable-dirty regions will be flushed when MemoryTracker is dropped.
Alan Stokesd0cf3cd2023-12-12 14:36:37 +0000153 config_entries.bcc.zeroize();
Pierre-Clément Tosi072969b2022-10-19 17:32:24 +0100154
Andrew Walbran19690632022-12-07 16:41:30 +0000155 info!("Expecting a bug making MMIO_GUARD_UNMAP return NOT_SUPPORTED on success");
Pierre-Clément Tosi6b867532024-04-29 02:29:42 +0100156 MEMORY.lock().as_mut().unwrap().unshare_all_mmio().map_err(|e| {
Andrew Walbran19690632022-12-07 16:41:30 +0000157 error!("Failed to unshare MMIO ranges: {e}");
158 RebootReason::InternalError
159 })?;
Pierre-Clément Tosif19c0e62023-05-02 13:56:58 +0000160 // Call unshare_all_memory here (instead of relying on the dtor) while UART is still mapped.
161 MEMORY.lock().as_mut().unwrap().unshare_all_memory();
Pierre-Clément Tosi64aff642024-07-31 16:20:21 +0100162
Pierre-Clément Tosid643cfe2023-06-29 09:30:51 +0000163 if let Some(mmio_guard) = get_mmio_guard() {
Nikita Ioffeb4268b32024-09-03 10:23:14 +0000164 if cfg!(debuggable_vms_improvements) && debuggable_payload {
165 // Keep UART MMIO_GUARD-ed for debuggable payloads, to enable earlycon.
166 } else {
Pierre-Clément Tosi64aff642024-07-31 16:20:21 +0100167 mmio_guard.unmap(UART_PAGE_ADDR).map_err(|e| {
168 error!("Failed to unshare the UART: {e}");
169 RebootReason::InternalError
170 })?;
171 }
Pierre-Clément Tosi5ad1e8c2023-06-29 10:36:48 +0000172 }
Jakob Vukalovic4c1edbe2023-04-17 19:10:57 +0100173
174 // Drop MemoryTracker and deactivate page table.
175 drop(MEMORY.lock().take());
Pierre-Clément Tosia99bfa62022-10-06 13:30:52 +0100176
Pierre-Clément Tosi97f52492023-04-04 15:52:17 +0100177 Ok((slices.kernel.as_ptr() as usize, next_bcc))
Pierre-Clément Tosi5bbfca52022-10-21 12:14:35 +0100178}
Pierre-Clément Tosi645e90e2022-10-21 13:27:19 +0100179
Pierre-Clément Tosi97f52492023-04-04 15:52:17 +0100180fn jump_to_payload(fdt_address: u64, payload_start: u64, bcc: Range<usize>) -> ! {
181 const ASM_STP_ALIGN: usize = size_of::<u64>() * 2;
Pierre-Clément Tosi6c0d48b2022-11-07 11:00:32 +0000182 const SCTLR_EL1_RES1: u64 = (0b11 << 28) | (0b101 << 20) | (0b1 << 11);
Pierre-Clément Tosi645e90e2022-10-21 13:27:19 +0100183 // Stage 1 instruction access cacheability is unaffected.
Pierre-Clément Tosi6c0d48b2022-11-07 11:00:32 +0000184 const SCTLR_EL1_I: u64 = 0b1 << 12;
Pierre-Clément Tosi645e90e2022-10-21 13:27:19 +0100185 // SETEND instruction disabled at EL0 in aarch32 mode.
Pierre-Clément Tosi6c0d48b2022-11-07 11:00:32 +0000186 const SCTLR_EL1_SED: u64 = 0b1 << 8;
Pierre-Clément Tosi645e90e2022-10-21 13:27:19 +0100187 // Various IT instructions are disabled at EL0 in aarch32 mode.
Pierre-Clément Tosi6c0d48b2022-11-07 11:00:32 +0000188 const SCTLR_EL1_ITD: u64 = 0b1 << 7;
Pierre-Clément Tosi645e90e2022-10-21 13:27:19 +0100189
Pierre-Clément Tosi6c0d48b2022-11-07 11:00:32 +0000190 const SCTLR_EL1_VAL: u64 = SCTLR_EL1_RES1 | SCTLR_EL1_ITD | SCTLR_EL1_SED | SCTLR_EL1_I;
Pierre-Clément Tosi645e90e2022-10-21 13:27:19 +0100191
Pierre-Clément Tosi0b02a2b2024-11-28 22:48:27 +0000192 let scratch = layout::data_bss_range();
Pierre-Clément Tosi97f52492023-04-04 15:52:17 +0100193
Alice Wanga3931aa2023-07-05 12:52:09 +0000194 assert_ne!(scratch.end - scratch.start, 0, "scratch memory is empty.");
195 assert_eq!(scratch.start.0 % ASM_STP_ALIGN, 0, "scratch memory is misaligned.");
196 assert_eq!(scratch.end.0 % ASM_STP_ALIGN, 0, "scratch memory is misaligned.");
Pierre-Clément Tosi97f52492023-04-04 15:52:17 +0100197
Alice Wanga3931aa2023-07-05 12:52:09 +0000198 assert!(bcc.is_within(&(scratch.start.0..scratch.end.0)));
Pierre-Clément Tosi97f52492023-04-04 15:52:17 +0100199 assert_eq!(bcc.start % ASM_STP_ALIGN, 0, "Misaligned guest BCC.");
200 assert_eq!(bcc.end % ASM_STP_ALIGN, 0, "Misaligned guest BCC.");
201
Pierre-Clément Tosiad1fc752023-05-31 16:56:56 +0000202 let stack = memory::stack_range();
Pierre-Clément Tosi97f52492023-04-04 15:52:17 +0100203
Alice Wanga3931aa2023-07-05 12:52:09 +0000204 assert_ne!(stack.end - stack.start, 0, "stack region is empty.");
205 assert_eq!(stack.start.0 % ASM_STP_ALIGN, 0, "Misaligned stack region.");
206 assert_eq!(stack.end.0 % ASM_STP_ALIGN, 0, "Misaligned stack region.");
Pierre-Clément Tosi97f52492023-04-04 15:52:17 +0100207
Pierre-Clément Tosi0b02a2b2024-11-28 22:48:27 +0000208 let eh_stack = layout::eh_stack_range();
209
210 assert_ne!(eh_stack.end - eh_stack.start, 0, "EH stack region is empty.");
211 assert_eq!(eh_stack.start.0 % ASM_STP_ALIGN, 0, "Misaligned EH stack region.");
212 assert_eq!(eh_stack.end.0 % ASM_STP_ALIGN, 0, "Misaligned EH stack region.");
213
Pierre-Clément Tosi97f52492023-04-04 15:52:17 +0100214 // Zero all memory that could hold secrets and that can't be safely written to from Rust.
Pierre-Clément Tosi6c0d48b2022-11-07 11:00:32 +0000215 // Disable the exception vector, caches and page table and then jump to the payload at the
216 // given address, passing it the given FDT pointer.
217 //
Andrew Walbran20bb4e42023-07-07 13:55:55 +0100218 // SAFETY: We're exiting pvmfw by passing the register values we need to a noreturn asm!().
Pierre-Clément Tosi645e90e2022-10-21 13:27:19 +0100219 unsafe {
220 asm!(
Pierre-Clément Tosi97f52492023-04-04 15:52:17 +0100221 "cmp {scratch}, {bcc}",
222 "b.hs 1f",
223
224 // Zero .data & .bss until BCC.
225 "0: stp xzr, xzr, [{scratch}], 16",
226 "cmp {scratch}, {bcc}",
227 "b.lo 0b",
228
229 "1:",
230 // Skip BCC.
231 "mov {scratch}, {bcc_end}",
232 "cmp {scratch}, {scratch_end}",
233 "b.hs 1f",
234
235 // Keep zeroing .data & .bss.
236 "0: stp xzr, xzr, [{scratch}], 16",
237 "cmp {scratch}, {scratch_end}",
238 "b.lo 0b",
239
240 "1:",
241 // Flush d-cache over .data & .bss (including BCC).
242 "0: dc cvau, {cache_line}",
243 "add {cache_line}, {cache_line}, {dcache_line_size}",
244 "cmp {cache_line}, {scratch_end}",
245 "b.lo 0b",
246
247 "mov {cache_line}, {stack}",
248 // Zero stack region.
249 "0: stp xzr, xzr, [{stack}], 16",
250 "cmp {stack}, {stack_end}",
251 "b.lo 0b",
252
253 // Flush d-cache over stack region.
254 "0: dc cvau, {cache_line}",
255 "add {cache_line}, {cache_line}, {dcache_line_size}",
256 "cmp {cache_line}, {stack_end}",
257 "b.lo 0b",
258
Pierre-Clément Tosi0b02a2b2024-11-28 22:48:27 +0000259 "mov {cache_line}, {eh_stack}",
260 // Zero EH stack region.
261 "0: stp xzr, xzr, [{eh_stack}], 16",
262 "cmp {eh_stack}, {eh_stack_end}",
263 "b.lo 0b",
264
265 // Flush d-cache over EH stack region.
266 "0: dc cvau, {cache_line}",
267 "add {cache_line}, {cache_line}, {dcache_line_size}",
268 "cmp {cache_line}, {eh_stack_end}",
269 "b.lo 0b",
270
Pierre-Clément Tosi645e90e2022-10-21 13:27:19 +0100271 "msr sctlr_el1, {sctlr_el1_val}",
272 "isb",
273 "mov x1, xzr",
274 "mov x2, xzr",
275 "mov x3, xzr",
276 "mov x4, xzr",
277 "mov x5, xzr",
278 "mov x6, xzr",
279 "mov x7, xzr",
280 "mov x8, xzr",
281 "mov x9, xzr",
282 "mov x10, xzr",
283 "mov x11, xzr",
284 "mov x12, xzr",
285 "mov x13, xzr",
286 "mov x14, xzr",
287 "mov x15, xzr",
288 "mov x16, xzr",
289 "mov x17, xzr",
290 "mov x18, xzr",
291 "mov x19, xzr",
292 "mov x20, xzr",
293 "mov x21, xzr",
294 "mov x22, xzr",
295 "mov x23, xzr",
296 "mov x24, xzr",
297 "mov x25, xzr",
298 "mov x26, xzr",
299 "mov x27, xzr",
300 "mov x28, xzr",
301 "mov x29, xzr",
302 "msr ttbr0_el1, xzr",
Pierre-Clément Tosi97f52492023-04-04 15:52:17 +0100303 // Ensure that CMOs have completed before entering payload.
Pierre-Clément Tosi645e90e2022-10-21 13:27:19 +0100304 "dsb nsh",
305 "br x30",
306 sctlr_el1_val = in(reg) SCTLR_EL1_VAL,
Pierre-Clément Tosi97f52492023-04-04 15:52:17 +0100307 bcc = in(reg) u64::try_from(bcc.start).unwrap(),
308 bcc_end = in(reg) u64::try_from(bcc.end).unwrap(),
Alice Wanga3931aa2023-07-05 12:52:09 +0000309 cache_line = in(reg) u64::try_from(scratch.start.0).unwrap(),
310 scratch = in(reg) u64::try_from(scratch.start.0).unwrap(),
311 scratch_end = in(reg) u64::try_from(scratch.end.0).unwrap(),
312 stack = in(reg) u64::try_from(stack.start.0).unwrap(),
313 stack_end = in(reg) u64::try_from(stack.end.0).unwrap(),
Pierre-Clément Tosi0b02a2b2024-11-28 22:48:27 +0000314 eh_stack = in(reg) u64::try_from(eh_stack.start.0).unwrap(),
315 eh_stack_end = in(reg) u64::try_from(eh_stack.end.0).unwrap(),
Alice Wang3fa9b802023-06-06 07:52:31 +0000316 dcache_line_size = in(reg) u64::try_from(min_dcache_line_size()).unwrap(),
Pierre-Clément Tosi645e90e2022-10-21 13:27:19 +0100317 in("x0") fdt_address,
318 in("x30") payload_start,
Pierre-Clément Tosi97f52492023-04-04 15:52:17 +0100319 options(noreturn),
Pierre-Clément Tosi645e90e2022-10-21 13:27:19 +0100320 );
321 };
322}
Pierre-Clément Tosie8726e42022-10-17 13:35:27 +0100323
Pierre-Clément Tosi229dd9d2024-11-02 10:34:27 +0000324fn get_appended_data_slice() -> Result<&'static mut [u8], MemoryTrackerError> {
325 let range = MEMORY.lock().as_mut().unwrap().map_image_footer()?;
326 // SAFETY: This region was just mapped for the first time (as map_image_footer() didn't fail)
327 // and the linker script prevents it from overlapping with other objects.
328 Ok(unsafe { slice::from_raw_parts_mut(range.start as *mut u8, range.len()) })
Pierre-Clément Tosie8726e42022-10-17 13:35:27 +0100329}
330
Pierre-Clément Tosi20b60962022-10-17 13:35:27 +0100331enum AppendedPayload<'a> {
332 /// Configuration data.
333 Config(config::Config<'a>),
334 /// Deprecated raw BCC, as used in Android T.
335 LegacyBcc(&'a mut [u8]),
336}
Pierre-Clément Tosie8726e42022-10-17 13:35:27 +0100337
Pierre-Clément Tosi20b60962022-10-17 13:35:27 +0100338impl<'a> AppendedPayload<'a> {
Alan Stokesc3829f12023-06-02 15:02:23 +0100339 fn new(data: &'a mut [u8]) -> Option<Self> {
Pierre-Clément Tosi147addf2024-04-15 15:07:58 +0100340 // The borrow checker gets confused about the ownership of data (see inline comments) so we
341 // intentionally obfuscate it using a raw pointer; see a similar issue (still not addressed
342 // in v1.77) in https://users.rust-lang.org/t/78467.
343 let data_ptr = data as *mut [u8];
344
345 // Config::new() borrows data as mutable ...
346 match config::Config::new(data) {
347 // ... so this branch has a mutable reference to data, from the Ok(Config<'a>). But ...
348 Ok(valid) => Some(Self::Config(valid)),
349 // ... if Config::new(data).is_err(), the Err holds no ref to data. However ...
350 Err(config::Error::InvalidMagic) if cfg!(feature = "legacy") => {
351 // ... the borrow checker still complains about a second mutable ref without this.
352 // SAFETY: Pointer to a valid mut (not accessed elsewhere), 'a lifetime re-used.
353 let data: &'a mut _ = unsafe { &mut *data_ptr };
354
Alice Wangeacb7382023-06-05 12:53:54 +0000355 const BCC_SIZE: usize = SIZE_4KB;
Pierre-Clément Tosi7aca7ff2022-12-12 14:04:30 +0000356 warn!("Assuming the appended data at {:?} to be a raw BCC", data.as_ptr());
357 Some(Self::LegacyBcc(&mut data[..BCC_SIZE]))
358 }
Pierre-Clément Tosi7aca7ff2022-12-12 14:04:30 +0000359 Err(e) => {
Pierre-Clément Tosi147addf2024-04-15 15:07:58 +0100360 error!("Invalid configuration data at {data_ptr:?}: {e}");
361 None
Pierre-Clément Tosi7aca7ff2022-12-12 14:04:30 +0000362 }
Pierre-Clément Tosi7aca7ff2022-12-12 14:04:30 +0000363 }
Pierre-Clément Tosi20b60962022-10-17 13:35:27 +0100364 }
365
Alan Stokes65618332023-12-15 14:09:25 +0000366 fn get_entries(self) -> config::Entries<'a> {
Pierre-Clément Tosi20b60962022-10-17 13:35:27 +0100367 match self {
Alan Stokesd0cf3cd2023-12-12 14:36:37 +0000368 Self::Config(cfg) => cfg.get_entries(),
369 Self::LegacyBcc(bcc) => config::Entries { bcc, ..Default::default() },
Pierre-Clément Tosi8edf72e2022-12-06 16:02:57 +0000370 }
Pierre-Clément Tosie8726e42022-10-17 13:35:27 +0100371 }
372}