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Pierre-Clément Tosia0934c12022-11-25 20:54:11 +00001// Copyright 2022, The Android Open Source Project
2//
3// Licensed under the Apache License, Version 2.0 (the "License");
4// you may not use this file except in compliance with the License.
5// You may obtain a copy of the License at
6//
7// http://www.apache.org/licenses/LICENSE-2.0
8//
9// Unless required by applicable law or agreed to in writing, software
10// distributed under the License is distributed on an "AS IS" BASIS,
11// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
12// See the License for the specific language governing permissions and
13// limitations under the License.
14
15//! High-level FDT functions.
16
Jiyong Parkc5d2ef22023-04-11 01:23:46 +090017use crate::bootargs::BootArgsIterator;
Jiyong Park00ceff32023-03-13 05:43:23 +000018use crate::helpers::GUEST_PAGE_SIZE;
Jiyong Parkc5d2ef22023-04-11 01:23:46 +090019use crate::Box;
Jiyong Park00ceff32023-03-13 05:43:23 +000020use crate::RebootReason;
Jiyong Parke9d87e82023-03-21 19:28:40 +090021use alloc::ffi::CString;
Jiyong Parkc23426b2023-04-10 17:32:27 +090022use alloc::vec::Vec;
Jiyong Park0ee65392023-03-27 20:52:45 +090023use core::cmp::max;
24use core::cmp::min;
Pierre-Clément Tosia0934c12022-11-25 20:54:11 +000025use core::ffi::CStr;
Alice Wangabc7d632023-06-14 09:10:14 +000026use core::fmt;
Jiyong Park9c63cd12023-03-21 17:53:07 +090027use core::mem::size_of;
Pierre-Clément Tosia0934c12022-11-25 20:54:11 +000028use core::ops::Range;
Jiyong Park00ceff32023-03-13 05:43:23 +000029use fdtpci::PciMemoryFlags;
30use fdtpci::PciRangeType;
31use libfdt::AddressRange;
32use libfdt::CellIterator;
Pierre-Clément Tosi4ba79662023-02-13 11:22:41 +000033use libfdt::Fdt;
34use libfdt::FdtError;
Jiyong Park9c63cd12023-03-21 17:53:07 +090035use libfdt::FdtNode;
Alice Wang56ec45b2023-06-15 08:30:32 +000036use libfdt::FdtNodeMut;
Jiyong Park83316122023-03-21 09:39:39 +090037use log::debug;
Jiyong Park00ceff32023-03-13 05:43:23 +000038use log::error;
Jiyong Parkc23426b2023-04-10 17:32:27 +090039use log::info;
Pierre-Clément Tosia50167b2023-05-02 13:19:29 +000040use log::warn;
Jiyong Park00ceff32023-03-13 05:43:23 +000041use tinyvec::ArrayVec;
Alice Wanga3971062023-06-13 11:48:53 +000042use vmbase::cstr;
43use vmbase::fdt::SwiotlbInfo;
Alice Wang63f4c9e2023-06-12 09:36:43 +000044use vmbase::layout::{crosvm::MEM_START, MAX_VIRT_ADDR};
Alice Wangeacb7382023-06-05 12:53:54 +000045use vmbase::memory::SIZE_4KB;
46use vmbase::util::flatten;
Alice Wang4be4dd02023-06-07 07:50:40 +000047use vmbase::util::RangeExt as _;
Pierre-Clément Tosia0934c12022-11-25 20:54:11 +000048
Alice Wangabc7d632023-06-14 09:10:14 +000049/// An enumeration of errors that can occur during the FDT validation.
50#[derive(Clone, Debug)]
51pub enum FdtValidationError {
52 /// Invalid CPU count.
53 InvalidCpuCount(usize),
54}
55
56impl fmt::Display for FdtValidationError {
57 fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result {
58 match self {
59 Self::InvalidCpuCount(num_cpus) => write!(f, "Invalid CPU count: {num_cpus}"),
60 }
61 }
62}
63
Jiyong Park6a8789a2023-03-21 14:50:59 +090064/// Extract from /config the address range containing the pre-loaded kernel. Absence of /config is
65/// not an error.
66fn read_kernel_range_from(fdt: &Fdt) -> libfdt::Result<Option<Range<usize>>> {
Jiyong Parkb87f3302023-03-21 10:03:11 +090067 let addr = cstr!("kernel-address");
68 let size = cstr!("kernel-size");
Pierre-Clément Tosic3811b82022-11-29 11:24:16 +000069
Jiyong Parkb87f3302023-03-21 10:03:11 +090070 if let Some(config) = fdt.node(cstr!("/config"))? {
Pierre-Clément Tosic3811b82022-11-29 11:24:16 +000071 if let (Some(addr), Some(size)) = (config.getprop_u32(addr)?, config.getprop_u32(size)?) {
72 let addr = addr as usize;
73 let size = size as usize;
74
75 return Ok(Some(addr..(addr + size)));
76 }
77 }
78
79 Ok(None)
80}
81
Jiyong Park6a8789a2023-03-21 14:50:59 +090082/// Extract from /chosen the address range containing the pre-loaded ramdisk. Absence is not an
83/// error as there can be initrd-less VM.
84fn read_initrd_range_from(fdt: &Fdt) -> libfdt::Result<Option<Range<usize>>> {
Jiyong Parkb87f3302023-03-21 10:03:11 +090085 let start = cstr!("linux,initrd-start");
86 let end = cstr!("linux,initrd-end");
Pierre-Clément Tosia0934c12022-11-25 20:54:11 +000087
88 if let Some(chosen) = fdt.chosen()? {
89 if let (Some(start), Some(end)) = (chosen.getprop_u32(start)?, chosen.getprop_u32(end)?) {
90 return Ok(Some((start as usize)..(end as usize)));
91 }
92 }
93
94 Ok(None)
95}
Pierre-Clément Tosidb74cb12022-12-08 13:56:25 +000096
Jiyong Park9c63cd12023-03-21 17:53:07 +090097fn patch_initrd_range(fdt: &mut Fdt, initrd_range: &Range<usize>) -> libfdt::Result<()> {
98 let start = u32::try_from(initrd_range.start).unwrap();
99 let end = u32::try_from(initrd_range.end).unwrap();
100
101 let mut node = fdt.chosen_mut()?.ok_or(FdtError::NotFound)?;
102 node.setprop(cstr!("linux,initrd-start"), &start.to_be_bytes())?;
103 node.setprop(cstr!("linux,initrd-end"), &end.to_be_bytes())?;
104 Ok(())
105}
106
Jiyong Parke9d87e82023-03-21 19:28:40 +0900107fn read_bootargs_from(fdt: &Fdt) -> libfdt::Result<Option<CString>> {
108 if let Some(chosen) = fdt.chosen()? {
109 if let Some(bootargs) = chosen.getprop_str(cstr!("bootargs"))? {
110 // We need to copy the string to heap because the original fdt will be invalidated
111 // by the templated DT
112 let copy = CString::new(bootargs.to_bytes()).map_err(|_| FdtError::BadValue)?;
113 return Ok(Some(copy));
114 }
115 }
116 Ok(None)
117}
118
119fn patch_bootargs(fdt: &mut Fdt, bootargs: &CStr) -> libfdt::Result<()> {
120 let mut node = fdt.chosen_mut()?.ok_or(FdtError::NotFound)?;
Jiyong Parkc5d2ef22023-04-11 01:23:46 +0900121 // This function is called before the verification is done. So, we just copy the bootargs to
122 // the new FDT unmodified. This will be filtered again in the modify_for_next_stage function
123 // if the VM is not debuggable.
Jiyong Parke9d87e82023-03-21 19:28:40 +0900124 node.setprop(cstr!("bootargs"), bootargs.to_bytes_with_nul())
125}
126
Alice Wang0d527472023-06-13 14:55:38 +0000127/// Reads and validates the memory range in the DT.
128///
129/// Only one memory range is expected with the crosvm setup for now.
130fn read_and_validate_memory_range(fdt: &Fdt) -> Result<Range<usize>, RebootReason> {
131 let mut memory = fdt.memory().map_err(|e| {
132 error!("Failed to read memory range from DT: {e}");
133 RebootReason::InvalidFdt
134 })?;
135 let range = memory.next().ok_or_else(|| {
136 error!("The /memory node in the DT contains no range.");
137 RebootReason::InvalidFdt
138 })?;
139 if memory.next().is_some() {
140 warn!(
141 "The /memory node in the DT contains more than one memory range, \
142 while only one is expected."
143 );
144 }
Jiyong Park6a8789a2023-03-21 14:50:59 +0900145 let base = range.start;
Alice Wange243d462023-06-06 15:18:12 +0000146 if base != MEM_START {
147 error!("Memory base address {:#x} is not {:#x}", base, MEM_START);
Jiyong Park00ceff32023-03-13 05:43:23 +0000148 return Err(RebootReason::InvalidFdt);
149 }
150
Jiyong Park6a8789a2023-03-21 14:50:59 +0900151 let size = range.len();
Jiyong Park00ceff32023-03-13 05:43:23 +0000152 if size % GUEST_PAGE_SIZE != 0 {
153 error!("Memory size {:#x} is not a multiple of page size {:#x}", size, GUEST_PAGE_SIZE);
154 return Err(RebootReason::InvalidFdt);
155 }
Jiyong Park00ceff32023-03-13 05:43:23 +0000156
Jiyong Park6a8789a2023-03-21 14:50:59 +0900157 if size == 0 {
158 error!("Memory size is 0");
159 return Err(RebootReason::InvalidFdt);
160 }
Alice Wang0d527472023-06-13 14:55:38 +0000161 Ok(range)
Jiyong Park00ceff32023-03-13 05:43:23 +0000162}
163
Jiyong Park9c63cd12023-03-21 17:53:07 +0900164fn patch_memory_range(fdt: &mut Fdt, memory_range: &Range<usize>) -> libfdt::Result<()> {
165 let size = memory_range.len() as u64;
Jiyong Park0ee65392023-03-27 20:52:45 +0900166 fdt.node_mut(cstr!("/memory"))?
167 .ok_or(FdtError::NotFound)?
Alice Wange243d462023-06-06 15:18:12 +0000168 .setprop_inplace(cstr!("reg"), flatten(&[MEM_START.to_be_bytes(), size.to_be_bytes()]))
Jiyong Park9c63cd12023-03-21 17:53:07 +0900169}
170
Jiyong Park6a8789a2023-03-21 14:50:59 +0900171/// Read the number of CPUs from DT
172fn read_num_cpus_from(fdt: &Fdt) -> libfdt::Result<usize> {
173 Ok(fdt.compatible_nodes(cstr!("arm,arm-v8"))?.count())
174}
175
176/// Validate number of CPUs
Alice Wangabc7d632023-06-14 09:10:14 +0000177fn validate_num_cpus(num_cpus: usize) -> Result<(), FdtValidationError> {
178 if num_cpus == 0 || DeviceTreeInfo::gic_patched_size(num_cpus).is_none() {
179 Err(FdtValidationError::InvalidCpuCount(num_cpus))
180 } else {
181 Ok(())
Jiyong Park6a8789a2023-03-21 14:50:59 +0900182 }
Jiyong Park9c63cd12023-03-21 17:53:07 +0900183}
184
185/// Patch DT by keeping `num_cpus` number of arm,arm-v8 compatible nodes, and pruning the rest.
186fn patch_num_cpus(fdt: &mut Fdt, num_cpus: usize) -> libfdt::Result<()> {
187 let cpu = cstr!("arm,arm-v8");
188 let mut next = fdt.root_mut()?.next_compatible(cpu)?;
189 for _ in 0..num_cpus {
190 next = if let Some(current) = next {
191 current.next_compatible(cpu)?
192 } else {
193 return Err(FdtError::NoSpace);
194 };
195 }
196 while let Some(current) = next {
197 next = current.delete_and_next_compatible(cpu)?;
198 }
Jiyong Park6a8789a2023-03-21 14:50:59 +0900199 Ok(())
Jiyong Park00ceff32023-03-13 05:43:23 +0000200}
201
202#[derive(Debug)]
Jiyong Park00ceff32023-03-13 05:43:23 +0000203struct PciInfo {
Jiyong Park6a8789a2023-03-21 14:50:59 +0900204 ranges: [PciAddrRange; 2],
205 irq_masks: ArrayVec<[PciIrqMask; PciInfo::MAX_IRQS]>,
206 irq_maps: ArrayVec<[PciIrqMap; PciInfo::MAX_IRQS]>,
Jiyong Park00ceff32023-03-13 05:43:23 +0000207}
208
Jiyong Park6a8789a2023-03-21 14:50:59 +0900209impl PciInfo {
210 const IRQ_MASK_CELLS: usize = 4;
211 const IRQ_MAP_CELLS: usize = 10;
212 const MAX_IRQS: usize = 8;
Jiyong Park00ceff32023-03-13 05:43:23 +0000213}
214
Jiyong Park6a8789a2023-03-21 14:50:59 +0900215type PciAddrRange = AddressRange<(u32, u64), u64, u64>;
216type PciIrqMask = [u32; PciInfo::IRQ_MASK_CELLS];
217type PciIrqMap = [u32; PciInfo::IRQ_MAP_CELLS];
Jiyong Park00ceff32023-03-13 05:43:23 +0000218
219/// Iterator that takes N cells as a chunk
220struct CellChunkIterator<'a, const N: usize> {
221 cells: CellIterator<'a>,
222}
223
224impl<'a, const N: usize> CellChunkIterator<'a, N> {
225 fn new(cells: CellIterator<'a>) -> Self {
226 Self { cells }
227 }
228}
229
230impl<'a, const N: usize> Iterator for CellChunkIterator<'a, N> {
231 type Item = [u32; N];
232 fn next(&mut self) -> Option<Self::Item> {
233 let mut ret: Self::Item = [0; N];
234 for i in ret.iter_mut() {
235 *i = self.cells.next()?;
236 }
237 Some(ret)
238 }
239}
240
Jiyong Park6a8789a2023-03-21 14:50:59 +0900241/// Read pci host controller ranges, irq maps, and irq map masks from DT
242fn read_pci_info_from(fdt: &Fdt) -> libfdt::Result<PciInfo> {
243 let node =
244 fdt.compatible_nodes(cstr!("pci-host-cam-generic"))?.next().ok_or(FdtError::NotFound)?;
245
246 let mut ranges = node.ranges::<(u32, u64), u64, u64>()?.ok_or(FdtError::NotFound)?;
247 let range0 = ranges.next().ok_or(FdtError::NotFound)?;
248 let range1 = ranges.next().ok_or(FdtError::NotFound)?;
249
250 let irq_masks = node.getprop_cells(cstr!("interrupt-map-mask"))?.ok_or(FdtError::NotFound)?;
251 let irq_masks = CellChunkIterator::<{ PciInfo::IRQ_MASK_CELLS }>::new(irq_masks);
252 let irq_masks: ArrayVec<[PciIrqMask; PciInfo::MAX_IRQS]> =
253 irq_masks.take(PciInfo::MAX_IRQS).collect();
254
255 let irq_maps = node.getprop_cells(cstr!("interrupt-map"))?.ok_or(FdtError::NotFound)?;
256 let irq_maps = CellChunkIterator::<{ PciInfo::IRQ_MAP_CELLS }>::new(irq_maps);
257 let irq_maps: ArrayVec<[PciIrqMap; PciInfo::MAX_IRQS]> =
258 irq_maps.take(PciInfo::MAX_IRQS).collect();
259
260 Ok(PciInfo { ranges: [range0, range1], irq_masks, irq_maps })
261}
262
Jiyong Park0ee65392023-03-27 20:52:45 +0900263fn validate_pci_info(pci_info: &PciInfo, memory_range: &Range<usize>) -> Result<(), RebootReason> {
Jiyong Park6a8789a2023-03-21 14:50:59 +0900264 for range in pci_info.ranges.iter() {
Jiyong Park0ee65392023-03-27 20:52:45 +0900265 validate_pci_addr_range(range, memory_range)?;
Jiyong Park6a8789a2023-03-21 14:50:59 +0900266 }
267 for irq_mask in pci_info.irq_masks.iter() {
268 validate_pci_irq_mask(irq_mask)?;
269 }
270 for (idx, irq_map) in pci_info.irq_maps.iter().enumerate() {
271 validate_pci_irq_map(irq_map, idx)?;
272 }
273 Ok(())
274}
275
Jiyong Park0ee65392023-03-27 20:52:45 +0900276fn validate_pci_addr_range(
277 range: &PciAddrRange,
278 memory_range: &Range<usize>,
279) -> Result<(), RebootReason> {
Jiyong Park6a8789a2023-03-21 14:50:59 +0900280 let mem_flags = PciMemoryFlags(range.addr.0);
281 let range_type = mem_flags.range_type();
282 let prefetchable = mem_flags.prefetchable();
283 let bus_addr = range.addr.1;
284 let cpu_addr = range.parent_addr;
285 let size = range.size;
286
287 if range_type != PciRangeType::Memory64 {
288 error!("Invalid range type {:?} for bus address {:#x} in PCI node", range_type, bus_addr);
289 return Err(RebootReason::InvalidFdt);
290 }
291 if prefetchable {
292 error!("PCI bus address {:#x} in PCI node is prefetchable", bus_addr);
293 return Err(RebootReason::InvalidFdt);
294 }
295 // Enforce ID bus-to-cpu mappings, as used by crosvm.
296 if bus_addr != cpu_addr {
297 error!("PCI bus address: {:#x} is different from CPU address: {:#x}", bus_addr, cpu_addr);
298 return Err(RebootReason::InvalidFdt);
299 }
300
Jiyong Park0ee65392023-03-27 20:52:45 +0900301 let Some(bus_end) = bus_addr.checked_add(size) else {
302 error!("PCI address range size {:#x} overflows", size);
303 return Err(RebootReason::InvalidFdt);
304 };
Alice Wang63f4c9e2023-06-12 09:36:43 +0000305 if bus_end > MAX_VIRT_ADDR.try_into().unwrap() {
Jiyong Park0ee65392023-03-27 20:52:45 +0900306 error!("PCI address end {:#x} is outside of translatable range", bus_end);
307 return Err(RebootReason::InvalidFdt);
308 }
309
310 let memory_start = memory_range.start.try_into().unwrap();
311 let memory_end = memory_range.end.try_into().unwrap();
312
313 if max(bus_addr, memory_start) < min(bus_end, memory_end) {
314 error!(
315 "PCI address range {:#x}-{:#x} overlaps with main memory range {:#x}-{:#x}",
316 bus_addr, bus_end, memory_start, memory_end
317 );
Jiyong Park6a8789a2023-03-21 14:50:59 +0900318 return Err(RebootReason::InvalidFdt);
319 }
320
321 Ok(())
322}
323
324fn validate_pci_irq_mask(irq_mask: &PciIrqMask) -> Result<(), RebootReason> {
Jiyong Park00ceff32023-03-13 05:43:23 +0000325 const IRQ_MASK_ADDR_HI: u32 = 0xf800;
326 const IRQ_MASK_ADDR_ME: u32 = 0x0;
327 const IRQ_MASK_ADDR_LO: u32 = 0x0;
328 const IRQ_MASK_ANY_IRQ: u32 = 0x7;
Jiyong Park6a8789a2023-03-21 14:50:59 +0900329 const EXPECTED: PciIrqMask =
Jiyong Park00ceff32023-03-13 05:43:23 +0000330 [IRQ_MASK_ADDR_HI, IRQ_MASK_ADDR_ME, IRQ_MASK_ADDR_LO, IRQ_MASK_ANY_IRQ];
Jiyong Park6a8789a2023-03-21 14:50:59 +0900331 if *irq_mask != EXPECTED {
332 error!("Invalid PCI irq mask {:#?}", irq_mask);
333 return Err(RebootReason::InvalidFdt);
Jiyong Park00ceff32023-03-13 05:43:23 +0000334 }
Jiyong Park6a8789a2023-03-21 14:50:59 +0900335 Ok(())
Jiyong Park00ceff32023-03-13 05:43:23 +0000336}
337
Jiyong Park6a8789a2023-03-21 14:50:59 +0900338fn validate_pci_irq_map(irq_map: &PciIrqMap, idx: usize) -> Result<(), RebootReason> {
Jiyong Park00ceff32023-03-13 05:43:23 +0000339 const PCI_DEVICE_IDX: usize = 11;
340 const PCI_IRQ_ADDR_ME: u32 = 0;
341 const PCI_IRQ_ADDR_LO: u32 = 0;
342 const PCI_IRQ_INTC: u32 = 1;
343 const AARCH64_IRQ_BASE: u32 = 4; // from external/crosvm/aarch64/src/lib.rs
344 const GIC_SPI: u32 = 0;
345 const IRQ_TYPE_LEVEL_HIGH: u32 = 4;
346
Jiyong Park6a8789a2023-03-21 14:50:59 +0900347 let pci_addr = (irq_map[0], irq_map[1], irq_map[2]);
348 let pci_irq_number = irq_map[3];
349 let _controller_phandle = irq_map[4]; // skipped.
350 let gic_addr = (irq_map[5], irq_map[6]); // address-cells is <2> for GIC
351 // interrupt-cells is <3> for GIC
352 let gic_peripheral_interrupt_type = irq_map[7];
353 let gic_irq_number = irq_map[8];
354 let gic_irq_type = irq_map[9];
Jiyong Park00ceff32023-03-13 05:43:23 +0000355
Jiyong Park6a8789a2023-03-21 14:50:59 +0900356 let phys_hi: u32 = (0x1 << PCI_DEVICE_IDX) * (idx + 1) as u32;
357 let expected_pci_addr = (phys_hi, PCI_IRQ_ADDR_ME, PCI_IRQ_ADDR_LO);
Jiyong Park00ceff32023-03-13 05:43:23 +0000358
Jiyong Park6a8789a2023-03-21 14:50:59 +0900359 if pci_addr != expected_pci_addr {
360 error!("PCI device address {:#x} {:#x} {:#x} in interrupt-map is different from expected address \
361 {:#x} {:#x} {:#x}",
362 pci_addr.0, pci_addr.1, pci_addr.2, expected_pci_addr.0, expected_pci_addr.1, expected_pci_addr.2);
363 return Err(RebootReason::InvalidFdt);
364 }
Jiyong Park00ceff32023-03-13 05:43:23 +0000365
Jiyong Park6a8789a2023-03-21 14:50:59 +0900366 if pci_irq_number != PCI_IRQ_INTC {
367 error!(
368 "PCI INT# {:#x} in interrupt-map is different from expected value {:#x}",
369 pci_irq_number, PCI_IRQ_INTC
370 );
371 return Err(RebootReason::InvalidFdt);
372 }
Jiyong Park00ceff32023-03-13 05:43:23 +0000373
Jiyong Park6a8789a2023-03-21 14:50:59 +0900374 if gic_addr != (0, 0) {
375 error!(
376 "GIC address {:#x} {:#x} in interrupt-map is different from expected address \
377 {:#x} {:#x}",
378 gic_addr.0, gic_addr.1, 0, 0
379 );
380 return Err(RebootReason::InvalidFdt);
381 }
382
383 if gic_peripheral_interrupt_type != GIC_SPI {
384 error!("GIC peripheral interrupt type {:#x} in interrupt-map is different from expected value \
385 {:#x}", gic_peripheral_interrupt_type, GIC_SPI);
386 return Err(RebootReason::InvalidFdt);
387 }
388
389 let irq_nr: u32 = AARCH64_IRQ_BASE + (idx as u32);
390 if gic_irq_number != irq_nr {
391 error!(
392 "GIC irq number {:#x} in interrupt-map is unexpected. Expected {:#x}",
393 gic_irq_number, irq_nr
394 );
395 return Err(RebootReason::InvalidFdt);
396 }
397
398 if gic_irq_type != IRQ_TYPE_LEVEL_HIGH {
399 error!(
400 "IRQ type in {:#x} is invalid. Must be LEVEL_HIGH {:#x}",
401 gic_irq_type, IRQ_TYPE_LEVEL_HIGH
402 );
403 return Err(RebootReason::InvalidFdt);
Jiyong Park00ceff32023-03-13 05:43:23 +0000404 }
405 Ok(())
406}
407
Jiyong Park9c63cd12023-03-21 17:53:07 +0900408fn patch_pci_info(fdt: &mut Fdt, pci_info: &PciInfo) -> libfdt::Result<()> {
409 let mut node = fdt
410 .root_mut()?
411 .next_compatible(cstr!("pci-host-cam-generic"))?
412 .ok_or(FdtError::NotFound)?;
413
414 let irq_masks_size = pci_info.irq_masks.len() * size_of::<PciIrqMask>();
415 node.trimprop(cstr!("interrupt-map-mask"), irq_masks_size)?;
416
417 let irq_maps_size = pci_info.irq_maps.len() * size_of::<PciIrqMap>();
418 node.trimprop(cstr!("interrupt-map"), irq_maps_size)?;
419
420 node.setprop_inplace(
421 cstr!("ranges"),
422 flatten(&[pci_info.ranges[0].to_cells(), pci_info.ranges[1].to_cells()]),
423 )
424}
425
Jiyong Park00ceff32023-03-13 05:43:23 +0000426#[derive(Default, Debug)]
Jiyong Park6a8789a2023-03-21 14:50:59 +0900427struct SerialInfo {
428 addrs: ArrayVec<[u64; Self::MAX_SERIALS]>,
Jiyong Park00ceff32023-03-13 05:43:23 +0000429}
430
431impl SerialInfo {
Jiyong Park6a8789a2023-03-21 14:50:59 +0900432 const MAX_SERIALS: usize = 4;
Jiyong Park00ceff32023-03-13 05:43:23 +0000433}
434
Jiyong Park6a8789a2023-03-21 14:50:59 +0900435fn read_serial_info_from(fdt: &Fdt) -> libfdt::Result<SerialInfo> {
436 let mut addrs: ArrayVec<[u64; SerialInfo::MAX_SERIALS]> = Default::default();
437 for node in fdt.compatible_nodes(cstr!("ns16550a"))?.take(SerialInfo::MAX_SERIALS) {
438 let reg = node.reg()?.ok_or(FdtError::NotFound)?.next().ok_or(FdtError::NotFound)?;
439 addrs.push(reg.addr);
Jiyong Park00ceff32023-03-13 05:43:23 +0000440 }
Jiyong Park6a8789a2023-03-21 14:50:59 +0900441 Ok(SerialInfo { addrs })
Jiyong Park00ceff32023-03-13 05:43:23 +0000442}
443
Jiyong Park9c63cd12023-03-21 17:53:07 +0900444/// Patch the DT by deleting the ns16550a compatible nodes whose address are unknown
445fn patch_serial_info(fdt: &mut Fdt, serial_info: &SerialInfo) -> libfdt::Result<()> {
446 let name = cstr!("ns16550a");
447 let mut next = fdt.root_mut()?.next_compatible(name);
448 while let Some(current) = next? {
449 let reg = FdtNode::from_mut(&current)
450 .reg()?
451 .ok_or(FdtError::NotFound)?
452 .next()
453 .ok_or(FdtError::NotFound)?;
454 next = if !serial_info.addrs.contains(&reg.addr) {
455 current.delete_and_next_compatible(name)
456 } else {
457 current.next_compatible(name)
458 }
459 }
460 Ok(())
461}
462
Srivatsa Vaddagiri2df297f2023-04-12 03:11:05 -0700463fn validate_swiotlb_info(
464 swiotlb_info: &SwiotlbInfo,
465 memory: &Range<usize>,
466) -> Result<(), RebootReason> {
Jiyong Park6a8789a2023-03-21 14:50:59 +0900467 let size = swiotlb_info.size;
468 let align = swiotlb_info.align;
Jiyong Park00ceff32023-03-13 05:43:23 +0000469
Srivatsa Vaddagiri2df297f2023-04-12 03:11:05 -0700470 if size == 0 || (size % GUEST_PAGE_SIZE) != 0 {
Jiyong Park00ceff32023-03-13 05:43:23 +0000471 error!("Invalid swiotlb size {:#x}", size);
472 return Err(RebootReason::InvalidFdt);
473 }
474
Pierre-Clément Tosibe3a97b2023-05-19 14:56:23 +0000475 if let Some(align) = align.filter(|&a| a % GUEST_PAGE_SIZE != 0) {
Jiyong Park00ceff32023-03-13 05:43:23 +0000476 error!("Invalid swiotlb alignment {:#x}", align);
477 return Err(RebootReason::InvalidFdt);
478 }
Srivatsa Vaddagiri2df297f2023-04-12 03:11:05 -0700479
Alice Wang9cfbfd62023-06-14 11:19:03 +0000480 if let Some(addr) = swiotlb_info.addr {
481 if addr.checked_add(size).is_none() {
482 error!("Invalid swiotlb range: addr:{addr:#x} size:{size:#x}");
483 return Err(RebootReason::InvalidFdt);
484 }
485 }
Srivatsa Vaddagiri2df297f2023-04-12 03:11:05 -0700486 if let Some(range) = swiotlb_info.fixed_range() {
487 if !range.is_within(memory) {
488 error!("swiotlb range {range:#x?} not part of memory range {memory:#x?}");
489 return Err(RebootReason::InvalidFdt);
490 }
491 }
492
Jiyong Park6a8789a2023-03-21 14:50:59 +0900493 Ok(())
Jiyong Park00ceff32023-03-13 05:43:23 +0000494}
495
Jiyong Park9c63cd12023-03-21 17:53:07 +0900496fn patch_swiotlb_info(fdt: &mut Fdt, swiotlb_info: &SwiotlbInfo) -> libfdt::Result<()> {
497 let mut node =
498 fdt.root_mut()?.next_compatible(cstr!("restricted-dma-pool"))?.ok_or(FdtError::NotFound)?;
Srivatsa Vaddagiri2df297f2023-04-12 03:11:05 -0700499
500 if let Some(range) = swiotlb_info.fixed_range() {
Pierre-Clément Tosic27c4272023-05-19 15:46:26 +0000501 node.setprop_addrrange_inplace(
Srivatsa Vaddagiri2df297f2023-04-12 03:11:05 -0700502 cstr!("reg"),
503 range.start.try_into().unwrap(),
504 range.len().try_into().unwrap(),
505 )?;
Pierre-Clément Tosibe3a97b2023-05-19 14:56:23 +0000506 node.nop_property(cstr!("size"))?;
507 node.nop_property(cstr!("alignment"))?;
Srivatsa Vaddagiri2df297f2023-04-12 03:11:05 -0700508 } else {
Pierre-Clément Tosic27c4272023-05-19 15:46:26 +0000509 node.nop_property(cstr!("reg"))?;
Srivatsa Vaddagiri2df297f2023-04-12 03:11:05 -0700510 node.setprop_inplace(cstr!("size"), &swiotlb_info.size.to_be_bytes())?;
Pierre-Clément Tosibe3a97b2023-05-19 14:56:23 +0000511 node.setprop_inplace(cstr!("alignment"), &swiotlb_info.align.unwrap().to_be_bytes())?;
Srivatsa Vaddagiri2df297f2023-04-12 03:11:05 -0700512 }
513
Jiyong Park9c63cd12023-03-21 17:53:07 +0900514 Ok(())
515}
516
517fn patch_gic(fdt: &mut Fdt, num_cpus: usize) -> libfdt::Result<()> {
518 let node = fdt.compatible_nodes(cstr!("arm,gic-v3"))?.next().ok_or(FdtError::NotFound)?;
519 let mut ranges = node.reg()?.ok_or(FdtError::NotFound)?;
520 let range0 = ranges.next().ok_or(FdtError::NotFound)?;
521 let mut range1 = ranges.next().ok_or(FdtError::NotFound)?;
522
523 let addr = range0.addr;
Alice Wangabc7d632023-06-14 09:10:14 +0000524 // `validate_num_cpus()` checked that this wouldn't panic
525 let size = u64::try_from(DeviceTreeInfo::gic_patched_size(num_cpus).unwrap()).unwrap();
Jiyong Park9c63cd12023-03-21 17:53:07 +0900526
527 // range1 is just below range0
528 range1.addr = addr - size;
529 range1.size = Some(size);
530
531 let range0 = range0.to_cells();
532 let range1 = range1.to_cells();
533 let value = [
534 range0.0, // addr
535 range0.1.unwrap(), //size
536 range1.0, // addr
537 range1.1.unwrap(), //size
538 ];
539
540 let mut node =
541 fdt.root_mut()?.next_compatible(cstr!("arm,gic-v3"))?.ok_or(FdtError::NotFound)?;
542 node.setprop_inplace(cstr!("reg"), flatten(&value))
543}
544
545fn patch_timer(fdt: &mut Fdt, num_cpus: usize) -> libfdt::Result<()> {
546 const NUM_INTERRUPTS: usize = 4;
547 const CELLS_PER_INTERRUPT: usize = 3;
548 let node = fdt.compatible_nodes(cstr!("arm,armv8-timer"))?.next().ok_or(FdtError::NotFound)?;
549 let interrupts = node.getprop_cells(cstr!("interrupts"))?.ok_or(FdtError::NotFound)?;
550 let mut value: ArrayVec<[u32; NUM_INTERRUPTS * CELLS_PER_INTERRUPT]> =
551 interrupts.take(NUM_INTERRUPTS * CELLS_PER_INTERRUPT).collect();
552
553 let num_cpus: u32 = num_cpus.try_into().unwrap();
554 let cpu_mask: u32 = (((0x1 << num_cpus) - 1) & 0xff) << 8;
555 for v in value.iter_mut().skip(2).step_by(CELLS_PER_INTERRUPT) {
556 *v |= cpu_mask;
557 }
558 for v in value.iter_mut() {
559 *v = v.to_be();
560 }
561
562 // SAFETY - array size is the same
563 let value = unsafe {
564 core::mem::transmute::<
565 [u32; NUM_INTERRUPTS * CELLS_PER_INTERRUPT],
566 [u8; NUM_INTERRUPTS * CELLS_PER_INTERRUPT * size_of::<u32>()],
567 >(value.into_inner())
568 };
569
570 let mut node =
571 fdt.root_mut()?.next_compatible(cstr!("arm,armv8-timer"))?.ok_or(FdtError::NotFound)?;
572 node.setprop_inplace(cstr!("interrupts"), value.as_slice())
573}
574
Jiyong Park00ceff32023-03-13 05:43:23 +0000575#[derive(Debug)]
Jiyong Park6a8789a2023-03-21 14:50:59 +0900576pub struct DeviceTreeInfo {
577 pub kernel_range: Option<Range<usize>>,
578 pub initrd_range: Option<Range<usize>>,
579 pub memory_range: Range<usize>,
Jiyong Parke9d87e82023-03-21 19:28:40 +0900580 bootargs: Option<CString>,
Jiyong Park6a8789a2023-03-21 14:50:59 +0900581 num_cpus: usize,
Jiyong Park00ceff32023-03-13 05:43:23 +0000582 pci_info: PciInfo,
583 serial_info: SerialInfo,
Srivatsa Vaddagiri37713ec2023-04-20 04:04:08 -0700584 pub swiotlb_info: SwiotlbInfo,
Jiyong Park00ceff32023-03-13 05:43:23 +0000585}
586
587impl DeviceTreeInfo {
Alice Wangabc7d632023-06-14 09:10:14 +0000588 fn gic_patched_size(num_cpus: usize) -> Option<usize> {
589 const GIC_REDIST_SIZE_PER_CPU: usize = 32 * SIZE_4KB;
590
591 GIC_REDIST_SIZE_PER_CPU.checked_mul(num_cpus)
592 }
Jiyong Park00ceff32023-03-13 05:43:23 +0000593}
594
Jiyong Park9c63cd12023-03-21 17:53:07 +0900595pub fn sanitize_device_tree(fdt: &mut Fdt) -> Result<DeviceTreeInfo, RebootReason> {
Jiyong Park83316122023-03-21 09:39:39 +0900596 let info = parse_device_tree(fdt)?;
597 debug!("Device tree info: {:?}", info);
598
Jiyong Parke9d87e82023-03-21 19:28:40 +0900599 fdt.copy_from_slice(pvmfw_fdt_template::RAW).map_err(|e| {
600 error!("Failed to instantiate FDT from the template DT: {e}");
601 RebootReason::InvalidFdt
602 })?;
603
Jiyong Park9c63cd12023-03-21 17:53:07 +0900604 patch_device_tree(fdt, &info)?;
Jiyong Park6a8789a2023-03-21 14:50:59 +0900605 Ok(info)
Jiyong Park83316122023-03-21 09:39:39 +0900606}
607
608fn parse_device_tree(fdt: &libfdt::Fdt) -> Result<DeviceTreeInfo, RebootReason> {
Jiyong Park6a8789a2023-03-21 14:50:59 +0900609 let kernel_range = read_kernel_range_from(fdt).map_err(|e| {
610 error!("Failed to read kernel range from DT: {e}");
611 RebootReason::InvalidFdt
612 })?;
613
614 let initrd_range = read_initrd_range_from(fdt).map_err(|e| {
615 error!("Failed to read initrd range from DT: {e}");
616 RebootReason::InvalidFdt
617 })?;
618
Alice Wang0d527472023-06-13 14:55:38 +0000619 let memory_range = read_and_validate_memory_range(fdt)?;
Jiyong Park6a8789a2023-03-21 14:50:59 +0900620
Jiyong Parke9d87e82023-03-21 19:28:40 +0900621 let bootargs = read_bootargs_from(fdt).map_err(|e| {
622 error!("Failed to read bootargs from DT: {e}");
623 RebootReason::InvalidFdt
624 })?;
625
Jiyong Park6a8789a2023-03-21 14:50:59 +0900626 let num_cpus = read_num_cpus_from(fdt).map_err(|e| {
627 error!("Failed to read num cpus from DT: {e}");
628 RebootReason::InvalidFdt
629 })?;
Alice Wangabc7d632023-06-14 09:10:14 +0000630 validate_num_cpus(num_cpus).map_err(|e| {
631 error!("Failed to validate num cpus from DT: {e}");
632 RebootReason::InvalidFdt
633 })?;
Jiyong Park6a8789a2023-03-21 14:50:59 +0900634
635 let pci_info = read_pci_info_from(fdt).map_err(|e| {
636 error!("Failed to read pci info from DT: {e}");
637 RebootReason::InvalidFdt
638 })?;
Jiyong Park0ee65392023-03-27 20:52:45 +0900639 validate_pci_info(&pci_info, &memory_range)?;
Jiyong Park6a8789a2023-03-21 14:50:59 +0900640
641 let serial_info = read_serial_info_from(fdt).map_err(|e| {
642 error!("Failed to read serial info from DT: {e}");
643 RebootReason::InvalidFdt
644 })?;
645
Alice Wang9cfbfd62023-06-14 11:19:03 +0000646 let swiotlb_info = SwiotlbInfo::new_from_fdt(fdt).map_err(|e| {
Jiyong Park6a8789a2023-03-21 14:50:59 +0900647 error!("Failed to read swiotlb info from DT: {e}");
648 RebootReason::InvalidFdt
649 })?;
Srivatsa Vaddagiri2df297f2023-04-12 03:11:05 -0700650 validate_swiotlb_info(&swiotlb_info, &memory_range)?;
Jiyong Park6a8789a2023-03-21 14:50:59 +0900651
Jiyong Park00ceff32023-03-13 05:43:23 +0000652 Ok(DeviceTreeInfo {
Jiyong Park6a8789a2023-03-21 14:50:59 +0900653 kernel_range,
654 initrd_range,
655 memory_range,
Jiyong Parke9d87e82023-03-21 19:28:40 +0900656 bootargs,
Jiyong Park6a8789a2023-03-21 14:50:59 +0900657 num_cpus,
658 pci_info,
659 serial_info,
660 swiotlb_info,
Jiyong Park00ceff32023-03-13 05:43:23 +0000661 })
662}
663
Jiyong Park9c63cd12023-03-21 17:53:07 +0900664fn patch_device_tree(fdt: &mut Fdt, info: &DeviceTreeInfo) -> Result<(), RebootReason> {
Jiyong Parke9d87e82023-03-21 19:28:40 +0900665 fdt.unpack().map_err(|e| {
666 error!("Failed to unpack DT for patching: {e}");
667 RebootReason::InvalidFdt
668 })?;
669
Jiyong Park9c63cd12023-03-21 17:53:07 +0900670 if let Some(initrd_range) = &info.initrd_range {
671 patch_initrd_range(fdt, initrd_range).map_err(|e| {
672 error!("Failed to patch initrd range to DT: {e}");
673 RebootReason::InvalidFdt
674 })?;
675 }
676 patch_memory_range(fdt, &info.memory_range).map_err(|e| {
677 error!("Failed to patch memory range to DT: {e}");
678 RebootReason::InvalidFdt
679 })?;
Jiyong Parke9d87e82023-03-21 19:28:40 +0900680 if let Some(bootargs) = &info.bootargs {
681 patch_bootargs(fdt, bootargs.as_c_str()).map_err(|e| {
682 error!("Failed to patch bootargs to DT: {e}");
683 RebootReason::InvalidFdt
684 })?;
685 }
Jiyong Park9c63cd12023-03-21 17:53:07 +0900686 patch_num_cpus(fdt, info.num_cpus).map_err(|e| {
687 error!("Failed to patch cpus to DT: {e}");
688 RebootReason::InvalidFdt
689 })?;
690 patch_pci_info(fdt, &info.pci_info).map_err(|e| {
691 error!("Failed to patch pci info to DT: {e}");
692 RebootReason::InvalidFdt
693 })?;
694 patch_serial_info(fdt, &info.serial_info).map_err(|e| {
695 error!("Failed to patch serial info to DT: {e}");
696 RebootReason::InvalidFdt
697 })?;
698 patch_swiotlb_info(fdt, &info.swiotlb_info).map_err(|e| {
699 error!("Failed to patch swiotlb info to DT: {e}");
700 RebootReason::InvalidFdt
701 })?;
702 patch_gic(fdt, info.num_cpus).map_err(|e| {
703 error!("Failed to patch gic info to DT: {e}");
704 RebootReason::InvalidFdt
705 })?;
706 patch_timer(fdt, info.num_cpus).map_err(|e| {
707 error!("Failed to patch timer info to DT: {e}");
708 RebootReason::InvalidFdt
709 })?;
Jiyong Parke9d87e82023-03-21 19:28:40 +0900710
711 fdt.pack().map_err(|e| {
712 error!("Failed to pack DT after patching: {e}");
713 RebootReason::InvalidFdt
714 })?;
715
Jiyong Park9c63cd12023-03-21 17:53:07 +0900716 Ok(())
717}
718
Pierre-Clément Tosi4ba79662023-02-13 11:22:41 +0000719/// Modifies the input DT according to the fields of the configuration.
720pub fn modify_for_next_stage(
721 fdt: &mut Fdt,
722 bcc: &[u8],
723 new_instance: bool,
724 strict_boot: bool,
Jiyong Parkc23426b2023-04-10 17:32:27 +0900725 debug_policy: Option<&mut [u8]>,
Jiyong Parkc5d2ef22023-04-11 01:23:46 +0900726 debuggable: bool,
Pierre-Clément Tosi4ba79662023-02-13 11:22:41 +0000727) -> libfdt::Result<()> {
Pierre-Clément Tosieb887ac2023-05-02 13:33:37 +0000728 if let Some(debug_policy) = debug_policy {
729 let backup = Vec::from(fdt.as_slice());
730 fdt.unpack()?;
731 let backup_fdt = Fdt::from_slice(backup.as_slice()).unwrap();
732 if apply_debug_policy(fdt, backup_fdt, debug_policy)? {
733 info!("Debug policy applied.");
734 } else {
735 // apply_debug_policy restored fdt to backup_fdt so unpack it again.
736 fdt.unpack()?;
737 }
738 } else {
739 info!("No debug policy found.");
740 fdt.unpack()?;
741 }
Pierre-Clément Tosidb74cb12022-12-08 13:56:25 +0000742
Jiyong Parke9d87e82023-03-21 19:28:40 +0900743 patch_dice_node(fdt, bcc.as_ptr() as usize, bcc.len())?;
Pierre-Clément Tosi4ba79662023-02-13 11:22:41 +0000744
Alice Wang56ec45b2023-06-15 08:30:32 +0000745 if let Some(mut chosen) = fdt.chosen_mut()? {
746 empty_or_delete_prop(&mut chosen, cstr!("avf,strict-boot"), strict_boot)?;
747 empty_or_delete_prop(&mut chosen, cstr!("avf,new-instance"), new_instance)?;
748 };
Jiyong Park32f37ef2023-05-17 16:15:58 +0900749 if !debuggable {
Jiyong Parkc5d2ef22023-04-11 01:23:46 +0900750 if let Some(bootargs) = read_bootargs_from(fdt)? {
751 filter_out_dangerous_bootargs(fdt, &bootargs)?;
752 }
753 }
754
Pierre-Clément Tosi4ba79662023-02-13 11:22:41 +0000755 fdt.pack()?;
756
757 Ok(())
758}
759
Jiyong Parke9d87e82023-03-21 19:28:40 +0900760/// Patch the "google,open-dice"-compatible reserved-memory node to point to the bcc range
761fn patch_dice_node(fdt: &mut Fdt, addr: usize, size: usize) -> libfdt::Result<()> {
Pierre-Clément Tosidb74cb12022-12-08 13:56:25 +0000762 // We reject DTs with missing reserved-memory node as validation should have checked that the
763 // "swiotlb" subnode (compatible = "restricted-dma-pool") was present.
Jiyong Parke9d87e82023-03-21 19:28:40 +0900764 let node = fdt.node_mut(cstr!("/reserved-memory"))?.ok_or(libfdt::FdtError::NotFound)?;
Pierre-Clément Tosidb74cb12022-12-08 13:56:25 +0000765
Jiyong Parke9d87e82023-03-21 19:28:40 +0900766 let mut node = node.next_compatible(cstr!("google,open-dice"))?.ok_or(FdtError::NotFound)?;
Pierre-Clément Tosidb74cb12022-12-08 13:56:25 +0000767
Jiyong Parke9d87e82023-03-21 19:28:40 +0900768 let addr: u64 = addr.try_into().unwrap();
769 let size: u64 = size.try_into().unwrap();
770 node.setprop_inplace(cstr!("reg"), flatten(&[addr.to_be_bytes(), size.to_be_bytes()]))
Pierre-Clément Tosi4ba79662023-02-13 11:22:41 +0000771}
772
Alice Wang56ec45b2023-06-15 08:30:32 +0000773fn empty_or_delete_prop(
774 fdt_node: &mut FdtNodeMut,
775 prop_name: &CStr,
776 keep_prop: bool,
777) -> libfdt::Result<()> {
778 if keep_prop {
779 fdt_node.setprop_empty(prop_name)
Pierre-Clément Tosi4ba79662023-02-13 11:22:41 +0000780 } else {
Alice Wang56ec45b2023-06-15 08:30:32 +0000781 fdt_node
782 .delprop(prop_name)
783 .or_else(|e| if e == FdtError::NotFound { Ok(()) } else { Err(e) })
Pierre-Clément Tosi4ba79662023-02-13 11:22:41 +0000784 }
Pierre-Clément Tosidb74cb12022-12-08 13:56:25 +0000785}
Jiyong Parkc23426b2023-04-10 17:32:27 +0900786
Pierre-Clément Tosia50167b2023-05-02 13:19:29 +0000787/// Apply the debug policy overlay to the guest DT.
788///
789/// Returns Ok(true) on success, Ok(false) on recovered failure and Err(_) on corruption of the DT.
Pierre-Clément Tosieb887ac2023-05-02 13:33:37 +0000790fn apply_debug_policy(
791 fdt: &mut Fdt,
792 backup_fdt: &Fdt,
793 debug_policy: &[u8],
794) -> libfdt::Result<bool> {
Pierre-Clément Tosia50167b2023-05-02 13:19:29 +0000795 let mut debug_policy = Vec::from(debug_policy);
796 let overlay = match Fdt::from_mut_slice(debug_policy.as_mut_slice()) {
Jiyong Parkc23426b2023-04-10 17:32:27 +0900797 Ok(overlay) => overlay,
798 Err(e) => {
Pierre-Clément Tosia50167b2023-05-02 13:19:29 +0000799 warn!("Corrupted debug policy found: {e}. Not applying.");
800 return Ok(false);
Jiyong Parkc23426b2023-04-10 17:32:27 +0900801 }
802 };
Jiyong Parkc23426b2023-04-10 17:32:27 +0900803
Pierre-Clément Tosia50167b2023-05-02 13:19:29 +0000804 // SAFETY - on failure, the corrupted DT is restored using the backup.
Jiyong Parkc23426b2023-04-10 17:32:27 +0900805 if let Err(e) = unsafe { fdt.apply_overlay(overlay) } {
Pierre-Clément Tosia50167b2023-05-02 13:19:29 +0000806 warn!("Failed to apply debug policy: {e}. Recovering...");
Jiyong Parkc23426b2023-04-10 17:32:27 +0900807 fdt.copy_from_slice(backup_fdt.as_slice())?;
Jiyong Parkc23426b2023-04-10 17:32:27 +0900808 // A successful restoration is considered success because an invalid debug policy
809 // shouldn't DOS the pvmfw
Pierre-Clément Tosia50167b2023-05-02 13:19:29 +0000810 Ok(false)
811 } else {
812 Ok(true)
Jiyong Parkc23426b2023-04-10 17:32:27 +0900813 }
Jiyong Parkc23426b2023-04-10 17:32:27 +0900814}
Jiyong Parkc5d2ef22023-04-11 01:23:46 +0900815
816fn read_common_debug_policy(fdt: &Fdt, debug_feature_name: &CStr) -> libfdt::Result<bool> {
817 if let Some(node) = fdt.node(cstr!("/avf/guest/common"))? {
818 if let Some(value) = node.getprop_u32(debug_feature_name)? {
819 return Ok(value == 1);
820 }
821 }
822 Ok(false) // if the policy doesn't exist or not 1, don't enable the debug feature
823}
824
825fn filter_out_dangerous_bootargs(fdt: &mut Fdt, bootargs: &CStr) -> libfdt::Result<()> {
826 let has_crashkernel = read_common_debug_policy(fdt, cstr!("ramdump"))?;
827 let has_console = read_common_debug_policy(fdt, cstr!("log"))?;
828
829 let accepted: &[(&str, Box<dyn Fn(Option<&str>) -> bool>)] = &[
830 ("panic", Box::new(|v| if let Some(v) = v { v == "=-1" } else { false })),
831 ("crashkernel", Box::new(|_| has_crashkernel)),
832 ("console", Box::new(|_| has_console)),
833 ];
834
835 // parse and filter out unwanted
836 let mut filtered = Vec::new();
837 for arg in BootArgsIterator::new(bootargs).map_err(|e| {
838 info!("Invalid bootarg: {e}");
839 FdtError::BadValue
840 })? {
841 match accepted.iter().find(|&t| t.0 == arg.name()) {
842 Some((_, pred)) if pred(arg.value()) => filtered.push(arg),
843 _ => debug!("Rejected bootarg {}", arg.as_ref()),
844 }
845 }
846
847 // flatten into a new C-string
848 let mut new_bootargs = Vec::new();
849 for (i, arg) in filtered.iter().enumerate() {
850 if i != 0 {
851 new_bootargs.push(b' '); // separator
852 }
853 new_bootargs.extend_from_slice(arg.as_ref().as_bytes());
854 }
855 new_bootargs.push(b'\0');
856
857 let mut node = fdt.chosen_mut()?.ok_or(FdtError::NotFound)?;
858 node.setprop(cstr!("bootargs"), new_bootargs.as_slice())
859}