blob: b5b19588a25e49b29efcde0d3ea8d47020e6d39a [file] [log] [blame]
Pierre-Clément Tosia0934c12022-11-25 20:54:11 +00001// Copyright 2022, The Android Open Source Project
2//
3// Licensed under the Apache License, Version 2.0 (the "License");
4// you may not use this file except in compliance with the License.
5// You may obtain a copy of the License at
6//
7// http://www.apache.org/licenses/LICENSE-2.0
8//
9// Unless required by applicable law or agreed to in writing, software
10// distributed under the License is distributed on an "AS IS" BASIS,
11// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
12// See the License for the specific language governing permissions and
13// limitations under the License.
14
15//! High-level FDT functions.
16
Jiyong Parkc5d2ef22023-04-11 01:23:46 +090017use crate::bootargs::BootArgsIterator;
Jiyong Park00ceff32023-03-13 05:43:23 +000018use crate::helpers::GUEST_PAGE_SIZE;
Jiyong Parkc5d2ef22023-04-11 01:23:46 +090019use crate::Box;
Jiyong Park00ceff32023-03-13 05:43:23 +000020use crate::RebootReason;
Jiyong Parke9d87e82023-03-21 19:28:40 +090021use alloc::ffi::CString;
Jiyong Parkc23426b2023-04-10 17:32:27 +090022use alloc::vec::Vec;
Jiyong Park0ee65392023-03-27 20:52:45 +090023use core::cmp::max;
24use core::cmp::min;
Pierre-Clément Tosia0934c12022-11-25 20:54:11 +000025use core::ffi::CStr;
Jiyong Park9c63cd12023-03-21 17:53:07 +090026use core::mem::size_of;
Pierre-Clément Tosia0934c12022-11-25 20:54:11 +000027use core::ops::Range;
Jiyong Park00ceff32023-03-13 05:43:23 +000028use fdtpci::PciMemoryFlags;
29use fdtpci::PciRangeType;
30use libfdt::AddressRange;
31use libfdt::CellIterator;
Pierre-Clément Tosi4ba79662023-02-13 11:22:41 +000032use libfdt::Fdt;
33use libfdt::FdtError;
Jiyong Park9c63cd12023-03-21 17:53:07 +090034use libfdt::FdtNode;
Jiyong Park83316122023-03-21 09:39:39 +090035use log::debug;
Jiyong Park00ceff32023-03-13 05:43:23 +000036use log::error;
Jiyong Parkc23426b2023-04-10 17:32:27 +090037use log::info;
Pierre-Clément Tosia50167b2023-05-02 13:19:29 +000038use log::warn;
Jiyong Park00ceff32023-03-13 05:43:23 +000039use tinyvec::ArrayVec;
Alice Wanga3971062023-06-13 11:48:53 +000040use vmbase::cstr;
41use vmbase::fdt::SwiotlbInfo;
Alice Wang63f4c9e2023-06-12 09:36:43 +000042use vmbase::layout::{crosvm::MEM_START, MAX_VIRT_ADDR};
Alice Wangeacb7382023-06-05 12:53:54 +000043use vmbase::memory::SIZE_4KB;
44use vmbase::util::flatten;
Alice Wang4be4dd02023-06-07 07:50:40 +000045use vmbase::util::RangeExt as _;
Pierre-Clément Tosia0934c12022-11-25 20:54:11 +000046
Jiyong Park6a8789a2023-03-21 14:50:59 +090047/// Extract from /config the address range containing the pre-loaded kernel. Absence of /config is
48/// not an error.
49fn read_kernel_range_from(fdt: &Fdt) -> libfdt::Result<Option<Range<usize>>> {
Jiyong Parkb87f3302023-03-21 10:03:11 +090050 let addr = cstr!("kernel-address");
51 let size = cstr!("kernel-size");
Pierre-Clément Tosic3811b82022-11-29 11:24:16 +000052
Jiyong Parkb87f3302023-03-21 10:03:11 +090053 if let Some(config) = fdt.node(cstr!("/config"))? {
Pierre-Clément Tosic3811b82022-11-29 11:24:16 +000054 if let (Some(addr), Some(size)) = (config.getprop_u32(addr)?, config.getprop_u32(size)?) {
55 let addr = addr as usize;
56 let size = size as usize;
57
58 return Ok(Some(addr..(addr + size)));
59 }
60 }
61
62 Ok(None)
63}
64
Jiyong Park6a8789a2023-03-21 14:50:59 +090065/// Extract from /chosen the address range containing the pre-loaded ramdisk. Absence is not an
66/// error as there can be initrd-less VM.
67fn read_initrd_range_from(fdt: &Fdt) -> libfdt::Result<Option<Range<usize>>> {
Jiyong Parkb87f3302023-03-21 10:03:11 +090068 let start = cstr!("linux,initrd-start");
69 let end = cstr!("linux,initrd-end");
Pierre-Clément Tosia0934c12022-11-25 20:54:11 +000070
71 if let Some(chosen) = fdt.chosen()? {
72 if let (Some(start), Some(end)) = (chosen.getprop_u32(start)?, chosen.getprop_u32(end)?) {
73 return Ok(Some((start as usize)..(end as usize)));
74 }
75 }
76
77 Ok(None)
78}
Pierre-Clément Tosidb74cb12022-12-08 13:56:25 +000079
Jiyong Park9c63cd12023-03-21 17:53:07 +090080fn patch_initrd_range(fdt: &mut Fdt, initrd_range: &Range<usize>) -> libfdt::Result<()> {
81 let start = u32::try_from(initrd_range.start).unwrap();
82 let end = u32::try_from(initrd_range.end).unwrap();
83
84 let mut node = fdt.chosen_mut()?.ok_or(FdtError::NotFound)?;
85 node.setprop(cstr!("linux,initrd-start"), &start.to_be_bytes())?;
86 node.setprop(cstr!("linux,initrd-end"), &end.to_be_bytes())?;
87 Ok(())
88}
89
Jiyong Parke9d87e82023-03-21 19:28:40 +090090fn read_bootargs_from(fdt: &Fdt) -> libfdt::Result<Option<CString>> {
91 if let Some(chosen) = fdt.chosen()? {
92 if let Some(bootargs) = chosen.getprop_str(cstr!("bootargs"))? {
93 // We need to copy the string to heap because the original fdt will be invalidated
94 // by the templated DT
95 let copy = CString::new(bootargs.to_bytes()).map_err(|_| FdtError::BadValue)?;
96 return Ok(Some(copy));
97 }
98 }
99 Ok(None)
100}
101
102fn patch_bootargs(fdt: &mut Fdt, bootargs: &CStr) -> libfdt::Result<()> {
103 let mut node = fdt.chosen_mut()?.ok_or(FdtError::NotFound)?;
Jiyong Parkc5d2ef22023-04-11 01:23:46 +0900104 // This function is called before the verification is done. So, we just copy the bootargs to
105 // the new FDT unmodified. This will be filtered again in the modify_for_next_stage function
106 // if the VM is not debuggable.
Jiyong Parke9d87e82023-03-21 19:28:40 +0900107 node.setprop(cstr!("bootargs"), bootargs.to_bytes_with_nul())
108}
109
Jiyong Park6a8789a2023-03-21 14:50:59 +0900110/// Check if memory range is ok
111fn validate_memory_range(range: &Range<usize>) -> Result<(), RebootReason> {
112 let base = range.start;
Alice Wange243d462023-06-06 15:18:12 +0000113 if base != MEM_START {
114 error!("Memory base address {:#x} is not {:#x}", base, MEM_START);
Jiyong Park00ceff32023-03-13 05:43:23 +0000115 return Err(RebootReason::InvalidFdt);
116 }
117
Jiyong Park6a8789a2023-03-21 14:50:59 +0900118 let size = range.len();
Jiyong Park00ceff32023-03-13 05:43:23 +0000119 if size % GUEST_PAGE_SIZE != 0 {
120 error!("Memory size {:#x} is not a multiple of page size {:#x}", size, GUEST_PAGE_SIZE);
121 return Err(RebootReason::InvalidFdt);
122 }
Jiyong Park00ceff32023-03-13 05:43:23 +0000123
Jiyong Park6a8789a2023-03-21 14:50:59 +0900124 if size == 0 {
125 error!("Memory size is 0");
126 return Err(RebootReason::InvalidFdt);
127 }
128 Ok(())
Jiyong Park00ceff32023-03-13 05:43:23 +0000129}
130
Jiyong Park9c63cd12023-03-21 17:53:07 +0900131fn patch_memory_range(fdt: &mut Fdt, memory_range: &Range<usize>) -> libfdt::Result<()> {
132 let size = memory_range.len() as u64;
Jiyong Park0ee65392023-03-27 20:52:45 +0900133 fdt.node_mut(cstr!("/memory"))?
134 .ok_or(FdtError::NotFound)?
Alice Wange243d462023-06-06 15:18:12 +0000135 .setprop_inplace(cstr!("reg"), flatten(&[MEM_START.to_be_bytes(), size.to_be_bytes()]))
Jiyong Park9c63cd12023-03-21 17:53:07 +0900136}
137
Jiyong Park6a8789a2023-03-21 14:50:59 +0900138/// Read the number of CPUs from DT
139fn read_num_cpus_from(fdt: &Fdt) -> libfdt::Result<usize> {
140 Ok(fdt.compatible_nodes(cstr!("arm,arm-v8"))?.count())
141}
142
143/// Validate number of CPUs
144fn validate_num_cpus(num_cpus: usize) -> Result<(), RebootReason> {
145 if num_cpus == 0 {
Jiyong Park00ceff32023-03-13 05:43:23 +0000146 error!("Number of CPU can't be 0");
Jiyong Park6a8789a2023-03-21 14:50:59 +0900147 return Err(RebootReason::InvalidFdt);
148 }
Jiyong Park9c63cd12023-03-21 17:53:07 +0900149 if DeviceTreeInfo::GIC_REDIST_SIZE_PER_CPU.checked_mul(num_cpus.try_into().unwrap()).is_none() {
150 error!("Too many CPUs for gic: {}", num_cpus);
151 return Err(RebootReason::InvalidFdt);
152 }
153 Ok(())
154}
155
156/// Patch DT by keeping `num_cpus` number of arm,arm-v8 compatible nodes, and pruning the rest.
157fn patch_num_cpus(fdt: &mut Fdt, num_cpus: usize) -> libfdt::Result<()> {
158 let cpu = cstr!("arm,arm-v8");
159 let mut next = fdt.root_mut()?.next_compatible(cpu)?;
160 for _ in 0..num_cpus {
161 next = if let Some(current) = next {
162 current.next_compatible(cpu)?
163 } else {
164 return Err(FdtError::NoSpace);
165 };
166 }
167 while let Some(current) = next {
168 next = current.delete_and_next_compatible(cpu)?;
169 }
Jiyong Park6a8789a2023-03-21 14:50:59 +0900170 Ok(())
Jiyong Park00ceff32023-03-13 05:43:23 +0000171}
172
173#[derive(Debug)]
Jiyong Park00ceff32023-03-13 05:43:23 +0000174struct PciInfo {
Jiyong Park6a8789a2023-03-21 14:50:59 +0900175 ranges: [PciAddrRange; 2],
176 irq_masks: ArrayVec<[PciIrqMask; PciInfo::MAX_IRQS]>,
177 irq_maps: ArrayVec<[PciIrqMap; PciInfo::MAX_IRQS]>,
Jiyong Park00ceff32023-03-13 05:43:23 +0000178}
179
Jiyong Park6a8789a2023-03-21 14:50:59 +0900180impl PciInfo {
181 const IRQ_MASK_CELLS: usize = 4;
182 const IRQ_MAP_CELLS: usize = 10;
183 const MAX_IRQS: usize = 8;
Jiyong Park00ceff32023-03-13 05:43:23 +0000184}
185
Jiyong Park6a8789a2023-03-21 14:50:59 +0900186type PciAddrRange = AddressRange<(u32, u64), u64, u64>;
187type PciIrqMask = [u32; PciInfo::IRQ_MASK_CELLS];
188type PciIrqMap = [u32; PciInfo::IRQ_MAP_CELLS];
Jiyong Park00ceff32023-03-13 05:43:23 +0000189
190/// Iterator that takes N cells as a chunk
191struct CellChunkIterator<'a, const N: usize> {
192 cells: CellIterator<'a>,
193}
194
195impl<'a, const N: usize> CellChunkIterator<'a, N> {
196 fn new(cells: CellIterator<'a>) -> Self {
197 Self { cells }
198 }
199}
200
201impl<'a, const N: usize> Iterator for CellChunkIterator<'a, N> {
202 type Item = [u32; N];
203 fn next(&mut self) -> Option<Self::Item> {
204 let mut ret: Self::Item = [0; N];
205 for i in ret.iter_mut() {
206 *i = self.cells.next()?;
207 }
208 Some(ret)
209 }
210}
211
Jiyong Park6a8789a2023-03-21 14:50:59 +0900212/// Read pci host controller ranges, irq maps, and irq map masks from DT
213fn read_pci_info_from(fdt: &Fdt) -> libfdt::Result<PciInfo> {
214 let node =
215 fdt.compatible_nodes(cstr!("pci-host-cam-generic"))?.next().ok_or(FdtError::NotFound)?;
216
217 let mut ranges = node.ranges::<(u32, u64), u64, u64>()?.ok_or(FdtError::NotFound)?;
218 let range0 = ranges.next().ok_or(FdtError::NotFound)?;
219 let range1 = ranges.next().ok_or(FdtError::NotFound)?;
220
221 let irq_masks = node.getprop_cells(cstr!("interrupt-map-mask"))?.ok_or(FdtError::NotFound)?;
222 let irq_masks = CellChunkIterator::<{ PciInfo::IRQ_MASK_CELLS }>::new(irq_masks);
223 let irq_masks: ArrayVec<[PciIrqMask; PciInfo::MAX_IRQS]> =
224 irq_masks.take(PciInfo::MAX_IRQS).collect();
225
226 let irq_maps = node.getprop_cells(cstr!("interrupt-map"))?.ok_or(FdtError::NotFound)?;
227 let irq_maps = CellChunkIterator::<{ PciInfo::IRQ_MAP_CELLS }>::new(irq_maps);
228 let irq_maps: ArrayVec<[PciIrqMap; PciInfo::MAX_IRQS]> =
229 irq_maps.take(PciInfo::MAX_IRQS).collect();
230
231 Ok(PciInfo { ranges: [range0, range1], irq_masks, irq_maps })
232}
233
Jiyong Park0ee65392023-03-27 20:52:45 +0900234fn validate_pci_info(pci_info: &PciInfo, memory_range: &Range<usize>) -> Result<(), RebootReason> {
Jiyong Park6a8789a2023-03-21 14:50:59 +0900235 for range in pci_info.ranges.iter() {
Jiyong Park0ee65392023-03-27 20:52:45 +0900236 validate_pci_addr_range(range, memory_range)?;
Jiyong Park6a8789a2023-03-21 14:50:59 +0900237 }
238 for irq_mask in pci_info.irq_masks.iter() {
239 validate_pci_irq_mask(irq_mask)?;
240 }
241 for (idx, irq_map) in pci_info.irq_maps.iter().enumerate() {
242 validate_pci_irq_map(irq_map, idx)?;
243 }
244 Ok(())
245}
246
Jiyong Park0ee65392023-03-27 20:52:45 +0900247fn validate_pci_addr_range(
248 range: &PciAddrRange,
249 memory_range: &Range<usize>,
250) -> Result<(), RebootReason> {
Jiyong Park6a8789a2023-03-21 14:50:59 +0900251 let mem_flags = PciMemoryFlags(range.addr.0);
252 let range_type = mem_flags.range_type();
253 let prefetchable = mem_flags.prefetchable();
254 let bus_addr = range.addr.1;
255 let cpu_addr = range.parent_addr;
256 let size = range.size;
257
258 if range_type != PciRangeType::Memory64 {
259 error!("Invalid range type {:?} for bus address {:#x} in PCI node", range_type, bus_addr);
260 return Err(RebootReason::InvalidFdt);
261 }
262 if prefetchable {
263 error!("PCI bus address {:#x} in PCI node is prefetchable", bus_addr);
264 return Err(RebootReason::InvalidFdt);
265 }
266 // Enforce ID bus-to-cpu mappings, as used by crosvm.
267 if bus_addr != cpu_addr {
268 error!("PCI bus address: {:#x} is different from CPU address: {:#x}", bus_addr, cpu_addr);
269 return Err(RebootReason::InvalidFdt);
270 }
271
Jiyong Park0ee65392023-03-27 20:52:45 +0900272 let Some(bus_end) = bus_addr.checked_add(size) else {
273 error!("PCI address range size {:#x} overflows", size);
274 return Err(RebootReason::InvalidFdt);
275 };
Alice Wang63f4c9e2023-06-12 09:36:43 +0000276 if bus_end > MAX_VIRT_ADDR.try_into().unwrap() {
Jiyong Park0ee65392023-03-27 20:52:45 +0900277 error!("PCI address end {:#x} is outside of translatable range", bus_end);
278 return Err(RebootReason::InvalidFdt);
279 }
280
281 let memory_start = memory_range.start.try_into().unwrap();
282 let memory_end = memory_range.end.try_into().unwrap();
283
284 if max(bus_addr, memory_start) < min(bus_end, memory_end) {
285 error!(
286 "PCI address range {:#x}-{:#x} overlaps with main memory range {:#x}-{:#x}",
287 bus_addr, bus_end, memory_start, memory_end
288 );
Jiyong Park6a8789a2023-03-21 14:50:59 +0900289 return Err(RebootReason::InvalidFdt);
290 }
291
292 Ok(())
293}
294
295fn validate_pci_irq_mask(irq_mask: &PciIrqMask) -> Result<(), RebootReason> {
Jiyong Park00ceff32023-03-13 05:43:23 +0000296 const IRQ_MASK_ADDR_HI: u32 = 0xf800;
297 const IRQ_MASK_ADDR_ME: u32 = 0x0;
298 const IRQ_MASK_ADDR_LO: u32 = 0x0;
299 const IRQ_MASK_ANY_IRQ: u32 = 0x7;
Jiyong Park6a8789a2023-03-21 14:50:59 +0900300 const EXPECTED: PciIrqMask =
Jiyong Park00ceff32023-03-13 05:43:23 +0000301 [IRQ_MASK_ADDR_HI, IRQ_MASK_ADDR_ME, IRQ_MASK_ADDR_LO, IRQ_MASK_ANY_IRQ];
Jiyong Park6a8789a2023-03-21 14:50:59 +0900302 if *irq_mask != EXPECTED {
303 error!("Invalid PCI irq mask {:#?}", irq_mask);
304 return Err(RebootReason::InvalidFdt);
Jiyong Park00ceff32023-03-13 05:43:23 +0000305 }
Jiyong Park6a8789a2023-03-21 14:50:59 +0900306 Ok(())
Jiyong Park00ceff32023-03-13 05:43:23 +0000307}
308
Jiyong Park6a8789a2023-03-21 14:50:59 +0900309fn validate_pci_irq_map(irq_map: &PciIrqMap, idx: usize) -> Result<(), RebootReason> {
Jiyong Park00ceff32023-03-13 05:43:23 +0000310 const PCI_DEVICE_IDX: usize = 11;
311 const PCI_IRQ_ADDR_ME: u32 = 0;
312 const PCI_IRQ_ADDR_LO: u32 = 0;
313 const PCI_IRQ_INTC: u32 = 1;
314 const AARCH64_IRQ_BASE: u32 = 4; // from external/crosvm/aarch64/src/lib.rs
315 const GIC_SPI: u32 = 0;
316 const IRQ_TYPE_LEVEL_HIGH: u32 = 4;
317
Jiyong Park6a8789a2023-03-21 14:50:59 +0900318 let pci_addr = (irq_map[0], irq_map[1], irq_map[2]);
319 let pci_irq_number = irq_map[3];
320 let _controller_phandle = irq_map[4]; // skipped.
321 let gic_addr = (irq_map[5], irq_map[6]); // address-cells is <2> for GIC
322 // interrupt-cells is <3> for GIC
323 let gic_peripheral_interrupt_type = irq_map[7];
324 let gic_irq_number = irq_map[8];
325 let gic_irq_type = irq_map[9];
Jiyong Park00ceff32023-03-13 05:43:23 +0000326
Jiyong Park6a8789a2023-03-21 14:50:59 +0900327 let phys_hi: u32 = (0x1 << PCI_DEVICE_IDX) * (idx + 1) as u32;
328 let expected_pci_addr = (phys_hi, PCI_IRQ_ADDR_ME, PCI_IRQ_ADDR_LO);
Jiyong Park00ceff32023-03-13 05:43:23 +0000329
Jiyong Park6a8789a2023-03-21 14:50:59 +0900330 if pci_addr != expected_pci_addr {
331 error!("PCI device address {:#x} {:#x} {:#x} in interrupt-map is different from expected address \
332 {:#x} {:#x} {:#x}",
333 pci_addr.0, pci_addr.1, pci_addr.2, expected_pci_addr.0, expected_pci_addr.1, expected_pci_addr.2);
334 return Err(RebootReason::InvalidFdt);
335 }
Jiyong Park00ceff32023-03-13 05:43:23 +0000336
Jiyong Park6a8789a2023-03-21 14:50:59 +0900337 if pci_irq_number != PCI_IRQ_INTC {
338 error!(
339 "PCI INT# {:#x} in interrupt-map is different from expected value {:#x}",
340 pci_irq_number, PCI_IRQ_INTC
341 );
342 return Err(RebootReason::InvalidFdt);
343 }
Jiyong Park00ceff32023-03-13 05:43:23 +0000344
Jiyong Park6a8789a2023-03-21 14:50:59 +0900345 if gic_addr != (0, 0) {
346 error!(
347 "GIC address {:#x} {:#x} in interrupt-map is different from expected address \
348 {:#x} {:#x}",
349 gic_addr.0, gic_addr.1, 0, 0
350 );
351 return Err(RebootReason::InvalidFdt);
352 }
353
354 if gic_peripheral_interrupt_type != GIC_SPI {
355 error!("GIC peripheral interrupt type {:#x} in interrupt-map is different from expected value \
356 {:#x}", gic_peripheral_interrupt_type, GIC_SPI);
357 return Err(RebootReason::InvalidFdt);
358 }
359
360 let irq_nr: u32 = AARCH64_IRQ_BASE + (idx as u32);
361 if gic_irq_number != irq_nr {
362 error!(
363 "GIC irq number {:#x} in interrupt-map is unexpected. Expected {:#x}",
364 gic_irq_number, irq_nr
365 );
366 return Err(RebootReason::InvalidFdt);
367 }
368
369 if gic_irq_type != IRQ_TYPE_LEVEL_HIGH {
370 error!(
371 "IRQ type in {:#x} is invalid. Must be LEVEL_HIGH {:#x}",
372 gic_irq_type, IRQ_TYPE_LEVEL_HIGH
373 );
374 return Err(RebootReason::InvalidFdt);
Jiyong Park00ceff32023-03-13 05:43:23 +0000375 }
376 Ok(())
377}
378
Jiyong Park9c63cd12023-03-21 17:53:07 +0900379fn patch_pci_info(fdt: &mut Fdt, pci_info: &PciInfo) -> libfdt::Result<()> {
380 let mut node = fdt
381 .root_mut()?
382 .next_compatible(cstr!("pci-host-cam-generic"))?
383 .ok_or(FdtError::NotFound)?;
384
385 let irq_masks_size = pci_info.irq_masks.len() * size_of::<PciIrqMask>();
386 node.trimprop(cstr!("interrupt-map-mask"), irq_masks_size)?;
387
388 let irq_maps_size = pci_info.irq_maps.len() * size_of::<PciIrqMap>();
389 node.trimprop(cstr!("interrupt-map"), irq_maps_size)?;
390
391 node.setprop_inplace(
392 cstr!("ranges"),
393 flatten(&[pci_info.ranges[0].to_cells(), pci_info.ranges[1].to_cells()]),
394 )
395}
396
Jiyong Park00ceff32023-03-13 05:43:23 +0000397#[derive(Default, Debug)]
Jiyong Park6a8789a2023-03-21 14:50:59 +0900398struct SerialInfo {
399 addrs: ArrayVec<[u64; Self::MAX_SERIALS]>,
Jiyong Park00ceff32023-03-13 05:43:23 +0000400}
401
402impl SerialInfo {
Jiyong Park6a8789a2023-03-21 14:50:59 +0900403 const MAX_SERIALS: usize = 4;
Jiyong Park00ceff32023-03-13 05:43:23 +0000404}
405
Jiyong Park6a8789a2023-03-21 14:50:59 +0900406fn read_serial_info_from(fdt: &Fdt) -> libfdt::Result<SerialInfo> {
407 let mut addrs: ArrayVec<[u64; SerialInfo::MAX_SERIALS]> = Default::default();
408 for node in fdt.compatible_nodes(cstr!("ns16550a"))?.take(SerialInfo::MAX_SERIALS) {
409 let reg = node.reg()?.ok_or(FdtError::NotFound)?.next().ok_or(FdtError::NotFound)?;
410 addrs.push(reg.addr);
Jiyong Park00ceff32023-03-13 05:43:23 +0000411 }
Jiyong Park6a8789a2023-03-21 14:50:59 +0900412 Ok(SerialInfo { addrs })
Jiyong Park00ceff32023-03-13 05:43:23 +0000413}
414
Jiyong Park9c63cd12023-03-21 17:53:07 +0900415/// Patch the DT by deleting the ns16550a compatible nodes whose address are unknown
416fn patch_serial_info(fdt: &mut Fdt, serial_info: &SerialInfo) -> libfdt::Result<()> {
417 let name = cstr!("ns16550a");
418 let mut next = fdt.root_mut()?.next_compatible(name);
419 while let Some(current) = next? {
420 let reg = FdtNode::from_mut(&current)
421 .reg()?
422 .ok_or(FdtError::NotFound)?
423 .next()
424 .ok_or(FdtError::NotFound)?;
425 next = if !serial_info.addrs.contains(&reg.addr) {
426 current.delete_and_next_compatible(name)
427 } else {
428 current.next_compatible(name)
429 }
430 }
431 Ok(())
432}
433
Srivatsa Vaddagiri2df297f2023-04-12 03:11:05 -0700434fn validate_swiotlb_info(
435 swiotlb_info: &SwiotlbInfo,
436 memory: &Range<usize>,
437) -> Result<(), RebootReason> {
Jiyong Park6a8789a2023-03-21 14:50:59 +0900438 let size = swiotlb_info.size;
439 let align = swiotlb_info.align;
Jiyong Park00ceff32023-03-13 05:43:23 +0000440
Srivatsa Vaddagiri2df297f2023-04-12 03:11:05 -0700441 if size == 0 || (size % GUEST_PAGE_SIZE) != 0 {
Jiyong Park00ceff32023-03-13 05:43:23 +0000442 error!("Invalid swiotlb size {:#x}", size);
443 return Err(RebootReason::InvalidFdt);
444 }
445
Pierre-Clément Tosibe3a97b2023-05-19 14:56:23 +0000446 if let Some(align) = align.filter(|&a| a % GUEST_PAGE_SIZE != 0) {
Jiyong Park00ceff32023-03-13 05:43:23 +0000447 error!("Invalid swiotlb alignment {:#x}", align);
448 return Err(RebootReason::InvalidFdt);
449 }
Srivatsa Vaddagiri2df297f2023-04-12 03:11:05 -0700450
Alice Wang9cfbfd62023-06-14 11:19:03 +0000451 if let Some(addr) = swiotlb_info.addr {
452 if addr.checked_add(size).is_none() {
453 error!("Invalid swiotlb range: addr:{addr:#x} size:{size:#x}");
454 return Err(RebootReason::InvalidFdt);
455 }
456 }
Srivatsa Vaddagiri2df297f2023-04-12 03:11:05 -0700457 if let Some(range) = swiotlb_info.fixed_range() {
458 if !range.is_within(memory) {
459 error!("swiotlb range {range:#x?} not part of memory range {memory:#x?}");
460 return Err(RebootReason::InvalidFdt);
461 }
462 }
463
Jiyong Park6a8789a2023-03-21 14:50:59 +0900464 Ok(())
Jiyong Park00ceff32023-03-13 05:43:23 +0000465}
466
Jiyong Park9c63cd12023-03-21 17:53:07 +0900467fn patch_swiotlb_info(fdt: &mut Fdt, swiotlb_info: &SwiotlbInfo) -> libfdt::Result<()> {
468 let mut node =
469 fdt.root_mut()?.next_compatible(cstr!("restricted-dma-pool"))?.ok_or(FdtError::NotFound)?;
Srivatsa Vaddagiri2df297f2023-04-12 03:11:05 -0700470
471 if let Some(range) = swiotlb_info.fixed_range() {
Pierre-Clément Tosic27c4272023-05-19 15:46:26 +0000472 node.setprop_addrrange_inplace(
Srivatsa Vaddagiri2df297f2023-04-12 03:11:05 -0700473 cstr!("reg"),
474 range.start.try_into().unwrap(),
475 range.len().try_into().unwrap(),
476 )?;
Pierre-Clément Tosibe3a97b2023-05-19 14:56:23 +0000477 node.nop_property(cstr!("size"))?;
478 node.nop_property(cstr!("alignment"))?;
Srivatsa Vaddagiri2df297f2023-04-12 03:11:05 -0700479 } else {
Pierre-Clément Tosic27c4272023-05-19 15:46:26 +0000480 node.nop_property(cstr!("reg"))?;
Srivatsa Vaddagiri2df297f2023-04-12 03:11:05 -0700481 node.setprop_inplace(cstr!("size"), &swiotlb_info.size.to_be_bytes())?;
Pierre-Clément Tosibe3a97b2023-05-19 14:56:23 +0000482 node.setprop_inplace(cstr!("alignment"), &swiotlb_info.align.unwrap().to_be_bytes())?;
Srivatsa Vaddagiri2df297f2023-04-12 03:11:05 -0700483 }
484
Jiyong Park9c63cd12023-03-21 17:53:07 +0900485 Ok(())
486}
487
488fn patch_gic(fdt: &mut Fdt, num_cpus: usize) -> libfdt::Result<()> {
489 let node = fdt.compatible_nodes(cstr!("arm,gic-v3"))?.next().ok_or(FdtError::NotFound)?;
490 let mut ranges = node.reg()?.ok_or(FdtError::NotFound)?;
491 let range0 = ranges.next().ok_or(FdtError::NotFound)?;
492 let mut range1 = ranges.next().ok_or(FdtError::NotFound)?;
493
494 let addr = range0.addr;
495 // SAFETY - doesn't overflow. checked in validate_num_cpus
496 let size: u64 =
497 DeviceTreeInfo::GIC_REDIST_SIZE_PER_CPU.checked_mul(num_cpus.try_into().unwrap()).unwrap();
498
499 // range1 is just below range0
500 range1.addr = addr - size;
501 range1.size = Some(size);
502
503 let range0 = range0.to_cells();
504 let range1 = range1.to_cells();
505 let value = [
506 range0.0, // addr
507 range0.1.unwrap(), //size
508 range1.0, // addr
509 range1.1.unwrap(), //size
510 ];
511
512 let mut node =
513 fdt.root_mut()?.next_compatible(cstr!("arm,gic-v3"))?.ok_or(FdtError::NotFound)?;
514 node.setprop_inplace(cstr!("reg"), flatten(&value))
515}
516
517fn patch_timer(fdt: &mut Fdt, num_cpus: usize) -> libfdt::Result<()> {
518 const NUM_INTERRUPTS: usize = 4;
519 const CELLS_PER_INTERRUPT: usize = 3;
520 let node = fdt.compatible_nodes(cstr!("arm,armv8-timer"))?.next().ok_or(FdtError::NotFound)?;
521 let interrupts = node.getprop_cells(cstr!("interrupts"))?.ok_or(FdtError::NotFound)?;
522 let mut value: ArrayVec<[u32; NUM_INTERRUPTS * CELLS_PER_INTERRUPT]> =
523 interrupts.take(NUM_INTERRUPTS * CELLS_PER_INTERRUPT).collect();
524
525 let num_cpus: u32 = num_cpus.try_into().unwrap();
526 let cpu_mask: u32 = (((0x1 << num_cpus) - 1) & 0xff) << 8;
527 for v in value.iter_mut().skip(2).step_by(CELLS_PER_INTERRUPT) {
528 *v |= cpu_mask;
529 }
530 for v in value.iter_mut() {
531 *v = v.to_be();
532 }
533
534 // SAFETY - array size is the same
535 let value = unsafe {
536 core::mem::transmute::<
537 [u32; NUM_INTERRUPTS * CELLS_PER_INTERRUPT],
538 [u8; NUM_INTERRUPTS * CELLS_PER_INTERRUPT * size_of::<u32>()],
539 >(value.into_inner())
540 };
541
542 let mut node =
543 fdt.root_mut()?.next_compatible(cstr!("arm,armv8-timer"))?.ok_or(FdtError::NotFound)?;
544 node.setprop_inplace(cstr!("interrupts"), value.as_slice())
545}
546
Jiyong Park00ceff32023-03-13 05:43:23 +0000547#[derive(Debug)]
Jiyong Park6a8789a2023-03-21 14:50:59 +0900548pub struct DeviceTreeInfo {
549 pub kernel_range: Option<Range<usize>>,
550 pub initrd_range: Option<Range<usize>>,
551 pub memory_range: Range<usize>,
Jiyong Parke9d87e82023-03-21 19:28:40 +0900552 bootargs: Option<CString>,
Jiyong Park6a8789a2023-03-21 14:50:59 +0900553 num_cpus: usize,
Jiyong Park00ceff32023-03-13 05:43:23 +0000554 pci_info: PciInfo,
555 serial_info: SerialInfo,
Srivatsa Vaddagiri37713ec2023-04-20 04:04:08 -0700556 pub swiotlb_info: SwiotlbInfo,
Jiyong Park00ceff32023-03-13 05:43:23 +0000557}
558
559impl DeviceTreeInfo {
Jiyong Park9c63cd12023-03-21 17:53:07 +0900560 const GIC_REDIST_SIZE_PER_CPU: u64 = (32 * SIZE_4KB) as u64;
Jiyong Park00ceff32023-03-13 05:43:23 +0000561}
562
Jiyong Park9c63cd12023-03-21 17:53:07 +0900563pub fn sanitize_device_tree(fdt: &mut Fdt) -> Result<DeviceTreeInfo, RebootReason> {
Jiyong Park83316122023-03-21 09:39:39 +0900564 let info = parse_device_tree(fdt)?;
565 debug!("Device tree info: {:?}", info);
566
Jiyong Parke9d87e82023-03-21 19:28:40 +0900567 fdt.copy_from_slice(pvmfw_fdt_template::RAW).map_err(|e| {
568 error!("Failed to instantiate FDT from the template DT: {e}");
569 RebootReason::InvalidFdt
570 })?;
571
Jiyong Park9c63cd12023-03-21 17:53:07 +0900572 patch_device_tree(fdt, &info)?;
Jiyong Park6a8789a2023-03-21 14:50:59 +0900573 Ok(info)
Jiyong Park83316122023-03-21 09:39:39 +0900574}
575
576fn parse_device_tree(fdt: &libfdt::Fdt) -> Result<DeviceTreeInfo, RebootReason> {
Jiyong Park6a8789a2023-03-21 14:50:59 +0900577 let kernel_range = read_kernel_range_from(fdt).map_err(|e| {
578 error!("Failed to read kernel range from DT: {e}");
579 RebootReason::InvalidFdt
580 })?;
581
582 let initrd_range = read_initrd_range_from(fdt).map_err(|e| {
583 error!("Failed to read initrd range from DT: {e}");
584 RebootReason::InvalidFdt
585 })?;
586
Alice Wang2422bdc2023-06-12 08:37:55 +0000587 let memory_range = fdt.first_memory_range().map_err(|e| {
Jiyong Park6a8789a2023-03-21 14:50:59 +0900588 error!("Failed to read memory range from DT: {e}");
589 RebootReason::InvalidFdt
590 })?;
591 validate_memory_range(&memory_range)?;
592
Jiyong Parke9d87e82023-03-21 19:28:40 +0900593 let bootargs = read_bootargs_from(fdt).map_err(|e| {
594 error!("Failed to read bootargs from DT: {e}");
595 RebootReason::InvalidFdt
596 })?;
597
Jiyong Park6a8789a2023-03-21 14:50:59 +0900598 let num_cpus = read_num_cpus_from(fdt).map_err(|e| {
599 error!("Failed to read num cpus from DT: {e}");
600 RebootReason::InvalidFdt
601 })?;
602 validate_num_cpus(num_cpus)?;
603
604 let pci_info = read_pci_info_from(fdt).map_err(|e| {
605 error!("Failed to read pci info from DT: {e}");
606 RebootReason::InvalidFdt
607 })?;
Jiyong Park0ee65392023-03-27 20:52:45 +0900608 validate_pci_info(&pci_info, &memory_range)?;
Jiyong Park6a8789a2023-03-21 14:50:59 +0900609
610 let serial_info = read_serial_info_from(fdt).map_err(|e| {
611 error!("Failed to read serial info from DT: {e}");
612 RebootReason::InvalidFdt
613 })?;
614
Alice Wang9cfbfd62023-06-14 11:19:03 +0000615 let swiotlb_info = SwiotlbInfo::new_from_fdt(fdt).map_err(|e| {
Jiyong Park6a8789a2023-03-21 14:50:59 +0900616 error!("Failed to read swiotlb info from DT: {e}");
617 RebootReason::InvalidFdt
618 })?;
Srivatsa Vaddagiri2df297f2023-04-12 03:11:05 -0700619 validate_swiotlb_info(&swiotlb_info, &memory_range)?;
Jiyong Park6a8789a2023-03-21 14:50:59 +0900620
Jiyong Park00ceff32023-03-13 05:43:23 +0000621 Ok(DeviceTreeInfo {
Jiyong Park6a8789a2023-03-21 14:50:59 +0900622 kernel_range,
623 initrd_range,
624 memory_range,
Jiyong Parke9d87e82023-03-21 19:28:40 +0900625 bootargs,
Jiyong Park6a8789a2023-03-21 14:50:59 +0900626 num_cpus,
627 pci_info,
628 serial_info,
629 swiotlb_info,
Jiyong Park00ceff32023-03-13 05:43:23 +0000630 })
631}
632
Jiyong Park9c63cd12023-03-21 17:53:07 +0900633fn patch_device_tree(fdt: &mut Fdt, info: &DeviceTreeInfo) -> Result<(), RebootReason> {
Jiyong Parke9d87e82023-03-21 19:28:40 +0900634 fdt.unpack().map_err(|e| {
635 error!("Failed to unpack DT for patching: {e}");
636 RebootReason::InvalidFdt
637 })?;
638
Jiyong Park9c63cd12023-03-21 17:53:07 +0900639 if let Some(initrd_range) = &info.initrd_range {
640 patch_initrd_range(fdt, initrd_range).map_err(|e| {
641 error!("Failed to patch initrd range to DT: {e}");
642 RebootReason::InvalidFdt
643 })?;
644 }
645 patch_memory_range(fdt, &info.memory_range).map_err(|e| {
646 error!("Failed to patch memory range to DT: {e}");
647 RebootReason::InvalidFdt
648 })?;
Jiyong Parke9d87e82023-03-21 19:28:40 +0900649 if let Some(bootargs) = &info.bootargs {
650 patch_bootargs(fdt, bootargs.as_c_str()).map_err(|e| {
651 error!("Failed to patch bootargs to DT: {e}");
652 RebootReason::InvalidFdt
653 })?;
654 }
Jiyong Park9c63cd12023-03-21 17:53:07 +0900655 patch_num_cpus(fdt, info.num_cpus).map_err(|e| {
656 error!("Failed to patch cpus to DT: {e}");
657 RebootReason::InvalidFdt
658 })?;
659 patch_pci_info(fdt, &info.pci_info).map_err(|e| {
660 error!("Failed to patch pci info to DT: {e}");
661 RebootReason::InvalidFdt
662 })?;
663 patch_serial_info(fdt, &info.serial_info).map_err(|e| {
664 error!("Failed to patch serial info to DT: {e}");
665 RebootReason::InvalidFdt
666 })?;
667 patch_swiotlb_info(fdt, &info.swiotlb_info).map_err(|e| {
668 error!("Failed to patch swiotlb info to DT: {e}");
669 RebootReason::InvalidFdt
670 })?;
671 patch_gic(fdt, info.num_cpus).map_err(|e| {
672 error!("Failed to patch gic info to DT: {e}");
673 RebootReason::InvalidFdt
674 })?;
675 patch_timer(fdt, info.num_cpus).map_err(|e| {
676 error!("Failed to patch timer info to DT: {e}");
677 RebootReason::InvalidFdt
678 })?;
Jiyong Parke9d87e82023-03-21 19:28:40 +0900679
680 fdt.pack().map_err(|e| {
681 error!("Failed to pack DT after patching: {e}");
682 RebootReason::InvalidFdt
683 })?;
684
Jiyong Park9c63cd12023-03-21 17:53:07 +0900685 Ok(())
686}
687
Pierre-Clément Tosi4ba79662023-02-13 11:22:41 +0000688/// Modifies the input DT according to the fields of the configuration.
689pub fn modify_for_next_stage(
690 fdt: &mut Fdt,
691 bcc: &[u8],
692 new_instance: bool,
693 strict_boot: bool,
Jiyong Parkc23426b2023-04-10 17:32:27 +0900694 debug_policy: Option<&mut [u8]>,
Jiyong Parkc5d2ef22023-04-11 01:23:46 +0900695 debuggable: bool,
Pierre-Clément Tosi4ba79662023-02-13 11:22:41 +0000696) -> libfdt::Result<()> {
Pierre-Clément Tosieb887ac2023-05-02 13:33:37 +0000697 if let Some(debug_policy) = debug_policy {
698 let backup = Vec::from(fdt.as_slice());
699 fdt.unpack()?;
700 let backup_fdt = Fdt::from_slice(backup.as_slice()).unwrap();
701 if apply_debug_policy(fdt, backup_fdt, debug_policy)? {
702 info!("Debug policy applied.");
703 } else {
704 // apply_debug_policy restored fdt to backup_fdt so unpack it again.
705 fdt.unpack()?;
706 }
707 } else {
708 info!("No debug policy found.");
709 fdt.unpack()?;
710 }
Pierre-Clément Tosidb74cb12022-12-08 13:56:25 +0000711
Jiyong Parke9d87e82023-03-21 19:28:40 +0900712 patch_dice_node(fdt, bcc.as_ptr() as usize, bcc.len())?;
Pierre-Clément Tosi4ba79662023-02-13 11:22:41 +0000713
Jiyong Parkb87f3302023-03-21 10:03:11 +0900714 set_or_clear_chosen_flag(fdt, cstr!("avf,strict-boot"), strict_boot)?;
715 set_or_clear_chosen_flag(fdt, cstr!("avf,new-instance"), new_instance)?;
Pierre-Clément Tosi4ba79662023-02-13 11:22:41 +0000716
Jiyong Park32f37ef2023-05-17 16:15:58 +0900717 if !debuggable {
Jiyong Parkc5d2ef22023-04-11 01:23:46 +0900718 if let Some(bootargs) = read_bootargs_from(fdt)? {
719 filter_out_dangerous_bootargs(fdt, &bootargs)?;
720 }
721 }
722
Pierre-Clément Tosi4ba79662023-02-13 11:22:41 +0000723 fdt.pack()?;
724
725 Ok(())
726}
727
Jiyong Parke9d87e82023-03-21 19:28:40 +0900728/// Patch the "google,open-dice"-compatible reserved-memory node to point to the bcc range
729fn patch_dice_node(fdt: &mut Fdt, addr: usize, size: usize) -> libfdt::Result<()> {
Pierre-Clément Tosidb74cb12022-12-08 13:56:25 +0000730 // We reject DTs with missing reserved-memory node as validation should have checked that the
731 // "swiotlb" subnode (compatible = "restricted-dma-pool") was present.
Jiyong Parke9d87e82023-03-21 19:28:40 +0900732 let node = fdt.node_mut(cstr!("/reserved-memory"))?.ok_or(libfdt::FdtError::NotFound)?;
Pierre-Clément Tosidb74cb12022-12-08 13:56:25 +0000733
Jiyong Parke9d87e82023-03-21 19:28:40 +0900734 let mut node = node.next_compatible(cstr!("google,open-dice"))?.ok_or(FdtError::NotFound)?;
Pierre-Clément Tosidb74cb12022-12-08 13:56:25 +0000735
Jiyong Parke9d87e82023-03-21 19:28:40 +0900736 let addr: u64 = addr.try_into().unwrap();
737 let size: u64 = size.try_into().unwrap();
738 node.setprop_inplace(cstr!("reg"), flatten(&[addr.to_be_bytes(), size.to_be_bytes()]))
Pierre-Clément Tosi4ba79662023-02-13 11:22:41 +0000739}
740
741fn set_or_clear_chosen_flag(fdt: &mut Fdt, flag: &CStr, value: bool) -> libfdt::Result<()> {
742 // TODO(b/249054080): Refactor to not panic if the DT doesn't contain a /chosen node.
743 let mut chosen = fdt.chosen_mut()?.unwrap();
744 if value {
745 chosen.setprop_empty(flag)?;
746 } else {
747 match chosen.delprop(flag) {
748 Ok(()) | Err(FdtError::NotFound) => (),
749 Err(e) => return Err(e),
750 }
751 }
Pierre-Clément Tosidb74cb12022-12-08 13:56:25 +0000752
753 Ok(())
754}
Jiyong Parkc23426b2023-04-10 17:32:27 +0900755
Pierre-Clément Tosia50167b2023-05-02 13:19:29 +0000756/// Apply the debug policy overlay to the guest DT.
757///
758/// Returns Ok(true) on success, Ok(false) on recovered failure and Err(_) on corruption of the DT.
Pierre-Clément Tosieb887ac2023-05-02 13:33:37 +0000759fn apply_debug_policy(
760 fdt: &mut Fdt,
761 backup_fdt: &Fdt,
762 debug_policy: &[u8],
763) -> libfdt::Result<bool> {
Pierre-Clément Tosia50167b2023-05-02 13:19:29 +0000764 let mut debug_policy = Vec::from(debug_policy);
765 let overlay = match Fdt::from_mut_slice(debug_policy.as_mut_slice()) {
Jiyong Parkc23426b2023-04-10 17:32:27 +0900766 Ok(overlay) => overlay,
767 Err(e) => {
Pierre-Clément Tosia50167b2023-05-02 13:19:29 +0000768 warn!("Corrupted debug policy found: {e}. Not applying.");
769 return Ok(false);
Jiyong Parkc23426b2023-04-10 17:32:27 +0900770 }
771 };
Jiyong Parkc23426b2023-04-10 17:32:27 +0900772
Pierre-Clément Tosia50167b2023-05-02 13:19:29 +0000773 // SAFETY - on failure, the corrupted DT is restored using the backup.
Jiyong Parkc23426b2023-04-10 17:32:27 +0900774 if let Err(e) = unsafe { fdt.apply_overlay(overlay) } {
Pierre-Clément Tosia50167b2023-05-02 13:19:29 +0000775 warn!("Failed to apply debug policy: {e}. Recovering...");
Jiyong Parkc23426b2023-04-10 17:32:27 +0900776 fdt.copy_from_slice(backup_fdt.as_slice())?;
Jiyong Parkc23426b2023-04-10 17:32:27 +0900777 // A successful restoration is considered success because an invalid debug policy
778 // shouldn't DOS the pvmfw
Pierre-Clément Tosia50167b2023-05-02 13:19:29 +0000779 Ok(false)
780 } else {
781 Ok(true)
Jiyong Parkc23426b2023-04-10 17:32:27 +0900782 }
Jiyong Parkc23426b2023-04-10 17:32:27 +0900783}
Jiyong Parkc5d2ef22023-04-11 01:23:46 +0900784
785fn read_common_debug_policy(fdt: &Fdt, debug_feature_name: &CStr) -> libfdt::Result<bool> {
786 if let Some(node) = fdt.node(cstr!("/avf/guest/common"))? {
787 if let Some(value) = node.getprop_u32(debug_feature_name)? {
788 return Ok(value == 1);
789 }
790 }
791 Ok(false) // if the policy doesn't exist or not 1, don't enable the debug feature
792}
793
794fn filter_out_dangerous_bootargs(fdt: &mut Fdt, bootargs: &CStr) -> libfdt::Result<()> {
795 let has_crashkernel = read_common_debug_policy(fdt, cstr!("ramdump"))?;
796 let has_console = read_common_debug_policy(fdt, cstr!("log"))?;
797
798 let accepted: &[(&str, Box<dyn Fn(Option<&str>) -> bool>)] = &[
799 ("panic", Box::new(|v| if let Some(v) = v { v == "=-1" } else { false })),
800 ("crashkernel", Box::new(|_| has_crashkernel)),
801 ("console", Box::new(|_| has_console)),
802 ];
803
804 // parse and filter out unwanted
805 let mut filtered = Vec::new();
806 for arg in BootArgsIterator::new(bootargs).map_err(|e| {
807 info!("Invalid bootarg: {e}");
808 FdtError::BadValue
809 })? {
810 match accepted.iter().find(|&t| t.0 == arg.name()) {
811 Some((_, pred)) if pred(arg.value()) => filtered.push(arg),
812 _ => debug!("Rejected bootarg {}", arg.as_ref()),
813 }
814 }
815
816 // flatten into a new C-string
817 let mut new_bootargs = Vec::new();
818 for (i, arg) in filtered.iter().enumerate() {
819 if i != 0 {
820 new_bootargs.push(b' '); // separator
821 }
822 new_bootargs.extend_from_slice(arg.as_ref().as_bytes());
823 }
824 new_bootargs.push(b'\0');
825
826 let mut node = fdt.chosen_mut()?.ok_or(FdtError::NotFound)?;
827 node.setprop(cstr!("bootargs"), new_bootargs.as_slice())
828}