| Sean Paul | e0c4c3d | 2015-01-20 16:56:04 -0500 | [diff] [blame] | 1 | /* | 
|  | 2 | * Copyright (C) 2015 The Android Open Source Project | 
|  | 3 | * | 
|  | 4 | * Licensed under the Apache License, Version 2.0 (the "License"); | 
|  | 5 | * you may not use this file except in compliance with the License. | 
|  | 6 | * You may obtain a copy of the License at | 
|  | 7 | * | 
|  | 8 | *      http://www.apache.org/licenses/LICENSE-2.0 | 
|  | 9 | * | 
|  | 10 | * Unless required by applicable law or agreed to in writing, software | 
|  | 11 | * distributed under the License is distributed on an "AS IS" BASIS, | 
|  | 12 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. | 
|  | 13 | * See the License for the specific language governing permissions and | 
|  | 14 | * limitations under the License. | 
|  | 15 | */ | 
|  | 16 |  | 
|  | 17 | #define LOG_TAG "hwcomposer-drm" | 
|  | 18 |  | 
|  | 19 | #include <fcntl.h> | 
|  | 20 | #include <errno.h> | 
| Allen Martin | 3d3f70a | 2015-02-21 21:20:17 -0800 | [diff] [blame] | 21 | #include <list> | 
| Sean Paul | e0c4c3d | 2015-01-20 16:56:04 -0500 | [diff] [blame] | 22 | #include <sys/param.h> | 
| Sean Paul | 9aa5ad3 | 2015-01-22 15:47:54 -0500 | [diff] [blame] | 23 | #include <sys/resource.h> | 
|  | 24 | #include <pthread.h> | 
| Sean Paul | e0c4c3d | 2015-01-20 16:56:04 -0500 | [diff] [blame] | 25 |  | 
|  | 26 | #include <cutils/log.h> | 
|  | 27 |  | 
|  | 28 | #include <xf86drm.h> | 
|  | 29 | #include <xf86drmMode.h> | 
| Sean Paul | e0c4c3d | 2015-01-20 16:56:04 -0500 | [diff] [blame] | 30 |  | 
|  | 31 | #include <hardware/hardware.h> | 
|  | 32 | #include <hardware/hwcomposer.h> | 
|  | 33 |  | 
| Lauri Peltonen | 64717b2 | 2015-02-04 16:55:31 +0200 | [diff] [blame] | 34 | #include <cutils/properties.h> | 
| Sean Paul | 9aa5ad3 | 2015-01-22 15:47:54 -0500 | [diff] [blame] | 35 | #include <sync/sync.h> | 
| Sean Paul | f1dc191 | 2015-01-24 01:34:31 -0500 | [diff] [blame] | 36 | #include <sw_sync.h> | 
| Sean Paul | 9aa5ad3 | 2015-01-22 15:47:54 -0500 | [diff] [blame] | 37 |  | 
| Sean Paul | cd36a9e | 2015-01-22 18:01:18 -0500 | [diff] [blame] | 38 | #include "drm_hwcomposer.h" | 
| Sean Paul | e0c4c3d | 2015-01-20 16:56:04 -0500 | [diff] [blame] | 39 |  | 
|  | 40 | #define ARRAY_SIZE(arr) (int)(sizeof(arr) / sizeof((arr)[0])) | 
|  | 41 |  | 
|  | 42 | #define HWCOMPOSER_DRM_DEVICE "/dev/dri/card0" | 
|  | 43 | #define MAX_NUM_DISPLAYS 3 | 
|  | 44 | #define UM_PER_INCH 25400 | 
|  | 45 |  | 
|  | 46 | static const uint32_t panel_types[] = { | 
|  | 47 | DRM_MODE_CONNECTOR_LVDS, | 
|  | 48 | DRM_MODE_CONNECTOR_eDP, | 
|  | 49 | DRM_MODE_CONNECTOR_DSI, | 
|  | 50 | }; | 
|  | 51 |  | 
| Sean Paul | 9aa5ad3 | 2015-01-22 15:47:54 -0500 | [diff] [blame] | 52 | struct hwc_worker { | 
|  | 53 | pthread_t thread; | 
|  | 54 | pthread_mutex_t lock; | 
|  | 55 | pthread_cond_t cond; | 
|  | 56 | bool exit; | 
|  | 57 | }; | 
|  | 58 |  | 
| Sean Paul | e0c4c3d | 2015-01-20 16:56:04 -0500 | [diff] [blame] | 59 | struct hwc_drm_display { | 
| Sean Paul | 9aa5ad3 | 2015-01-22 15:47:54 -0500 | [diff] [blame] | 60 | struct hwc_context_t *ctx; | 
|  | 61 | int display; | 
|  | 62 |  | 
| Sean Paul | e0c4c3d | 2015-01-20 16:56:04 -0500 | [diff] [blame] | 63 | uint32_t connector_id; | 
|  | 64 |  | 
|  | 65 | drmModeModeInfoPtr configs; | 
|  | 66 | uint32_t num_configs; | 
|  | 67 |  | 
| Sean Paul | fa406a1 | 2015-02-04 10:05:44 -0800 | [diff] [blame] | 68 | drmModeModeInfo active_mode; | 
| Sean Paul | e0c4c3d | 2015-01-20 16:56:04 -0500 | [diff] [blame] | 69 | uint32_t active_crtc; | 
| Sean Paul | eb9e75c | 2015-01-25 23:31:30 -0500 | [diff] [blame] | 70 | int active_pipe; | 
| Sean Paul | efb20cb | 2015-02-04 09:29:15 -0800 | [diff] [blame] | 71 | bool initial_modeset_required; | 
| Sean Paul | 9aa5ad3 | 2015-01-22 15:47:54 -0500 | [diff] [blame] | 72 |  | 
|  | 73 | struct hwc_worker set_worker; | 
|  | 74 |  | 
| Allen Martin | 3d3f70a | 2015-02-21 21:20:17 -0800 | [diff] [blame] | 75 | std::list<struct hwc_drm_bo> buf_queue; | 
| Sean Paul | 9aa5ad3 | 2015-01-22 15:47:54 -0500 | [diff] [blame] | 76 | struct hwc_drm_bo front; | 
| Sean Paul | f1dc191 | 2015-01-24 01:34:31 -0500 | [diff] [blame] | 77 |  | 
|  | 78 | int timeline_fd; | 
|  | 79 | unsigned timeline_next; | 
| Sean Paul | eb9e75c | 2015-01-25 23:31:30 -0500 | [diff] [blame] | 80 |  | 
|  | 81 | struct hwc_worker vsync_worker; | 
|  | 82 | bool enable_vsync_events; | 
| Sean Paul | e0c4c3d | 2015-01-20 16:56:04 -0500 | [diff] [blame] | 83 | }; | 
|  | 84 |  | 
|  | 85 | struct hwc_context_t { | 
|  | 86 | hwc_composer_device_1_t device; | 
|  | 87 |  | 
|  | 88 | int fd; | 
| Sean Paul | e0c4c3d | 2015-01-20 16:56:04 -0500 | [diff] [blame] | 89 |  | 
|  | 90 | hwc_procs_t const *procs; | 
| Sean Paul | cd36a9e | 2015-01-22 18:01:18 -0500 | [diff] [blame] | 91 | struct hwc_import_context *import_ctx; | 
| Sean Paul | e0c4c3d | 2015-01-20 16:56:04 -0500 | [diff] [blame] | 92 |  | 
|  | 93 | struct hwc_drm_display displays[MAX_NUM_DISPLAYS]; | 
|  | 94 | int num_displays; | 
|  | 95 | }; | 
|  | 96 |  | 
|  | 97 | static int hwc_get_drm_display(struct hwc_context_t *ctx, int display, | 
|  | 98 | struct hwc_drm_display **hd) | 
|  | 99 | { | 
|  | 100 | if (display >= MAX_NUM_DISPLAYS) { | 
|  | 101 | ALOGE("Requested display is out-of-bounds %d %d", display, | 
|  | 102 | MAX_NUM_DISPLAYS); | 
|  | 103 | return -EINVAL; | 
|  | 104 | } | 
|  | 105 | *hd = &ctx->displays[display]; | 
|  | 106 | return 0; | 
|  | 107 | } | 
|  | 108 |  | 
|  | 109 | static int hwc_prepare_layer(hwc_layer_1_t *layer) | 
|  | 110 | { | 
|  | 111 | /* TODO: We can't handle background right now, defer to sufaceFlinger */ | 
|  | 112 | if (layer->compositionType == HWC_BACKGROUND) { | 
|  | 113 | layer->compositionType = HWC_FRAMEBUFFER; | 
|  | 114 | ALOGV("Can't handle background layers yet"); | 
|  | 115 |  | 
|  | 116 | /* TODO: Support sideband compositions */ | 
|  | 117 | } else if (layer->compositionType == HWC_SIDEBAND) { | 
|  | 118 | layer->compositionType = HWC_FRAMEBUFFER; | 
|  | 119 | ALOGV("Can't handle sideband content yet"); | 
|  | 120 | } | 
|  | 121 |  | 
|  | 122 | layer->hints = 0; | 
|  | 123 |  | 
|  | 124 | /* TODO: Handle cursor by setting compositionType=HWC_CURSOR_OVERLAY */ | 
|  | 125 | if (layer->flags & HWC_IS_CURSOR_LAYER) { | 
|  | 126 | ALOGV("Can't handle async cursors yet"); | 
|  | 127 | } | 
|  | 128 |  | 
|  | 129 | /* TODO: Handle transformations */ | 
|  | 130 | if (layer->transform) { | 
|  | 131 | ALOGV("Can't handle transformations yet"); | 
|  | 132 | } | 
|  | 133 |  | 
|  | 134 | /* TODO: Handle blending & plane alpha*/ | 
|  | 135 | if (layer->blending == HWC_BLENDING_PREMULT || | 
|  | 136 | layer->blending == HWC_BLENDING_COVERAGE) { | 
|  | 137 | ALOGV("Can't handle blending yet"); | 
|  | 138 | } | 
|  | 139 |  | 
|  | 140 | /* TODO: Handle cropping & scaling */ | 
|  | 141 |  | 
|  | 142 | return 0; | 
|  | 143 | } | 
|  | 144 |  | 
|  | 145 | static int hwc_prepare(hwc_composer_device_1_t */* dev */, size_t num_displays, | 
|  | 146 | hwc_display_contents_1_t** display_contents) | 
|  | 147 | { | 
|  | 148 | int ret = 0, i, j; | 
|  | 149 |  | 
|  | 150 | /* TODO: Check flags for HWC_GEOMETRY_CHANGED */ | 
|  | 151 |  | 
|  | 152 | for (i = 0; i < (int)num_displays && i < MAX_NUM_DISPLAYS; i++) { | 
| Sean Paul | dffca95 | 2015-02-04 10:19:55 -0800 | [diff] [blame] | 153 |  | 
|  | 154 | if (!display_contents[i]) | 
|  | 155 | continue; | 
|  | 156 |  | 
| Sean Paul | e0c4c3d | 2015-01-20 16:56:04 -0500 | [diff] [blame] | 157 | for (j = 0; j < (int)display_contents[i]->numHwLayers; j++) { | 
|  | 158 | ret = hwc_prepare_layer( | 
|  | 159 | &display_contents[i]->hwLayers[j]); | 
|  | 160 | if (ret) { | 
|  | 161 | ALOGE("Failed to prepare layer %d:%d", j, i); | 
|  | 162 | return ret; | 
|  | 163 | } | 
|  | 164 | } | 
|  | 165 | } | 
|  | 166 |  | 
|  | 167 | return ret; | 
|  | 168 | } | 
|  | 169 |  | 
| Sean Paul | e0c4c3d | 2015-01-20 16:56:04 -0500 | [diff] [blame] | 170 | static bool hwc_mode_is_equal(drmModeModeInfoPtr a, drmModeModeInfoPtr b) | 
|  | 171 | { | 
|  | 172 | return a->clock == b->clock && | 
|  | 173 | a->hdisplay == b->hdisplay && | 
|  | 174 | a->hsync_start == b->hsync_start && | 
|  | 175 | a->hsync_end == b->hsync_end && | 
|  | 176 | a->htotal == b->htotal && | 
|  | 177 | a->hskew == b->hskew && | 
|  | 178 | a->vdisplay == b->vdisplay && | 
|  | 179 | a->vsync_start == b->vsync_start && | 
|  | 180 | a->vsync_end == b->vsync_end && | 
|  | 181 | a->vtotal == b->vtotal && | 
|  | 182 | a->vscan == b->vscan && | 
|  | 183 | a->vrefresh == b->vrefresh && | 
|  | 184 | a->flags == b->flags && | 
|  | 185 | a->type == b->type && | 
|  | 186 | !strcmp(a->name, b->name); | 
|  | 187 | } | 
|  | 188 |  | 
| Sean Paul | 9aa5ad3 | 2015-01-22 15:47:54 -0500 | [diff] [blame] | 189 | static int hwc_modeset_required(struct hwc_drm_display *hd, | 
|  | 190 | bool *modeset_required) | 
|  | 191 | { | 
|  | 192 | drmModeCrtcPtr crtc; | 
|  | 193 | drmModeModeInfoPtr m; | 
|  | 194 |  | 
| Sean Paul | efb20cb | 2015-02-04 09:29:15 -0800 | [diff] [blame] | 195 | if (hd->initial_modeset_required) { | 
|  | 196 | *modeset_required = true; | 
|  | 197 | hd->initial_modeset_required = false; | 
|  | 198 | return 0; | 
|  | 199 | } | 
|  | 200 |  | 
| Sean Paul | 9aa5ad3 | 2015-01-22 15:47:54 -0500 | [diff] [blame] | 201 | crtc = drmModeGetCrtc(hd->ctx->fd, hd->active_crtc); | 
|  | 202 | if (!crtc) { | 
|  | 203 | ALOGE("Failed to get crtc for display %d", hd->display); | 
|  | 204 | return -ENODEV; | 
|  | 205 | } | 
|  | 206 |  | 
| Sean Paul | fa406a1 | 2015-02-04 10:05:44 -0800 | [diff] [blame] | 207 | m = &hd->active_mode; | 
| Sean Paul | 9aa5ad3 | 2015-01-22 15:47:54 -0500 | [diff] [blame] | 208 |  | 
|  | 209 | /* Do a modeset if we haven't done one, or the mode has changed */ | 
|  | 210 | if (!crtc->mode_valid || !hwc_mode_is_equal(m, &crtc->mode)) | 
|  | 211 | *modeset_required = true; | 
|  | 212 | else | 
|  | 213 | *modeset_required = false; | 
|  | 214 |  | 
|  | 215 | drmModeFreeCrtc(crtc); | 
|  | 216 |  | 
|  | 217 | return 0; | 
|  | 218 | } | 
|  | 219 |  | 
|  | 220 | static void hwc_flip_handler(int /* fd */, unsigned int /* sequence */, | 
|  | 221 | unsigned int /* tv_sec */, unsigned int /* tv_usec */, | 
|  | 222 | void */* user_data */) | 
|  | 223 | { | 
|  | 224 | } | 
|  | 225 |  | 
| Sean Paul | 9b1bb84 | 2015-01-23 01:11:58 -0500 | [diff] [blame] | 226 | static int hwc_flip(struct hwc_drm_display *hd, struct hwc_drm_bo *buf) | 
| Sean Paul | 9aa5ad3 | 2015-01-22 15:47:54 -0500 | [diff] [blame] | 227 | { | 
|  | 228 | fd_set fds; | 
|  | 229 | drmEventContext event_context; | 
|  | 230 | int ret; | 
|  | 231 | bool modeset_required; | 
|  | 232 |  | 
|  | 233 | ret = hwc_modeset_required(hd, &modeset_required); | 
|  | 234 | if (ret) { | 
|  | 235 | ALOGE("Failed to determine if modeset is required %d", ret); | 
|  | 236 | return ret; | 
|  | 237 | } | 
|  | 238 | if (modeset_required) { | 
| Sean Paul | 9b1bb84 | 2015-01-23 01:11:58 -0500 | [diff] [blame] | 239 | ret = drmModeSetCrtc(hd->ctx->fd, hd->active_crtc, buf->fb_id, | 
|  | 240 | 0, 0, &hd->connector_id, 1, | 
| Sean Paul | fa406a1 | 2015-02-04 10:05:44 -0800 | [diff] [blame] | 241 | &hd->active_mode); | 
| Sean Paul | 9aa5ad3 | 2015-01-22 15:47:54 -0500 | [diff] [blame] | 242 | if (ret) { | 
|  | 243 | ALOGE("Modeset failed for crtc %d", | 
|  | 244 | hd->active_crtc); | 
|  | 245 | return ret; | 
|  | 246 | } | 
|  | 247 | return 0; | 
|  | 248 | } | 
|  | 249 |  | 
|  | 250 | FD_ZERO(&fds); | 
|  | 251 | FD_SET(hd->ctx->fd, &fds); | 
|  | 252 |  | 
|  | 253 | event_context.version = DRM_EVENT_CONTEXT_VERSION; | 
|  | 254 | event_context.page_flip_handler = hwc_flip_handler; | 
|  | 255 |  | 
| Sean Paul | 9b1bb84 | 2015-01-23 01:11:58 -0500 | [diff] [blame] | 256 | ret = drmModePageFlip(hd->ctx->fd, hd->active_crtc, buf->fb_id, | 
| Sean Paul | 9aa5ad3 | 2015-01-22 15:47:54 -0500 | [diff] [blame] | 257 | DRM_MODE_PAGE_FLIP_EVENT, hd); | 
|  | 258 | if (ret) { | 
|  | 259 | ALOGE("Failed to flip buffer for crtc %d", | 
|  | 260 | hd->active_crtc); | 
|  | 261 | return ret; | 
|  | 262 | } | 
|  | 263 |  | 
|  | 264 | do { | 
|  | 265 | ret = select(hd->ctx->fd + 1, &fds, NULL, NULL, NULL); | 
|  | 266 | } while (ret == -1 && errno == EINTR); | 
|  | 267 |  | 
|  | 268 | if (ret != 1) { | 
|  | 269 | ALOGE("Failed waiting for flip to complete\n"); | 
|  | 270 | return -EINVAL; | 
|  | 271 | } | 
|  | 272 | drmHandleEvent(hd->ctx->fd, &event_context); | 
|  | 273 |  | 
|  | 274 | return 0; | 
|  | 275 | } | 
|  | 276 |  | 
| Sean Paul | 3bc48e8 | 2015-01-23 01:41:13 -0500 | [diff] [blame] | 277 | static int hwc_wait_and_set(struct hwc_drm_display *hd, | 
|  | 278 | struct hwc_drm_bo *buf) | 
| Sean Paul | 9aa5ad3 | 2015-01-22 15:47:54 -0500 | [diff] [blame] | 279 | { | 
| Sean Paul | aea15c2 | 2015-02-09 02:24:11 -0500 | [diff] [blame] | 280 | struct drm_gem_close args; | 
|  | 281 | int ret, i; | 
| Sean Paul | 9aa5ad3 | 2015-01-22 15:47:54 -0500 | [diff] [blame] | 282 |  | 
| Lauri Peltonen | 132e010 | 2015-02-12 13:54:33 +0200 | [diff] [blame] | 283 | if (buf->acquire_fence_fd >= 0) { | 
|  | 284 | ret = sync_wait(buf->acquire_fence_fd, -1); | 
|  | 285 | close(buf->acquire_fence_fd); | 
|  | 286 | buf->acquire_fence_fd = -1; | 
|  | 287 | if (ret) { | 
|  | 288 | ALOGE("Failed to wait for acquire %d", ret); | 
|  | 289 | return ret; | 
|  | 290 | } | 
|  | 291 | } | 
|  | 292 |  | 
| Sean Paul | 3bc48e8 | 2015-01-23 01:41:13 -0500 | [diff] [blame] | 293 | ret = hwc_flip(hd, buf); | 
| Sean Paul | 9aa5ad3 | 2015-01-22 15:47:54 -0500 | [diff] [blame] | 294 | if (ret) { | 
|  | 295 | ALOGE("Failed to perform flip\n"); | 
|  | 296 | return ret; | 
|  | 297 | } | 
|  | 298 |  | 
| Sean Paul | aea15c2 | 2015-02-09 02:24:11 -0500 | [diff] [blame] | 299 | memset(&args, 0, sizeof(args)); | 
|  | 300 | for (i = 0; i < ARRAY_SIZE(hd->front.gem_handles); i++) { | 
|  | 301 | if (!hd->front.gem_handles[i]) | 
|  | 302 | continue; | 
| Allen Martin | 3d3f70a | 2015-02-21 21:20:17 -0800 | [diff] [blame] | 303 |  | 
|  | 304 | /* check for duplicate handle in buf_queue */ | 
| Allen Martin | f4e49b8 | 2015-02-22 04:18:17 -0800 | [diff] [blame] | 305 | bool found; | 
| Allen Martin | 3d3f70a | 2015-02-21 21:20:17 -0800 | [diff] [blame] | 306 |  | 
|  | 307 | ret = pthread_mutex_lock(&hd->set_worker.lock); | 
|  | 308 | if (ret) { | 
|  | 309 | ALOGE("Failed to lock set lock in wait_and_set() %d", ret); | 
|  | 310 | continue; | 
|  | 311 | } | 
|  | 312 |  | 
|  | 313 | found = false; | 
| Allen Martin | f4e49b8 | 2015-02-22 04:18:17 -0800 | [diff] [blame] | 314 | for (std::list<struct hwc_drm_bo>::iterator bi = hd->buf_queue.begin(); | 
| Allen Martin | 3d3f70a | 2015-02-21 21:20:17 -0800 | [diff] [blame] | 315 | bi != hd->buf_queue.end(); | 
|  | 316 | ++bi) | 
|  | 317 | for (int j = 0; j < ARRAY_SIZE(bi->gem_handles); j++) | 
| Allen Martin | f4e49b8 | 2015-02-22 04:18:17 -0800 | [diff] [blame] | 318 | if (hd->front.gem_handles[i] == bi->gem_handles[j] ) | 
| Allen Martin | 3d3f70a | 2015-02-21 21:20:17 -0800 | [diff] [blame] | 319 | found = true; | 
|  | 320 |  | 
| Allen Martin | f4e49b8 | 2015-02-22 04:18:17 -0800 | [diff] [blame] | 321 | for (int j = 0; j < ARRAY_SIZE(buf->gem_handles); j++) | 
|  | 322 | if (hd->front.gem_handles[i] == buf->gem_handles[j]) | 
|  | 323 | found = true; | 
|  | 324 |  | 
| Allen Martin | 3d3f70a | 2015-02-21 21:20:17 -0800 | [diff] [blame] | 325 | if (!found) { | 
|  | 326 | args.handle = hd->front.gem_handles[i]; | 
|  | 327 | drmIoctl(hd->ctx->fd, DRM_IOCTL_GEM_CLOSE, &args); | 
|  | 328 | } | 
|  | 329 | if (pthread_mutex_unlock(&hd->set_worker.lock)) | 
|  | 330 | ALOGE("Failed to unlock set lock in wait_and_set() %d", ret); | 
| Sean Paul | aea15c2 | 2015-02-09 02:24:11 -0500 | [diff] [blame] | 331 | } | 
| Allen Martin | 91fa3f8 | 2015-02-22 04:48:14 -0800 | [diff] [blame] | 332 |  | 
|  | 333 | if (hd->front.fb_id) { | 
|  | 334 | ret = drmModeRmFB(hd->ctx->fd, hd->front.fb_id); | 
|  | 335 | if (ret) { | 
|  | 336 | ALOGE("Failed to rm fb from front %d", ret); | 
|  | 337 | return ret; | 
|  | 338 | } | 
|  | 339 | } | 
|  | 340 |  | 
| Sean Paul | 3bc48e8 | 2015-01-23 01:41:13 -0500 | [diff] [blame] | 341 | hd->front = *buf; | 
|  | 342 |  | 
| Sean Paul | 9aa5ad3 | 2015-01-22 15:47:54 -0500 | [diff] [blame] | 343 | return ret; | 
|  | 344 | } | 
|  | 345 |  | 
|  | 346 | static void *hwc_set_worker(void *arg) | 
|  | 347 | { | 
|  | 348 | struct hwc_drm_display *hd = (struct hwc_drm_display *)arg; | 
|  | 349 | int ret; | 
|  | 350 |  | 
|  | 351 | setpriority(PRIO_PROCESS, 0, HAL_PRIORITY_URGENT_DISPLAY); | 
|  | 352 |  | 
| Sean Paul | 9aa5ad3 | 2015-01-22 15:47:54 -0500 | [diff] [blame] | 353 | do { | 
| Sean Paul | 3bc48e8 | 2015-01-23 01:41:13 -0500 | [diff] [blame] | 354 | struct hwc_drm_bo buf; | 
|  | 355 |  | 
|  | 356 | ret = pthread_mutex_lock(&hd->set_worker.lock); | 
| Sean Paul | 9aa5ad3 | 2015-01-22 15:47:54 -0500 | [diff] [blame] | 357 | if (ret) { | 
| Sean Paul | 3bc48e8 | 2015-01-23 01:41:13 -0500 | [diff] [blame] | 358 | ALOGE("Failed to lock set lock %d", ret); | 
|  | 359 | return NULL; | 
| Sean Paul | 9aa5ad3 | 2015-01-22 15:47:54 -0500 | [diff] [blame] | 360 | } | 
|  | 361 |  | 
| Sean Paul | 3bc48e8 | 2015-01-23 01:41:13 -0500 | [diff] [blame] | 362 | if (hd->set_worker.exit) | 
|  | 363 | goto out; | 
|  | 364 |  | 
|  | 365 | if (hd->buf_queue.empty()) { | 
|  | 366 | ret = pthread_cond_wait(&hd->set_worker.cond, | 
|  | 367 | &hd->set_worker.lock); | 
|  | 368 | if (ret) { | 
|  | 369 | ALOGE("Failed to wait on condition %d", ret); | 
|  | 370 | goto out; | 
|  | 371 | } | 
|  | 372 | } | 
|  | 373 |  | 
|  | 374 | buf = hd->buf_queue.front(); | 
| Allen Martin | 3d3f70a | 2015-02-21 21:20:17 -0800 | [diff] [blame] | 375 | hd->buf_queue.pop_front(); | 
| Sean Paul | 3bc48e8 | 2015-01-23 01:41:13 -0500 | [diff] [blame] | 376 |  | 
|  | 377 | ret = pthread_mutex_unlock(&hd->set_worker.lock); | 
|  | 378 | if (ret) { | 
|  | 379 | ALOGE("Failed to unlock set lock %d", ret); | 
|  | 380 | return NULL; | 
|  | 381 | } | 
|  | 382 |  | 
|  | 383 | ret = hwc_wait_and_set(hd, &buf); | 
| Sean Paul | 9aa5ad3 | 2015-01-22 15:47:54 -0500 | [diff] [blame] | 384 | if (ret) | 
|  | 385 | ALOGE("Failed to wait and set %d", ret); | 
| Sean Paul | f1dc191 | 2015-01-24 01:34:31 -0500 | [diff] [blame] | 386 |  | 
|  | 387 | ret = sw_sync_timeline_inc(hd->timeline_fd, 1); | 
|  | 388 | if (ret) | 
|  | 389 | ALOGE("Failed to increment sync timeline %d", ret); | 
| Sean Paul | 9aa5ad3 | 2015-01-22 15:47:54 -0500 | [diff] [blame] | 390 | } while (true); | 
|  | 391 |  | 
| Sean Paul | 3bc48e8 | 2015-01-23 01:41:13 -0500 | [diff] [blame] | 392 | out: | 
| Sean Paul | 9aa5ad3 | 2015-01-22 15:47:54 -0500 | [diff] [blame] | 393 | ret = pthread_mutex_unlock(&hd->set_worker.lock); | 
| Sean Paul | 3bc48e8 | 2015-01-23 01:41:13 -0500 | [diff] [blame] | 394 | if (ret) | 
|  | 395 | ALOGE("Failed to unlock set lock while exiting %d", ret); | 
| Sean Paul | 9aa5ad3 | 2015-01-22 15:47:54 -0500 | [diff] [blame] | 396 |  | 
|  | 397 | return NULL; | 
|  | 398 | } | 
|  | 399 |  | 
| Sean Paul | e0c4c3d | 2015-01-20 16:56:04 -0500 | [diff] [blame] | 400 | static int hwc_set_display(hwc_context_t *ctx, int display, | 
|  | 401 | hwc_display_contents_1_t* display_contents) | 
|  | 402 | { | 
|  | 403 | struct hwc_drm_display *hd = NULL; | 
| Sean Paul | e0c4c3d | 2015-01-20 16:56:04 -0500 | [diff] [blame] | 404 | hwc_layer_1_t *layer = NULL; | 
| Sean Paul | 9b1bb84 | 2015-01-23 01:11:58 -0500 | [diff] [blame] | 405 | struct hwc_drm_bo buf; | 
| Sean Paul | e0c4c3d | 2015-01-20 16:56:04 -0500 | [diff] [blame] | 406 | int ret, i; | 
| Sean Paul | 9aa5ad3 | 2015-01-22 15:47:54 -0500 | [diff] [blame] | 407 | uint32_t fb_id; | 
| Sean Paul | e0c4c3d | 2015-01-20 16:56:04 -0500 | [diff] [blame] | 408 |  | 
| Sean Paul | 9b1bb84 | 2015-01-23 01:11:58 -0500 | [diff] [blame] | 409 | memset(&buf, 0, sizeof(buf)); | 
|  | 410 |  | 
| Sean Paul | e0c4c3d | 2015-01-20 16:56:04 -0500 | [diff] [blame] | 411 | ret = hwc_get_drm_display(ctx, display, &hd); | 
|  | 412 | if (ret) | 
| Lauri Peltonen | 132e010 | 2015-02-12 13:54:33 +0200 | [diff] [blame] | 413 | goto out; | 
| Sean Paul | e0c4c3d | 2015-01-20 16:56:04 -0500 | [diff] [blame] | 414 |  | 
|  | 415 | if (!hd->active_crtc) { | 
|  | 416 | ALOGE("There is no active crtc for display %d", display); | 
| Lauri Peltonen | 132e010 | 2015-02-12 13:54:33 +0200 | [diff] [blame] | 417 | ret = -ENOENT; | 
|  | 418 | goto out; | 
| Sean Paul | e0c4c3d | 2015-01-20 16:56:04 -0500 | [diff] [blame] | 419 | } | 
|  | 420 |  | 
|  | 421 | /* | 
|  | 422 | * TODO: We can only support one hw layer atm, so choose either the | 
|  | 423 | * first one or the framebuffer target. | 
|  | 424 | */ | 
|  | 425 | if (!display_contents->numHwLayers) { | 
|  | 426 | return 0; | 
|  | 427 | } else if (display_contents->numHwLayers == 1) { | 
|  | 428 | layer = &display_contents->hwLayers[0]; | 
|  | 429 | } else { | 
|  | 430 | for (i = 0; i < (int)display_contents->numHwLayers; i++) { | 
|  | 431 | layer = &display_contents->hwLayers[i]; | 
|  | 432 | if (layer->compositionType == HWC_FRAMEBUFFER_TARGET) | 
|  | 433 | break; | 
|  | 434 | } | 
|  | 435 | if (i == (int)display_contents->numHwLayers) { | 
|  | 436 | ALOGE("Could not find a suitable layer for display %d", | 
|  | 437 | display); | 
|  | 438 | } | 
|  | 439 | } | 
|  | 440 |  | 
| Allen Martin | 3d3f70a | 2015-02-21 21:20:17 -0800 | [diff] [blame] | 441 |  | 
|  | 442 | ret = pthread_mutex_lock(&hd->set_worker.lock); | 
|  | 443 | if (ret) { | 
|  | 444 | ALOGE("Failed to lock set lock in set() %d", ret); | 
|  | 445 | goto out; | 
|  | 446 | } | 
|  | 447 |  | 
| Sean Paul | 3bc48e8 | 2015-01-23 01:41:13 -0500 | [diff] [blame] | 448 | ret = hwc_create_bo_from_import(ctx->fd, ctx->import_ctx, layer->handle, | 
|  | 449 | &buf); | 
|  | 450 | if (ret) { | 
|  | 451 | ALOGE("Failed to import handle to drm bo %d", ret); | 
| Lauri Peltonen | 132e010 | 2015-02-12 13:54:33 +0200 | [diff] [blame] | 452 | goto out; | 
| Sean Paul | 3bc48e8 | 2015-01-23 01:41:13 -0500 | [diff] [blame] | 453 | } | 
|  | 454 | buf.acquire_fence_fd = layer->acquireFenceFd; | 
| Lauri Peltonen | 132e010 | 2015-02-12 13:54:33 +0200 | [diff] [blame] | 455 | layer->acquireFenceFd = -1; | 
| Sean Paul | 3bc48e8 | 2015-01-23 01:41:13 -0500 | [diff] [blame] | 456 |  | 
| Allen Martin | 91fa3f8 | 2015-02-22 04:48:14 -0800 | [diff] [blame] | 457 | ret = drmModeAddFB2(hd->ctx->fd, buf.width, | 
|  | 458 | buf.height, buf.format, buf.gem_handles, buf.pitches, | 
|  | 459 | buf.offsets, &buf.fb_id, 0); | 
|  | 460 | if (ret) { | 
|  | 461 | ALOGE("could not create drm fb %d", ret); | 
|  | 462 | goto out; | 
|  | 463 | } | 
|  | 464 |  | 
| Sean Paul | f1dc191 | 2015-01-24 01:34:31 -0500 | [diff] [blame] | 465 | /* | 
|  | 466 | * TODO: Retire and release can use the same sync point here b/c hwc is | 
|  | 467 | * restricted to one layer. Once that is no longer true, this will need | 
|  | 468 | * to change | 
|  | 469 | */ | 
|  | 470 | hd->timeline_next++; | 
|  | 471 | display_contents->retireFenceFd = sw_sync_fence_create(hd->timeline_fd, | 
|  | 472 | "drm_hwc_retire", hd->timeline_next); | 
|  | 473 | layer->releaseFenceFd = sw_sync_fence_create(hd->timeline_fd, | 
|  | 474 | "drm_hwc_release", hd->timeline_next); | 
| Allen Martin | 3d3f70a | 2015-02-21 21:20:17 -0800 | [diff] [blame] | 475 | hd->buf_queue.push_back(buf); | 
| Sean Paul | 9b1bb84 | 2015-01-23 01:11:58 -0500 | [diff] [blame] | 476 |  | 
| Sean Paul | 9aa5ad3 | 2015-01-22 15:47:54 -0500 | [diff] [blame] | 477 | ret = pthread_cond_signal(&hd->set_worker.cond); | 
| Lauri Peltonen | 132e010 | 2015-02-12 13:54:33 +0200 | [diff] [blame] | 478 | if (ret) | 
| Sean Paul | 9aa5ad3 | 2015-01-22 15:47:54 -0500 | [diff] [blame] | 479 | ALOGE("Failed to signal set worker %d", ret); | 
| Sean Paul | 9aa5ad3 | 2015-01-22 15:47:54 -0500 | [diff] [blame] | 480 |  | 
| Lauri Peltonen | 132e010 | 2015-02-12 13:54:33 +0200 | [diff] [blame] | 481 | if (pthread_mutex_unlock(&hd->set_worker.lock)) | 
|  | 482 | ALOGE("Failed to unlock set lock in set()"); | 
| Sean Paul | 9aa5ad3 | 2015-01-22 15:47:54 -0500 | [diff] [blame] | 483 |  | 
| Sean Paul | e0c4c3d | 2015-01-20 16:56:04 -0500 | [diff] [blame] | 484 | out: | 
| Lauri Peltonen | 132e010 | 2015-02-12 13:54:33 +0200 | [diff] [blame] | 485 | /* Close input fences. */ | 
|  | 486 | for (i = 0; i < (int)display_contents->numHwLayers; i++) { | 
|  | 487 | layer = &display_contents->hwLayers[i]; | 
|  | 488 | if (layer->acquireFenceFd >= 0) { | 
|  | 489 | close(layer->acquireFenceFd); | 
|  | 490 | layer->acquireFenceFd = -1; | 
|  | 491 | } | 
|  | 492 | } | 
|  | 493 | if (display_contents->outbufAcquireFenceFd >= 0) { | 
|  | 494 | close(display_contents->outbufAcquireFenceFd); | 
|  | 495 | display_contents->outbufAcquireFenceFd = -1; | 
|  | 496 | } | 
| Sean Paul | 9aa5ad3 | 2015-01-22 15:47:54 -0500 | [diff] [blame] | 497 |  | 
| Sean Paul | e0c4c3d | 2015-01-20 16:56:04 -0500 | [diff] [blame] | 498 | return ret; | 
|  | 499 | } | 
|  | 500 |  | 
|  | 501 | static int hwc_set(hwc_composer_device_1_t *dev, size_t num_displays, | 
|  | 502 | hwc_display_contents_1_t** display_contents) | 
|  | 503 | { | 
|  | 504 | struct hwc_context_t *ctx = (struct hwc_context_t *)&dev->common; | 
|  | 505 | int ret = 0, i; | 
|  | 506 |  | 
| Sean Paul | e0c4c3d | 2015-01-20 16:56:04 -0500 | [diff] [blame] | 507 | for (i = 0; i < (int)num_displays && i < MAX_NUM_DISPLAYS; i++) { | 
| Sean Paul | dffca95 | 2015-02-04 10:19:55 -0800 | [diff] [blame] | 508 | if (display_contents[i]) | 
|  | 509 | ret = hwc_set_display(ctx, i, display_contents[i]); | 
| Sean Paul | e0c4c3d | 2015-01-20 16:56:04 -0500 | [diff] [blame] | 510 | } | 
|  | 511 |  | 
|  | 512 | return ret; | 
|  | 513 | } | 
|  | 514 |  | 
| Sean Paul | eb9e75c | 2015-01-25 23:31:30 -0500 | [diff] [blame] | 515 | static int hwc_wait_for_vsync(struct hwc_drm_display *hd) | 
| Sean Paul | e0c4c3d | 2015-01-20 16:56:04 -0500 | [diff] [blame] | 516 | { | 
| Sean Paul | eb9e75c | 2015-01-25 23:31:30 -0500 | [diff] [blame] | 517 | drmVBlank vblank; | 
|  | 518 | int ret; | 
|  | 519 | uint32_t high_crtc; | 
|  | 520 | int64_t timestamp; | 
|  | 521 |  | 
|  | 522 | if (hd->active_pipe == -1) | 
|  | 523 | return -EINVAL; | 
|  | 524 |  | 
|  | 525 | memset(&vblank, 0, sizeof(vblank)); | 
|  | 526 |  | 
|  | 527 | high_crtc = (hd->active_pipe << DRM_VBLANK_HIGH_CRTC_SHIFT); | 
|  | 528 | vblank.request.type = (drmVBlankSeqType)(DRM_VBLANK_RELATIVE | | 
|  | 529 | (high_crtc & DRM_VBLANK_HIGH_CRTC_MASK)); | 
|  | 530 | vblank.request.sequence = 1; | 
|  | 531 |  | 
|  | 532 | ret = drmWaitVBlank(hd->ctx->fd, &vblank); | 
|  | 533 | if (ret) { | 
|  | 534 | ALOGE("Failed to wait for vblank %d", ret); | 
|  | 535 | return ret; | 
|  | 536 | } | 
|  | 537 |  | 
|  | 538 | if (hd->ctx->procs->vsync) { | 
|  | 539 | timestamp = vblank.reply.tval_sec * 1000 * 1000 * 1000 + | 
|  | 540 | vblank.reply.tval_usec * 1000; | 
|  | 541 | hd->ctx->procs->vsync(hd->ctx->procs, hd->display, timestamp); | 
|  | 542 | } | 
|  | 543 |  | 
|  | 544 | return 0; | 
|  | 545 | } | 
|  | 546 |  | 
|  | 547 | static void *hwc_vsync_worker(void *arg) | 
|  | 548 | { | 
|  | 549 | struct hwc_drm_display *hd = (struct hwc_drm_display *)arg; | 
|  | 550 | struct hwc_worker *w = &hd->vsync_worker; | 
| Sean Paul | e0c4c3d | 2015-01-20 16:56:04 -0500 | [diff] [blame] | 551 | int ret; | 
|  | 552 |  | 
| Sean Paul | eb9e75c | 2015-01-25 23:31:30 -0500 | [diff] [blame] | 553 | setpriority(PRIO_PROCESS, 0, HAL_PRIORITY_URGENT_DISPLAY); | 
|  | 554 |  | 
|  | 555 | do { | 
|  | 556 | ret = pthread_mutex_lock(&w->lock); | 
|  | 557 | if (ret) { | 
|  | 558 | ALOGE("Failed to lock vsync lock %d", ret); | 
|  | 559 | return NULL; | 
|  | 560 | } | 
|  | 561 |  | 
|  | 562 | if (hd->active_pipe == -1) { | 
|  | 563 | ALOGE("Pipe is no longer active, disable events"); | 
|  | 564 | hd->enable_vsync_events = false; | 
|  | 565 | } | 
|  | 566 |  | 
|  | 567 | if (!hd->enable_vsync_events) { | 
|  | 568 | ret = pthread_cond_wait(&w->cond, &w->lock); | 
|  | 569 | if (ret) { | 
|  | 570 | ALOGE("Failed to wait on vsync cond %d", ret); | 
|  | 571 | break; | 
|  | 572 | } | 
|  | 573 | } | 
|  | 574 |  | 
|  | 575 | if (w->exit) | 
|  | 576 | break; | 
|  | 577 |  | 
|  | 578 | ret = pthread_mutex_unlock(&w->lock); | 
|  | 579 | if (ret) { | 
|  | 580 | ALOGE("Failed to unlock vsync lock %d", ret); | 
|  | 581 | return NULL; | 
|  | 582 | } | 
|  | 583 |  | 
|  | 584 | if (!hd->enable_vsync_events) | 
|  | 585 | continue; | 
|  | 586 |  | 
|  | 587 | ret = hwc_wait_for_vsync(hd); | 
|  | 588 | if (ret) | 
|  | 589 | ALOGE("Failed to wait for vsync %d", ret); | 
|  | 590 |  | 
|  | 591 | } while (true); | 
|  | 592 |  | 
|  | 593 | out: | 
|  | 594 | ret = pthread_mutex_unlock(&hd->set_worker.lock); | 
|  | 595 | if (ret) | 
|  | 596 | ALOGE("Failed to unlock set lock while exiting %d", ret); | 
|  | 597 |  | 
|  | 598 | return NULL; | 
|  | 599 | } | 
|  | 600 |  | 
|  | 601 | static int hwc_event_control(struct hwc_composer_device_1* dev, int display, | 
|  | 602 | int event, int enabled) | 
|  | 603 | { | 
|  | 604 | struct hwc_context_t *ctx = (struct hwc_context_t *)&dev->common; | 
|  | 605 | struct hwc_drm_display *hd = NULL; | 
|  | 606 | int ret; | 
|  | 607 |  | 
|  | 608 | ret = hwc_get_drm_display(ctx, display, &hd); | 
|  | 609 | if (ret) | 
|  | 610 | return ret; | 
|  | 611 |  | 
|  | 612 | if (event != HWC_EVENT_VSYNC || (enabled != 0 && enabled != 1)) | 
|  | 613 | return -EINVAL; | 
|  | 614 |  | 
|  | 615 | if (hd->active_pipe == -1) { | 
|  | 616 | ALOGD("Can't service events for display %d, no pipe", display); | 
|  | 617 | return -EINVAL; | 
|  | 618 | } | 
|  | 619 |  | 
|  | 620 | ret = pthread_mutex_lock(&hd->vsync_worker.lock); | 
|  | 621 | if (ret) { | 
|  | 622 | ALOGE("Failed to lock vsync lock %d", ret); | 
|  | 623 | return ret; | 
|  | 624 | } | 
|  | 625 |  | 
|  | 626 | hd->enable_vsync_events = !!enabled; | 
|  | 627 |  | 
|  | 628 | ret = pthread_cond_signal(&hd->vsync_worker.cond); | 
|  | 629 | if (ret) { | 
|  | 630 | ALOGE("Failed to signal vsync thread %d", ret); | 
|  | 631 | goto out; | 
|  | 632 | } | 
|  | 633 |  | 
|  | 634 | ret = pthread_mutex_unlock(&hd->vsync_worker.lock); | 
|  | 635 | if (ret) { | 
|  | 636 | ALOGE("Failed to unlock vsync lock %d", ret); | 
|  | 637 | return ret; | 
|  | 638 | } | 
|  | 639 |  | 
| Sean Paul | e0c4c3d | 2015-01-20 16:56:04 -0500 | [diff] [blame] | 640 | return 0; | 
| Sean Paul | eb9e75c | 2015-01-25 23:31:30 -0500 | [diff] [blame] | 641 |  | 
|  | 642 | out: | 
|  | 643 | if (pthread_mutex_unlock(&hd->vsync_worker.lock)) | 
|  | 644 | ALOGE("Failed to unlock vsync worker in error path"); | 
|  | 645 |  | 
|  | 646 | return ret; | 
| Sean Paul | e0c4c3d | 2015-01-20 16:56:04 -0500 | [diff] [blame] | 647 | } | 
|  | 648 |  | 
|  | 649 | static int hwc_set_power_mode(struct hwc_composer_device_1* dev, int display, | 
|  | 650 | int mode) | 
|  | 651 | { | 
|  | 652 | struct hwc_context_t *ctx = (struct hwc_context_t *)&dev->common; | 
|  | 653 | struct hwc_drm_display *hd = NULL; | 
|  | 654 | drmModeConnectorPtr c; | 
|  | 655 | int ret, i; | 
|  | 656 | uint32_t dpms_prop = 0; | 
|  | 657 | uint64_t dpms_value = 0; | 
|  | 658 |  | 
|  | 659 | ret = hwc_get_drm_display(ctx, display, &hd); | 
|  | 660 | if (ret) | 
|  | 661 | return ret; | 
|  | 662 |  | 
|  | 663 | c = drmModeGetConnector(ctx->fd, hd->connector_id); | 
|  | 664 | if (!c) { | 
|  | 665 | ALOGE("Failed to get connector %d", display); | 
|  | 666 | return -ENODEV; | 
|  | 667 | } | 
|  | 668 |  | 
|  | 669 | for (i = 0; !dpms_prop && i < c->count_props; i++) { | 
|  | 670 | drmModePropertyPtr p; | 
|  | 671 |  | 
|  | 672 | p = drmModeGetProperty(ctx->fd, c->props[i]); | 
|  | 673 | if (!p) | 
|  | 674 | continue; | 
|  | 675 |  | 
|  | 676 | if (!strcmp(p->name, "DPMS")) | 
|  | 677 | dpms_prop = c->props[i]; | 
|  | 678 |  | 
|  | 679 | drmModeFreeProperty(p); | 
|  | 680 | } | 
|  | 681 | if (!dpms_prop) { | 
|  | 682 | ALOGE("Failed to get DPMS property from display %d", display); | 
|  | 683 | ret = -ENOENT; | 
|  | 684 | goto out; | 
|  | 685 | } | 
|  | 686 |  | 
|  | 687 | switch(mode) { | 
|  | 688 | case HWC_POWER_MODE_OFF: | 
|  | 689 | dpms_value = DRM_MODE_DPMS_OFF; | 
|  | 690 | break; | 
|  | 691 |  | 
|  | 692 | /* We can't support dozing right now, so go full on */ | 
|  | 693 | case HWC_POWER_MODE_DOZE: | 
|  | 694 | case HWC_POWER_MODE_DOZE_SUSPEND: | 
|  | 695 | case HWC_POWER_MODE_NORMAL: | 
|  | 696 | dpms_value = DRM_MODE_DPMS_ON; | 
|  | 697 | break; | 
|  | 698 | }; | 
|  | 699 |  | 
|  | 700 | ret = drmModeConnectorSetProperty(ctx->fd, c->connector_id, | 
|  | 701 | dpms_prop, dpms_value); | 
|  | 702 | if (ret) { | 
|  | 703 | ALOGE("Failed to set DPMS property for display %d", display); | 
|  | 704 | goto out; | 
|  | 705 | } | 
|  | 706 |  | 
|  | 707 | out: | 
|  | 708 | drmModeFreeConnector(c); | 
|  | 709 | return ret; | 
|  | 710 | } | 
|  | 711 |  | 
|  | 712 | static int hwc_query(struct hwc_composer_device_1 */* dev */, int what, | 
|  | 713 | int *value) | 
|  | 714 | { | 
|  | 715 | switch(what) { | 
|  | 716 | case HWC_BACKGROUND_LAYER_SUPPORTED: | 
|  | 717 | *value = 0; /* TODO: We should do this */ | 
|  | 718 | break; | 
|  | 719 | case HWC_VSYNC_PERIOD: | 
|  | 720 | ALOGW("Query for deprecated vsync value, returning 60Hz"); | 
|  | 721 | *value = 1000 * 1000 * 1000 / 60; | 
|  | 722 | break; | 
|  | 723 | case HWC_DISPLAY_TYPES_SUPPORTED: | 
|  | 724 | *value = HWC_DISPLAY_PRIMARY | HWC_DISPLAY_EXTERNAL; | 
|  | 725 | break; | 
|  | 726 | } | 
|  | 727 | return 0; | 
|  | 728 | } | 
|  | 729 |  | 
|  | 730 | static void hwc_register_procs(struct hwc_composer_device_1* dev, | 
|  | 731 | hwc_procs_t const* procs) | 
|  | 732 | { | 
|  | 733 | struct hwc_context_t *ctx = (struct hwc_context_t *)&dev->common; | 
|  | 734 |  | 
|  | 735 | ctx->procs = procs; | 
|  | 736 | } | 
|  | 737 |  | 
|  | 738 | static int hwc_get_display_configs(struct hwc_composer_device_1* dev, | 
|  | 739 | int display, uint32_t* configs, size_t* numConfigs) | 
|  | 740 | { | 
|  | 741 | struct hwc_context_t *ctx = (struct hwc_context_t *)&dev->common; | 
|  | 742 | struct hwc_drm_display *hd = NULL; | 
|  | 743 | drmModeConnectorPtr c; | 
|  | 744 | int ret = 0, i; | 
|  | 745 |  | 
|  | 746 | if (!*numConfigs) | 
|  | 747 | return 0; | 
|  | 748 |  | 
|  | 749 | ret = hwc_get_drm_display(ctx, display, &hd); | 
|  | 750 | if (ret) | 
|  | 751 | return ret; | 
|  | 752 |  | 
|  | 753 | c = drmModeGetConnector(ctx->fd, hd->connector_id); | 
|  | 754 | if (!c) { | 
|  | 755 | ALOGE("Failed to get connector %d", display); | 
|  | 756 | return -ENODEV; | 
|  | 757 | } | 
|  | 758 |  | 
| Sean Paul | a4283c5 | 2015-02-04 10:08:00 -0800 | [diff] [blame] | 759 | if (hd->configs) { | 
| Sean Paul | e0c4c3d | 2015-01-20 16:56:04 -0500 | [diff] [blame] | 760 | free(hd->configs); | 
| Sean Paul | a4283c5 | 2015-02-04 10:08:00 -0800 | [diff] [blame] | 761 | hd->configs = NULL; | 
|  | 762 | } | 
|  | 763 |  | 
|  | 764 | if (c->connection == DRM_MODE_DISCONNECTED) { | 
|  | 765 | ret = -ENODEV; | 
|  | 766 | goto out; | 
|  | 767 | } | 
| Sean Paul | e0c4c3d | 2015-01-20 16:56:04 -0500 | [diff] [blame] | 768 |  | 
| Sean Paul | e0c4c3d | 2015-01-20 16:56:04 -0500 | [diff] [blame] | 769 | hd->configs = (drmModeModeInfoPtr)calloc(c->count_modes, | 
|  | 770 | sizeof(*hd->configs)); | 
|  | 771 | if (!hd->configs) { | 
|  | 772 | ALOGE("Failed to allocate config list for display %d", display); | 
|  | 773 | ret = -ENOMEM; | 
|  | 774 | hd->num_configs = 0; | 
|  | 775 | goto out; | 
|  | 776 | } | 
|  | 777 |  | 
|  | 778 | for (i = 0; i < c->count_modes; i++) { | 
|  | 779 | drmModeModeInfoPtr m = &hd->configs[i]; | 
|  | 780 |  | 
|  | 781 | memcpy(m, &c->modes[i], sizeof(*m)); | 
|  | 782 |  | 
|  | 783 | if (i < (int)*numConfigs) | 
|  | 784 | configs[i] = i; | 
|  | 785 | } | 
|  | 786 |  | 
|  | 787 | hd->num_configs = c->count_modes; | 
|  | 788 | *numConfigs = MIN(c->count_modes, *numConfigs); | 
|  | 789 |  | 
|  | 790 | out: | 
|  | 791 | drmModeFreeConnector(c); | 
|  | 792 | return ret; | 
|  | 793 | } | 
|  | 794 |  | 
|  | 795 | static int hwc_check_config_valid(struct hwc_context_t *ctx, | 
|  | 796 | drmModeConnectorPtr connector, int display, | 
|  | 797 | int config_idx) | 
|  | 798 | { | 
|  | 799 | struct hwc_drm_display *hd = NULL; | 
|  | 800 | drmModeModeInfoPtr m = NULL; | 
|  | 801 | int ret = 0, i; | 
|  | 802 |  | 
|  | 803 | ret = hwc_get_drm_display(ctx, display, &hd); | 
|  | 804 | if (ret) | 
|  | 805 | return ret; | 
|  | 806 |  | 
|  | 807 | /* Make sure the requested config is still valid for the display */ | 
|  | 808 | for (i = 0; i < connector->count_modes; i++) { | 
|  | 809 | if (hwc_mode_is_equal(&connector->modes[i], | 
|  | 810 | &hd->configs[config_idx])) { | 
|  | 811 | m = &hd->configs[config_idx]; | 
|  | 812 | break; | 
|  | 813 | } | 
|  | 814 | } | 
|  | 815 | if (!m) | 
|  | 816 | return -ENOENT; | 
|  | 817 |  | 
|  | 818 | return 0; | 
|  | 819 | } | 
|  | 820 |  | 
|  | 821 | static int hwc_get_display_attributes(struct hwc_composer_device_1* dev, | 
|  | 822 | int display, uint32_t config, const uint32_t* attributes, | 
|  | 823 | int32_t* values) | 
|  | 824 | { | 
|  | 825 | struct hwc_context_t *ctx = (struct hwc_context_t *)&dev->common; | 
|  | 826 | struct hwc_drm_display *hd = NULL; | 
|  | 827 | drmModeConnectorPtr c; | 
|  | 828 | drmModeModeInfoPtr m; | 
|  | 829 | int ret, i; | 
|  | 830 |  | 
|  | 831 | ret = hwc_get_drm_display(ctx, display, &hd); | 
|  | 832 | if (ret) | 
|  | 833 | return ret; | 
|  | 834 |  | 
|  | 835 | if (config >= hd->num_configs) { | 
|  | 836 | ALOGE("Requested config is out-of-bounds %d %d", config, | 
|  | 837 | hd->num_configs); | 
|  | 838 | return -EINVAL; | 
|  | 839 | } | 
|  | 840 |  | 
|  | 841 | c = drmModeGetConnector(ctx->fd, hd->connector_id); | 
|  | 842 | if (!c) { | 
|  | 843 | ALOGE("Failed to get connector %d", display); | 
|  | 844 | return -ENODEV; | 
|  | 845 | } | 
|  | 846 |  | 
|  | 847 | ret = hwc_check_config_valid(ctx, c, display, (int)config); | 
|  | 848 | if (ret) { | 
|  | 849 | ALOGE("Provided config is no longer valid %u", config); | 
|  | 850 | goto out; | 
|  | 851 | } | 
|  | 852 |  | 
|  | 853 | m = &hd->configs[config]; | 
|  | 854 | for (i = 0; attributes[i] != HWC_DISPLAY_NO_ATTRIBUTE; i++) { | 
|  | 855 | switch(attributes[i]) { | 
|  | 856 | case HWC_DISPLAY_VSYNC_PERIOD: | 
|  | 857 | values[i] = 1000 * 1000 * 1000 / m->vrefresh; | 
|  | 858 | break; | 
|  | 859 | case HWC_DISPLAY_WIDTH: | 
|  | 860 | values[i] = m->hdisplay; | 
|  | 861 | break; | 
|  | 862 | case HWC_DISPLAY_HEIGHT: | 
|  | 863 | values[i] = m->vdisplay; | 
|  | 864 | break; | 
|  | 865 | case HWC_DISPLAY_DPI_X: | 
|  | 866 | /* Dots per 1000 inches */ | 
|  | 867 | values[i] = c->mmWidth ? | 
|  | 868 | (m->hdisplay * UM_PER_INCH) / c->mmWidth : 0; | 
|  | 869 | break; | 
|  | 870 | case HWC_DISPLAY_DPI_Y: | 
|  | 871 | /* Dots per 1000 inches */ | 
|  | 872 | values[i] = c->mmHeight ? | 
|  | 873 | (m->vdisplay * UM_PER_INCH) / c->mmHeight : 0; | 
|  | 874 | break; | 
|  | 875 | } | 
|  | 876 | } | 
|  | 877 |  | 
|  | 878 | out: | 
|  | 879 | drmModeFreeConnector(c); | 
|  | 880 | return ret; | 
|  | 881 | } | 
|  | 882 |  | 
|  | 883 | static int hwc_get_active_config(struct hwc_composer_device_1* dev, int display) | 
|  | 884 | { | 
|  | 885 | struct hwc_context_t *ctx = (struct hwc_context_t *)&dev->common; | 
|  | 886 | struct hwc_drm_display *hd = NULL; | 
| Sean Paul | fa406a1 | 2015-02-04 10:05:44 -0800 | [diff] [blame] | 887 | int ret, i, index = -1; | 
| Sean Paul | e0c4c3d | 2015-01-20 16:56:04 -0500 | [diff] [blame] | 888 |  | 
|  | 889 | ret = hwc_get_drm_display(ctx, display, &hd); | 
|  | 890 | if (ret) | 
|  | 891 | return ret; | 
|  | 892 |  | 
| Sean Paul | fa406a1 | 2015-02-04 10:05:44 -0800 | [diff] [blame] | 893 | /* Find the current mode in the config list */ | 
|  | 894 | for (i = 0; i < (int)hd->num_configs; i++) { | 
|  | 895 | if (hwc_mode_is_equal(&hd->configs[i], &hd->active_mode)) { | 
|  | 896 | index = i; | 
|  | 897 | break; | 
|  | 898 | } | 
| Sean Paul | e0c4c3d | 2015-01-20 16:56:04 -0500 | [diff] [blame] | 899 | } | 
|  | 900 |  | 
| Sean Paul | fa406a1 | 2015-02-04 10:05:44 -0800 | [diff] [blame] | 901 | return index; | 
| Sean Paul | e0c4c3d | 2015-01-20 16:56:04 -0500 | [diff] [blame] | 902 | } | 
|  | 903 |  | 
|  | 904 | static bool hwc_crtc_is_bound(struct hwc_context_t *ctx, uint32_t crtc_id) | 
|  | 905 | { | 
|  | 906 | int i; | 
|  | 907 |  | 
|  | 908 | for (i = 0; i < MAX_NUM_DISPLAYS; i++) { | 
|  | 909 | if (ctx->displays[i].active_crtc == crtc_id) | 
|  | 910 | return true; | 
|  | 911 | } | 
|  | 912 | return false; | 
|  | 913 | } | 
|  | 914 |  | 
|  | 915 | static int hwc_try_encoder(struct hwc_context_t *ctx, drmModeResPtr r, | 
|  | 916 | uint32_t encoder_id, uint32_t *crtc_id) | 
|  | 917 | { | 
|  | 918 | drmModeEncoderPtr e; | 
|  | 919 | int ret, i; | 
|  | 920 |  | 
|  | 921 | e = drmModeGetEncoder(ctx->fd, encoder_id); | 
|  | 922 | if (!e) { | 
|  | 923 | ALOGE("Failed to get encoder for connector %d", encoder_id); | 
|  | 924 | return -ENODEV; | 
|  | 925 | } | 
|  | 926 |  | 
|  | 927 | /* First try to use the currently-bound crtc */ | 
|  | 928 | if (e->crtc_id) { | 
|  | 929 | if (!hwc_crtc_is_bound(ctx, e->crtc_id)) { | 
|  | 930 | *crtc_id = e->crtc_id; | 
|  | 931 | ret = 0; | 
|  | 932 | goto out; | 
|  | 933 | } | 
|  | 934 | } | 
|  | 935 |  | 
|  | 936 | /* Try to find a possible crtc which will work */ | 
|  | 937 | for (i = 0; i < r->count_crtcs; i++) { | 
|  | 938 | if (!(e->possible_crtcs & (1 << i))) | 
|  | 939 | continue; | 
|  | 940 |  | 
|  | 941 | /* We've already tried this earlier */ | 
|  | 942 | if (e->crtc_id == r->crtcs[i]) | 
|  | 943 | continue; | 
|  | 944 |  | 
|  | 945 | if (!hwc_crtc_is_bound(ctx, r->crtcs[i])) { | 
|  | 946 | *crtc_id = r->crtcs[i]; | 
|  | 947 | ret = 0; | 
|  | 948 | goto out; | 
|  | 949 | } | 
|  | 950 | } | 
|  | 951 |  | 
|  | 952 | /* We can't use the encoder, but nothing went wrong, try another one */ | 
|  | 953 | ret = -EAGAIN; | 
|  | 954 |  | 
|  | 955 | out: | 
|  | 956 | drmModeFreeEncoder(e); | 
|  | 957 | return ret; | 
|  | 958 | } | 
|  | 959 |  | 
|  | 960 | static int hwc_set_active_config(struct hwc_composer_device_1* dev, int display, | 
|  | 961 | int index) | 
|  | 962 | { | 
|  | 963 | struct hwc_context_t *ctx = (struct hwc_context_t *)&dev->common; | 
|  | 964 | struct hwc_drm_display *hd = NULL; | 
|  | 965 | drmModeResPtr r = NULL; | 
|  | 966 | drmModeConnectorPtr c; | 
|  | 967 | uint32_t crtc_id = 0; | 
|  | 968 | int ret, i; | 
|  | 969 | bool new_crtc, new_encoder; | 
|  | 970 |  | 
|  | 971 | ret = hwc_get_drm_display(ctx, display, &hd); | 
|  | 972 | if (ret) | 
|  | 973 | return ret; | 
|  | 974 |  | 
|  | 975 | c = drmModeGetConnector(ctx->fd, hd->connector_id); | 
|  | 976 | if (!c) { | 
|  | 977 | ALOGE("Failed to get connector %d", display); | 
|  | 978 | return -ENODEV; | 
|  | 979 | } | 
|  | 980 |  | 
|  | 981 | if (c->connection == DRM_MODE_DISCONNECTED) { | 
|  | 982 | ALOGE("Tried to configure a disconnected display %d", display); | 
|  | 983 | ret = -ENODEV; | 
|  | 984 | goto out; | 
|  | 985 | } | 
|  | 986 |  | 
| Sean Paul | fa406a1 | 2015-02-04 10:05:44 -0800 | [diff] [blame] | 987 | if (index >= c->count_modes) { | 
|  | 988 | ALOGE("Index is out-of-bounds %d/%d", index, c->count_modes); | 
| Sean Paul | e0c4c3d | 2015-01-20 16:56:04 -0500 | [diff] [blame] | 989 | ret = -ENOENT; | 
|  | 990 | goto out; | 
|  | 991 | } | 
|  | 992 |  | 
|  | 993 | r = drmModeGetResources(ctx->fd); | 
|  | 994 | if (!r) { | 
|  | 995 | ALOGE("Failed to get drm resources"); | 
|  | 996 | goto out; | 
|  | 997 | } | 
|  | 998 |  | 
|  | 999 | /* We no longer have an active_crtc */ | 
|  | 1000 | hd->active_crtc = 0; | 
| Sean Paul | eb9e75c | 2015-01-25 23:31:30 -0500 | [diff] [blame] | 1001 | hd->active_pipe = -1; | 
| Sean Paul | e0c4c3d | 2015-01-20 16:56:04 -0500 | [diff] [blame] | 1002 |  | 
|  | 1003 | /* First, try to use the currently-connected encoder */ | 
|  | 1004 | if (c->encoder_id) { | 
|  | 1005 | ret = hwc_try_encoder(ctx, r, c->encoder_id, &crtc_id); | 
|  | 1006 | if (ret && ret != -EAGAIN) { | 
|  | 1007 | ALOGE("Encoder try failed %d", ret); | 
|  | 1008 | goto out; | 
|  | 1009 | } | 
|  | 1010 | } | 
|  | 1011 |  | 
|  | 1012 | /* We couldn't find a crtc with the attached encoder, try the others */ | 
|  | 1013 | if (!crtc_id) { | 
|  | 1014 | for (i = 0; i < c->count_encoders; i++) { | 
|  | 1015 | ret = hwc_try_encoder(ctx, r, c->encoders[i], &crtc_id); | 
|  | 1016 | if (!ret) { | 
|  | 1017 | break; | 
|  | 1018 | } else if (ret != -EAGAIN) { | 
|  | 1019 | ALOGE("Encoder try failed %d", ret); | 
|  | 1020 | goto out; | 
|  | 1021 | } | 
|  | 1022 | } | 
|  | 1023 | if (!crtc_id) { | 
|  | 1024 | ALOGE("Couldn't find valid crtc to modeset"); | 
|  | 1025 | ret = -EINVAL; | 
|  | 1026 | goto out; | 
|  | 1027 | } | 
|  | 1028 | } | 
|  | 1029 |  | 
|  | 1030 | hd->active_crtc = crtc_id; | 
| Sean Paul | fa406a1 | 2015-02-04 10:05:44 -0800 | [diff] [blame] | 1031 |  | 
|  | 1032 | memcpy(&hd->active_mode, &hd->configs[index], sizeof(hd->active_mode)); | 
| Sean Paul | e0c4c3d | 2015-01-20 16:56:04 -0500 | [diff] [blame] | 1033 |  | 
| Sean Paul | eb9e75c | 2015-01-25 23:31:30 -0500 | [diff] [blame] | 1034 | /* Find the pipe corresponding to the crtc_id */ | 
|  | 1035 | for (i = 0; i < r->count_crtcs; i++) { | 
|  | 1036 | /* We've already tried this earlier */ | 
|  | 1037 | if (r->crtcs[i] == crtc_id) { | 
|  | 1038 | hd->active_pipe = i; | 
|  | 1039 | break; | 
|  | 1040 | } | 
|  | 1041 | } | 
|  | 1042 | /* This should never happen... hehehe */ | 
|  | 1043 | if (hd->active_pipe == -1) { | 
|  | 1044 | ALOGE("Active crtc was not found in resources!!"); | 
|  | 1045 | ret = -ENODEV; | 
|  | 1046 | goto out; | 
|  | 1047 | } | 
|  | 1048 |  | 
| Sean Paul | e0c4c3d | 2015-01-20 16:56:04 -0500 | [diff] [blame] | 1049 | /* TODO: Once we have atomic, set the crtc timing info here */ | 
|  | 1050 |  | 
|  | 1051 | out: | 
|  | 1052 | if (r) | 
|  | 1053 | drmModeFreeResources(r); | 
|  | 1054 |  | 
|  | 1055 | drmModeFreeConnector(c); | 
|  | 1056 | return ret; | 
|  | 1057 | } | 
|  | 1058 |  | 
| Sean Paul | 9aa5ad3 | 2015-01-22 15:47:54 -0500 | [diff] [blame] | 1059 | static int hwc_destroy_worker(struct hwc_worker *worker) | 
|  | 1060 | { | 
|  | 1061 | int ret; | 
|  | 1062 |  | 
|  | 1063 | ret = pthread_mutex_lock(&worker->lock); | 
|  | 1064 | if (ret) { | 
|  | 1065 | ALOGE("Failed to lock in destroy() %d", ret); | 
|  | 1066 | return ret; | 
|  | 1067 | } | 
|  | 1068 |  | 
|  | 1069 | worker->exit = true; | 
|  | 1070 |  | 
|  | 1071 | ret |= pthread_cond_signal(&worker->cond); | 
|  | 1072 | if (ret) | 
|  | 1073 | ALOGE("Failed to signal cond in destroy() %d", ret); | 
|  | 1074 |  | 
|  | 1075 | ret |= pthread_mutex_unlock(&worker->lock); | 
|  | 1076 | if (ret) | 
|  | 1077 | ALOGE("Failed to unlock in destroy() %d", ret); | 
|  | 1078 |  | 
|  | 1079 | ret |= pthread_join(worker->thread, NULL); | 
|  | 1080 | if (ret && ret != ESRCH) | 
|  | 1081 | ALOGE("Failed to join thread in destroy() %d", ret); | 
|  | 1082 |  | 
|  | 1083 | return ret; | 
|  | 1084 | } | 
|  | 1085 |  | 
|  | 1086 | static void hwc_destroy_display(struct hwc_drm_display *hd) | 
|  | 1087 | { | 
|  | 1088 | int ret; | 
|  | 1089 |  | 
|  | 1090 | if (hwc_destroy_worker(&hd->set_worker)) | 
|  | 1091 | ALOGE("Destroy set worker failed"); | 
| Sean Paul | eb9e75c | 2015-01-25 23:31:30 -0500 | [diff] [blame] | 1092 |  | 
|  | 1093 | if (hwc_destroy_worker(&hd->vsync_worker)) | 
|  | 1094 | ALOGE("Destroy vsync worker failed"); | 
| Sean Paul | 9aa5ad3 | 2015-01-22 15:47:54 -0500 | [diff] [blame] | 1095 | } | 
|  | 1096 |  | 
| Sean Paul | e0c4c3d | 2015-01-20 16:56:04 -0500 | [diff] [blame] | 1097 | static int hwc_device_close(struct hw_device_t *dev) | 
|  | 1098 | { | 
|  | 1099 | struct hwc_context_t *ctx = (struct hwc_context_t *)dev; | 
| Sean Paul | cd36a9e | 2015-01-22 18:01:18 -0500 | [diff] [blame] | 1100 | int ret, i; | 
| Sean Paul | e0c4c3d | 2015-01-20 16:56:04 -0500 | [diff] [blame] | 1101 |  | 
| Sean Paul | 9aa5ad3 | 2015-01-22 15:47:54 -0500 | [diff] [blame] | 1102 | for (i = 0; i < MAX_NUM_DISPLAYS; i++) | 
|  | 1103 | hwc_destroy_display(&ctx->displays[i]); | 
|  | 1104 |  | 
|  | 1105 | drmClose(ctx->fd); | 
| Sean Paul | cd36a9e | 2015-01-22 18:01:18 -0500 | [diff] [blame] | 1106 |  | 
|  | 1107 | ret = hwc_import_destroy(ctx->import_ctx); | 
|  | 1108 | if (ret) | 
|  | 1109 | ALOGE("Could not destroy import %d", ret); | 
|  | 1110 |  | 
| Sean Paul | e0c4c3d | 2015-01-20 16:56:04 -0500 | [diff] [blame] | 1111 | free(ctx); | 
|  | 1112 |  | 
|  | 1113 | return 0; | 
|  | 1114 | } | 
|  | 1115 |  | 
| Sean Paul | 9aa5ad3 | 2015-01-22 15:47:54 -0500 | [diff] [blame] | 1116 | static int hwc_initialize_worker(struct hwc_drm_display *hd, | 
|  | 1117 | struct hwc_worker *worker, void *(*routine)(void*)) | 
|  | 1118 | { | 
|  | 1119 | int ret; | 
|  | 1120 |  | 
|  | 1121 | ret = pthread_cond_init(&worker->cond, NULL); | 
|  | 1122 | if (ret) { | 
|  | 1123 | ALOGE("Failed to create worker condition %d", ret); | 
|  | 1124 | return ret; | 
|  | 1125 | } | 
|  | 1126 |  | 
|  | 1127 | ret = pthread_mutex_init(&worker->lock, NULL); | 
|  | 1128 | if (ret) { | 
|  | 1129 | ALOGE("Failed to initialize worker lock %d", ret); | 
|  | 1130 | goto err_cond; | 
|  | 1131 | } | 
|  | 1132 |  | 
|  | 1133 | worker->exit = false; | 
|  | 1134 |  | 
|  | 1135 | ret = pthread_create(&worker->thread, NULL, routine, hd); | 
|  | 1136 | if (ret) { | 
|  | 1137 | ALOGE("Could not create worker thread %d", ret); | 
|  | 1138 | goto err_lock; | 
|  | 1139 | } | 
|  | 1140 | return 0; | 
|  | 1141 |  | 
|  | 1142 | err_lock: | 
|  | 1143 | pthread_mutex_destroy(&worker->lock); | 
|  | 1144 | err_cond: | 
|  | 1145 | pthread_cond_destroy(&worker->cond); | 
|  | 1146 | return ret; | 
|  | 1147 | } | 
|  | 1148 |  | 
| Sean Paul | 24a26e3 | 2015-02-04 10:34:47 -0800 | [diff] [blame] | 1149 | /* | 
|  | 1150 | * TODO: This function sets the active config to the first one in the list. This | 
|  | 1151 | * should be fixed such that it selects the preferred mode for the display, or | 
|  | 1152 | * some other, saner, method of choosing the config. | 
|  | 1153 | */ | 
|  | 1154 | static int hwc_set_initial_config(struct hwc_drm_display *hd) | 
|  | 1155 | { | 
|  | 1156 | int ret; | 
|  | 1157 | uint32_t config; | 
|  | 1158 | size_t num_configs = 1; | 
|  | 1159 |  | 
|  | 1160 | ret = hwc_get_display_configs(&hd->ctx->device, hd->display, &config, | 
|  | 1161 | &num_configs); | 
| Sean Paul | aea15c2 | 2015-02-09 02:24:11 -0500 | [diff] [blame] | 1162 | if (ret || !num_configs) | 
| Sean Paul | 24a26e3 | 2015-02-04 10:34:47 -0800 | [diff] [blame] | 1163 | return 0; | 
|  | 1164 |  | 
|  | 1165 | ret = hwc_set_active_config(&hd->ctx->device, hd->display, 0); | 
|  | 1166 | if (ret) { | 
|  | 1167 | ALOGE("Failed to set active config d=%d ret=%d", hd->display, | 
|  | 1168 | ret); | 
|  | 1169 | return ret; | 
|  | 1170 | } | 
|  | 1171 |  | 
|  | 1172 | return ret; | 
|  | 1173 | } | 
|  | 1174 |  | 
| Sean Paul | e0c4c3d | 2015-01-20 16:56:04 -0500 | [diff] [blame] | 1175 | static int hwc_initialize_display(struct hwc_context_t *ctx, int display, | 
|  | 1176 | uint32_t connector_id) | 
|  | 1177 | { | 
|  | 1178 | struct hwc_drm_display *hd = NULL; | 
|  | 1179 | int ret; | 
|  | 1180 |  | 
|  | 1181 | ret = hwc_get_drm_display(ctx, display, &hd); | 
|  | 1182 | if (ret) | 
|  | 1183 | return ret; | 
|  | 1184 |  | 
| Sean Paul | 9aa5ad3 | 2015-01-22 15:47:54 -0500 | [diff] [blame] | 1185 | hd->ctx = ctx; | 
|  | 1186 | hd->display = display; | 
| Sean Paul | eb9e75c | 2015-01-25 23:31:30 -0500 | [diff] [blame] | 1187 | hd->active_pipe = -1; | 
| Sean Paul | efb20cb | 2015-02-04 09:29:15 -0800 | [diff] [blame] | 1188 | hd->initial_modeset_required = true; | 
| Sean Paul | e0c4c3d | 2015-01-20 16:56:04 -0500 | [diff] [blame] | 1189 | hd->connector_id = connector_id; | 
|  | 1190 |  | 
| Sean Paul | f1dc191 | 2015-01-24 01:34:31 -0500 | [diff] [blame] | 1191 | ret = sw_sync_timeline_create(); | 
|  | 1192 | if (ret < 0) { | 
|  | 1193 | ALOGE("Failed to create sw sync timeline %d", ret); | 
|  | 1194 | return ret; | 
|  | 1195 | } | 
|  | 1196 | hd->timeline_fd = ret; | 
| Allen Martin | a99534a | 2015-02-22 05:18:56 -0800 | [diff] [blame^] | 1197 | hd->timeline_next = 0; | 
| Sean Paul | f1dc191 | 2015-01-24 01:34:31 -0500 | [diff] [blame] | 1198 |  | 
| Sean Paul | 24a26e3 | 2015-02-04 10:34:47 -0800 | [diff] [blame] | 1199 | ret = hwc_set_initial_config(hd); | 
|  | 1200 | if (ret) { | 
|  | 1201 | ALOGE("Failed to set initial config for d=%d ret=%d", display, | 
|  | 1202 | ret); | 
|  | 1203 | return ret; | 
|  | 1204 | } | 
|  | 1205 |  | 
| Sean Paul | 9aa5ad3 | 2015-01-22 15:47:54 -0500 | [diff] [blame] | 1206 | ret = hwc_initialize_worker(hd, &hd->set_worker, hwc_set_worker); | 
|  | 1207 | if (ret) { | 
|  | 1208 | ALOGE("Failed to create set worker %d\n", ret); | 
|  | 1209 | return ret; | 
|  | 1210 | } | 
|  | 1211 |  | 
| Sean Paul | eb9e75c | 2015-01-25 23:31:30 -0500 | [diff] [blame] | 1212 | ret = hwc_initialize_worker(hd, &hd->vsync_worker, hwc_vsync_worker); | 
|  | 1213 | if (ret) { | 
|  | 1214 | ALOGE("Failed to create vsync worker %d", ret); | 
|  | 1215 | goto err; | 
|  | 1216 | } | 
|  | 1217 |  | 
| Sean Paul | e0c4c3d | 2015-01-20 16:56:04 -0500 | [diff] [blame] | 1218 | return 0; | 
| Sean Paul | eb9e75c | 2015-01-25 23:31:30 -0500 | [diff] [blame] | 1219 |  | 
|  | 1220 | err: | 
|  | 1221 | if (hwc_destroy_worker(&hd->set_worker)) | 
|  | 1222 | ALOGE("Failed to destroy set worker"); | 
|  | 1223 |  | 
|  | 1224 | return ret; | 
| Sean Paul | e0c4c3d | 2015-01-20 16:56:04 -0500 | [diff] [blame] | 1225 | } | 
|  | 1226 |  | 
|  | 1227 | static int hwc_enumerate_displays(struct hwc_context_t *ctx) | 
|  | 1228 | { | 
|  | 1229 | struct hwc_drm_display *panel_hd; | 
|  | 1230 | drmModeResPtr res; | 
|  | 1231 | drmModeConnectorPtr *conn_list; | 
|  | 1232 | int ret = 0, i, j; | 
|  | 1233 |  | 
|  | 1234 | res = drmModeGetResources(ctx->fd); | 
|  | 1235 | if (!res) { | 
|  | 1236 | ALOGE("Failed to get drm resources"); | 
|  | 1237 | return -ENODEV; | 
|  | 1238 | } | 
|  | 1239 |  | 
|  | 1240 | conn_list = (drmModeConnector **)calloc(res->count_connectors, | 
|  | 1241 | sizeof(*conn_list)); | 
|  | 1242 | if (!conn_list) { | 
|  | 1243 | ALOGE("Failed to allocate connector list"); | 
|  | 1244 | ret = -ENOMEM; | 
|  | 1245 | goto out; | 
|  | 1246 | } | 
|  | 1247 |  | 
|  | 1248 | for (i = 0; i < res->count_connectors; i++) { | 
|  | 1249 | conn_list[i] = drmModeGetConnector(ctx->fd, res->connectors[i]); | 
|  | 1250 | if (!conn_list[i]) { | 
|  | 1251 | ALOGE("Failed to get connector %d", res->connectors[i]); | 
|  | 1252 | ret = -ENODEV; | 
|  | 1253 | goto out; | 
|  | 1254 | } | 
|  | 1255 | } | 
|  | 1256 |  | 
|  | 1257 | ctx->num_displays = 0; | 
|  | 1258 |  | 
|  | 1259 | /* Find a connected, panel type connector for display 0 */ | 
|  | 1260 | for (i = 0; i < res->count_connectors; i++) { | 
|  | 1261 | drmModeConnectorPtr c = conn_list[i]; | 
|  | 1262 |  | 
|  | 1263 | for (j = 0; j < ARRAY_SIZE(panel_types); j++) { | 
|  | 1264 | if (c->connector_type == panel_types[j] && | 
|  | 1265 | c->connection == DRM_MODE_CONNECTED) | 
|  | 1266 | break; | 
|  | 1267 | } | 
|  | 1268 | if (j == ARRAY_SIZE(panel_types)) | 
|  | 1269 | continue; | 
|  | 1270 |  | 
|  | 1271 | hwc_initialize_display(ctx, ctx->num_displays, c->connector_id); | 
|  | 1272 | ctx->num_displays++; | 
|  | 1273 | break; | 
|  | 1274 | } | 
|  | 1275 |  | 
|  | 1276 | ret = hwc_get_drm_display(ctx, 0, &panel_hd); | 
|  | 1277 | if (ret) | 
|  | 1278 | goto out; | 
|  | 1279 |  | 
|  | 1280 | /* Fill in the other displays */ | 
|  | 1281 | for (i = 0; i < res->count_connectors; i++) { | 
|  | 1282 | drmModeConnectorPtr c = conn_list[i]; | 
|  | 1283 |  | 
|  | 1284 | if (panel_hd->connector_id == c->connector_id) | 
|  | 1285 | continue; | 
|  | 1286 |  | 
|  | 1287 | hwc_initialize_display(ctx, ctx->num_displays, c->connector_id); | 
|  | 1288 | ctx->num_displays++; | 
|  | 1289 | } | 
|  | 1290 |  | 
|  | 1291 | out: | 
|  | 1292 | for (i = 0; i < res->count_connectors; i++) { | 
|  | 1293 | if (conn_list[i]) | 
|  | 1294 | drmModeFreeConnector(conn_list[i]); | 
|  | 1295 | } | 
|  | 1296 | free(conn_list); | 
|  | 1297 |  | 
|  | 1298 | if (res) | 
|  | 1299 | drmModeFreeResources(res); | 
|  | 1300 |  | 
|  | 1301 | return ret; | 
|  | 1302 | } | 
|  | 1303 |  | 
|  | 1304 | static int hwc_device_open(const struct hw_module_t* module, const char* name, | 
|  | 1305 | struct hw_device_t** dev) | 
|  | 1306 | { | 
|  | 1307 | int ret = 0; | 
|  | 1308 | struct hwc_context_t *ctx; | 
| Lauri Peltonen | 64717b2 | 2015-02-04 16:55:31 +0200 | [diff] [blame] | 1309 | char path[PROPERTY_VALUE_MAX]; | 
| Sean Paul | e0c4c3d | 2015-01-20 16:56:04 -0500 | [diff] [blame] | 1310 |  | 
|  | 1311 | if (strcmp(name, HWC_HARDWARE_COMPOSER)) { | 
|  | 1312 | ALOGE("Invalid module name- %s", name); | 
|  | 1313 | return -EINVAL; | 
|  | 1314 | } | 
|  | 1315 |  | 
| Sean Paul | 9b1bb84 | 2015-01-23 01:11:58 -0500 | [diff] [blame] | 1316 | ctx = new hwc_context_t(); | 
| Sean Paul | e0c4c3d | 2015-01-20 16:56:04 -0500 | [diff] [blame] | 1317 | if (!ctx) { | 
|  | 1318 | ALOGE("Failed to allocate hwc context"); | 
|  | 1319 | return -ENOMEM; | 
|  | 1320 | } | 
|  | 1321 |  | 
| Sean Paul | cd36a9e | 2015-01-22 18:01:18 -0500 | [diff] [blame] | 1322 | ret = hwc_import_init(&ctx->import_ctx); | 
| Sean Paul | e0c4c3d | 2015-01-20 16:56:04 -0500 | [diff] [blame] | 1323 | if (ret) { | 
| Sean Paul | cd36a9e | 2015-01-22 18:01:18 -0500 | [diff] [blame] | 1324 | ALOGE("Failed to initialize import context"); | 
| Sean Paul | e0c4c3d | 2015-01-20 16:56:04 -0500 | [diff] [blame] | 1325 | goto out; | 
|  | 1326 | } | 
|  | 1327 |  | 
| Lauri Peltonen | 64717b2 | 2015-02-04 16:55:31 +0200 | [diff] [blame] | 1328 | property_get("hwc.drm.device", path, HWCOMPOSER_DRM_DEVICE); | 
| Sean Paul | e0c4c3d | 2015-01-20 16:56:04 -0500 | [diff] [blame] | 1329 | /* TODO: Use drmOpenControl here instead */ | 
| Lauri Peltonen | 64717b2 | 2015-02-04 16:55:31 +0200 | [diff] [blame] | 1330 | ctx->fd = open(path, O_RDWR); | 
| Sean Paul | e0c4c3d | 2015-01-20 16:56:04 -0500 | [diff] [blame] | 1331 | if (ctx->fd < 0) { | 
|  | 1332 | ALOGE("Failed to open dri- %s", strerror(-errno)); | 
|  | 1333 | goto out; | 
|  | 1334 | } | 
|  | 1335 |  | 
| Sean Paul | e0c4c3d | 2015-01-20 16:56:04 -0500 | [diff] [blame] | 1336 | ret = hwc_enumerate_displays(ctx); | 
|  | 1337 | if (ret) { | 
|  | 1338 | ALOGE("Failed to enumerate displays: %s", strerror(ret)); | 
|  | 1339 | goto out; | 
|  | 1340 | } | 
|  | 1341 |  | 
|  | 1342 | ctx->device.common.tag = HARDWARE_DEVICE_TAG; | 
|  | 1343 | ctx->device.common.version = HWC_DEVICE_API_VERSION_1_4; | 
|  | 1344 | ctx->device.common.module = const_cast<hw_module_t*>(module); | 
|  | 1345 | ctx->device.common.close = hwc_device_close; | 
|  | 1346 |  | 
|  | 1347 | ctx->device.prepare = hwc_prepare; | 
|  | 1348 | ctx->device.set = hwc_set; | 
|  | 1349 | ctx->device.eventControl = hwc_event_control; | 
|  | 1350 | ctx->device.setPowerMode = hwc_set_power_mode; | 
|  | 1351 | ctx->device.query = hwc_query; | 
|  | 1352 | ctx->device.registerProcs = hwc_register_procs; | 
|  | 1353 | ctx->device.getDisplayConfigs = hwc_get_display_configs; | 
|  | 1354 | ctx->device.getDisplayAttributes = hwc_get_display_attributes; | 
|  | 1355 | ctx->device.getActiveConfig = hwc_get_active_config; | 
|  | 1356 | ctx->device.setActiveConfig = hwc_set_active_config; | 
|  | 1357 | ctx->device.setCursorPositionAsync = NULL; /* TODO: Add cursor */ | 
|  | 1358 |  | 
|  | 1359 | *dev = &ctx->device.common; | 
|  | 1360 |  | 
|  | 1361 | return 0; | 
|  | 1362 | out: | 
|  | 1363 | if (ctx->fd >= 0) | 
|  | 1364 | close(ctx->fd); | 
|  | 1365 |  | 
|  | 1366 | free(ctx); | 
|  | 1367 | return ret; | 
|  | 1368 | } | 
|  | 1369 |  | 
|  | 1370 | static struct hw_module_methods_t hwc_module_methods = { | 
|  | 1371 | open: hwc_device_open | 
|  | 1372 | }; | 
|  | 1373 |  | 
|  | 1374 | hwc_module_t HAL_MODULE_INFO_SYM = { | 
|  | 1375 | common: { | 
|  | 1376 | tag: HARDWARE_MODULE_TAG, | 
|  | 1377 | version_major: 1, | 
|  | 1378 | version_minor: 0, | 
|  | 1379 | id: HWC_HARDWARE_MODULE_ID, | 
|  | 1380 | name: "DRM hwcomposer module", | 
|  | 1381 | author: "The Android Open Source Project", | 
|  | 1382 | methods: &hwc_module_methods, | 
|  | 1383 | dso: NULL, | 
|  | 1384 | reserved: { 0 }, | 
|  | 1385 | } | 
|  | 1386 | }; |