blob: 4c2055ca309c40d29d4a15783e14ff7996e0e06d [file] [log] [blame]
Elliott Hughes180edef2023-11-02 00:08:05 +00001/*
2 * This file is auto-generated. Modifications will be lost.
3 *
4 * See https://android.googlesource.com/platform/bionic/+/master/libc/kernel/
5 * for more information.
6 */
Christopher Ferris6a9755d2017-01-13 14:09:31 -08007#ifndef MLX4_ABI_USER_H
8#define MLX4_ABI_USER_H
9#include <linux/types.h>
10#define MLX4_IB_UVERBS_NO_DEV_CAPS_ABI_VERSION 3
Christopher Ferris6a9755d2017-01-13 14:09:31 -080011#define MLX4_IB_UVERBS_ABI_VERSION 4
12struct mlx4_ib_alloc_ucontext_resp_v3 {
13 __u32 qp_tab_size;
14 __u16 bf_reg_size;
Christopher Ferris6a9755d2017-01-13 14:09:31 -080015 __u16 bf_regs_per_page;
16};
Christopher Ferris76a1d452018-06-27 14:12:29 -070017enum {
18 MLX4_USER_DEV_CAP_LARGE_CQE = 1L << 0,
19};
Christopher Ferris6a9755d2017-01-13 14:09:31 -080020struct mlx4_ib_alloc_ucontext_resp {
21 __u32 dev_caps;
Christopher Ferris6a9755d2017-01-13 14:09:31 -080022 __u32 qp_tab_size;
23 __u16 bf_reg_size;
24 __u16 bf_regs_per_page;
25 __u32 cqe_size;
Christopher Ferris6a9755d2017-01-13 14:09:31 -080026};
27struct mlx4_ib_alloc_pd_resp {
28 __u32 pdn;
29 __u32 reserved;
Christopher Ferris6a9755d2017-01-13 14:09:31 -080030};
31struct mlx4_ib_create_cq {
Christopher Ferris76a1d452018-06-27 14:12:29 -070032 __aligned_u64 buf_addr;
33 __aligned_u64 db_addr;
Christopher Ferris6a9755d2017-01-13 14:09:31 -080034};
35struct mlx4_ib_create_cq_resp {
36 __u32 cqn;
37 __u32 reserved;
Christopher Ferris6a9755d2017-01-13 14:09:31 -080038};
39struct mlx4_ib_resize_cq {
Christopher Ferris76a1d452018-06-27 14:12:29 -070040 __aligned_u64 buf_addr;
Christopher Ferris6a9755d2017-01-13 14:09:31 -080041};
Christopher Ferris6a9755d2017-01-13 14:09:31 -080042struct mlx4_ib_create_srq {
Christopher Ferris76a1d452018-06-27 14:12:29 -070043 __aligned_u64 buf_addr;
44 __aligned_u64 db_addr;
Christopher Ferris6a9755d2017-01-13 14:09:31 -080045};
Christopher Ferris6a9755d2017-01-13 14:09:31 -080046struct mlx4_ib_create_srq_resp {
47 __u32 srqn;
48 __u32 reserved;
49};
Christopher Ferris1308ad32017-11-14 17:32:13 -080050struct mlx4_ib_create_qp_rss {
Christopher Ferris76a1d452018-06-27 14:12:29 -070051 __aligned_u64 rx_hash_fields_mask;
Christopher Ferris1308ad32017-11-14 17:32:13 -080052 __u8 rx_hash_function;
53 __u8 reserved[7];
54 __u8 rx_hash_key[40];
55 __u32 comp_mask;
56 __u32 reserved1;
57};
Christopher Ferris6a9755d2017-01-13 14:09:31 -080058struct mlx4_ib_create_qp {
Christopher Ferris76a1d452018-06-27 14:12:29 -070059 __aligned_u64 buf_addr;
60 __aligned_u64 db_addr;
Christopher Ferris6a9755d2017-01-13 14:09:31 -080061 __u8 log_sq_bb_count;
Christopher Ferris6a9755d2017-01-13 14:09:31 -080062 __u8 log_sq_stride;
63 __u8 sq_no_prefetch;
Christopher Ferris1308ad32017-11-14 17:32:13 -080064 __u8 reserved;
65 __u32 inl_recv_sz;
66};
67struct mlx4_ib_create_wq {
Christopher Ferris76a1d452018-06-27 14:12:29 -070068 __aligned_u64 buf_addr;
69 __aligned_u64 db_addr;
Christopher Ferris1308ad32017-11-14 17:32:13 -080070 __u8 log_range_size;
71 __u8 reserved[3];
72 __u32 comp_mask;
73};
74struct mlx4_ib_modify_wq {
75 __u32 comp_mask;
76 __u32 reserved;
77};
78struct mlx4_ib_create_rwq_ind_tbl_resp {
79 __u32 response_length;
80 __u32 reserved;
81};
82enum mlx4_ib_rx_hash_function_flags {
83 MLX4_IB_RX_HASH_FUNC_TOEPLITZ = 1 << 0,
84};
85enum mlx4_ib_rx_hash_fields {
86 MLX4_IB_RX_HASH_SRC_IPV4 = 1 << 0,
87 MLX4_IB_RX_HASH_DST_IPV4 = 1 << 1,
88 MLX4_IB_RX_HASH_SRC_IPV6 = 1 << 2,
89 MLX4_IB_RX_HASH_DST_IPV6 = 1 << 3,
90 MLX4_IB_RX_HASH_SRC_PORT_TCP = 1 << 4,
91 MLX4_IB_RX_HASH_DST_PORT_TCP = 1 << 5,
92 MLX4_IB_RX_HASH_SRC_PORT_UDP = 1 << 6,
Christopher Ferris76a1d452018-06-27 14:12:29 -070093 MLX4_IB_RX_HASH_DST_PORT_UDP = 1 << 7,
94 MLX4_IB_RX_HASH_INNER = 1ULL << 31,
95};
96struct mlx4_ib_rss_caps {
97 __aligned_u64 rx_hash_fields_mask;
98 __u8 rx_hash_function;
99 __u8 reserved[7];
100};
101enum query_device_resp_mask {
102 MLX4_IB_QUERY_DEV_RESP_MASK_CORE_CLOCK_OFFSET = 1UL << 0,
103};
104struct mlx4_ib_tso_caps {
105 __u32 max_tso;
106 __u32 supported_qpts;
107};
108struct mlx4_uverbs_ex_query_device_resp {
109 __u32 comp_mask;
110 __u32 response_length;
111 __aligned_u64 hca_core_clock_offset;
112 __u32 max_inl_recv_sz;
113 __u32 reserved;
114 struct mlx4_ib_rss_caps rss_caps;
115 struct mlx4_ib_tso_caps tso_caps;
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800116};
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800117#endif