blob: 32a219008c6c49fcd436e953aa0aac8cd24be644 [file] [log] [blame]
Elliott Hughes180edef2023-11-02 00:08:05 +00001/*
2 * This file is auto-generated. Modifications will be lost.
3 *
4 * See https://android.googlesource.com/platform/bionic/+/master/libc/kernel/
5 * for more information.
6 */
Christopher Ferris3a39c0b2021-09-02 00:03:38 +00007#ifndef IRDMA_ABI_H
8#define IRDMA_ABI_H
9#include <linux/types.h>
10#define IRDMA_ABI_VER 5
11enum irdma_memreg_type {
12 IRDMA_MEMREG_TYPE_MEM = 0,
13 IRDMA_MEMREG_TYPE_QP = 1,
14 IRDMA_MEMREG_TYPE_CQ = 2,
15};
Christopher Ferris67d1e5e2023-10-31 13:36:37 -070016enum {
17 IRDMA_ALLOC_UCTX_USE_RAW_ATTR = 1 << 0,
18 IRDMA_ALLOC_UCTX_MIN_HW_WQ_SIZE = 1 << 1,
19};
Christopher Ferris3a39c0b2021-09-02 00:03:38 +000020struct irdma_alloc_ucontext_req {
21 __u32 rsvd32;
22 __u8 userspace_ver;
23 __u8 rsvd8[3];
Christopher Ferris67d1e5e2023-10-31 13:36:37 -070024 __aligned_u64 comp_mask;
Christopher Ferris3a39c0b2021-09-02 00:03:38 +000025};
26struct irdma_alloc_ucontext_resp {
27 __u32 max_pds;
28 __u32 max_qps;
29 __u32 wq_size;
30 __u8 kernel_ver;
31 __u8 rsvd[3];
32 __aligned_u64 feature_flags;
33 __aligned_u64 db_mmap_key;
34 __u32 max_hw_wq_frags;
35 __u32 max_hw_read_sges;
36 __u32 max_hw_inline;
37 __u32 max_hw_rq_quanta;
38 __u32 max_hw_wq_quanta;
39 __u32 min_hw_cq_size;
40 __u32 max_hw_cq_size;
41 __u16 max_hw_sq_chunk;
42 __u8 hw_rev;
43 __u8 rsvd2;
Christopher Ferris67d1e5e2023-10-31 13:36:37 -070044 __aligned_u64 comp_mask;
45 __u16 min_hw_wq_size;
46 __u8 rsvd3[6];
Christopher Ferris3a39c0b2021-09-02 00:03:38 +000047};
48struct irdma_alloc_pd_resp {
49 __u32 pd_id;
50 __u8 rsvd[4];
51};
52struct irdma_resize_cq_req {
53 __aligned_u64 user_cq_buffer;
54};
55struct irdma_create_cq_req {
56 __aligned_u64 user_cq_buf;
57 __aligned_u64 user_shadow_area;
58};
59struct irdma_create_qp_req {
60 __aligned_u64 user_wqe_bufs;
61 __aligned_u64 user_compl_ctx;
62};
63struct irdma_mem_reg_req {
64 __u16 reg_type;
65 __u16 cq_pages;
66 __u16 rq_pages;
67 __u16 sq_pages;
68};
69struct irdma_modify_qp_req {
70 __u8 sq_flush;
71 __u8 rq_flush;
72 __u8 rsvd[6];
73};
74struct irdma_create_cq_resp {
75 __u32 cq_id;
76 __u32 cq_size;
77};
78struct irdma_create_qp_resp {
79 __u32 qp_id;
80 __u32 actual_sq_size;
81 __u32 actual_rq_size;
82 __u32 irdma_drv_opt;
83 __u16 push_idx;
84 __u8 lsmm;
85 __u8 rsvd;
86 __u32 qp_caps;
87};
88struct irdma_modify_qp_resp {
89 __aligned_u64 push_wqe_mmap_key;
90 __aligned_u64 push_db_mmap_key;
91 __u16 push_offset;
92 __u8 push_valid;
93 __u8 rsvd[5];
94};
95struct irdma_create_ah_resp {
96 __u32 ah_id;
97 __u8 rsvd[4];
98};
99#endif