blob: b2eb258ae949485a65c1d3724c1c70eb5cbf218b [file] [log] [blame]
Christopher Ferris3a39c0b2021-09-02 00:03:38 +00001/****************************************************************************
2 ****************************************************************************
3 ***
4 *** This header was automatically generated from a Linux kernel header
5 *** of the same name, to make information necessary for userspace to
6 *** call into the kernel available to libc. It contains only constants,
7 *** structures, and macros generated from the original header, and thus,
8 *** contains no copyrightable information.
9 ***
10 *** To edit the content of this header, modify the corresponding
11 *** source file (e.g. under external/kernel-headers/original/) then
12 *** run bionic/libc/kernel/tools/update_all.py
13 ***
14 *** Any manual change here will be lost the next time this script will
15 *** be run. You've been warned!
16 ***
17 ****************************************************************************
18 ****************************************************************************/
19#ifndef IRDMA_ABI_H
20#define IRDMA_ABI_H
21#include <linux/types.h>
22#define IRDMA_ABI_VER 5
23enum irdma_memreg_type {
24 IRDMA_MEMREG_TYPE_MEM = 0,
25 IRDMA_MEMREG_TYPE_QP = 1,
26 IRDMA_MEMREG_TYPE_CQ = 2,
27};
Christopher Ferris67d1e5e2023-10-31 13:36:37 -070028enum {
29 IRDMA_ALLOC_UCTX_USE_RAW_ATTR = 1 << 0,
30 IRDMA_ALLOC_UCTX_MIN_HW_WQ_SIZE = 1 << 1,
31};
Christopher Ferris3a39c0b2021-09-02 00:03:38 +000032struct irdma_alloc_ucontext_req {
33 __u32 rsvd32;
34 __u8 userspace_ver;
35 __u8 rsvd8[3];
Christopher Ferris67d1e5e2023-10-31 13:36:37 -070036 __aligned_u64 comp_mask;
Christopher Ferris3a39c0b2021-09-02 00:03:38 +000037};
38struct irdma_alloc_ucontext_resp {
39 __u32 max_pds;
40 __u32 max_qps;
41 __u32 wq_size;
42 __u8 kernel_ver;
43 __u8 rsvd[3];
44 __aligned_u64 feature_flags;
45 __aligned_u64 db_mmap_key;
46 __u32 max_hw_wq_frags;
47 __u32 max_hw_read_sges;
48 __u32 max_hw_inline;
49 __u32 max_hw_rq_quanta;
50 __u32 max_hw_wq_quanta;
51 __u32 min_hw_cq_size;
52 __u32 max_hw_cq_size;
53 __u16 max_hw_sq_chunk;
54 __u8 hw_rev;
55 __u8 rsvd2;
Christopher Ferris67d1e5e2023-10-31 13:36:37 -070056 __aligned_u64 comp_mask;
57 __u16 min_hw_wq_size;
58 __u8 rsvd3[6];
Christopher Ferris3a39c0b2021-09-02 00:03:38 +000059};
60struct irdma_alloc_pd_resp {
61 __u32 pd_id;
62 __u8 rsvd[4];
63};
64struct irdma_resize_cq_req {
65 __aligned_u64 user_cq_buffer;
66};
67struct irdma_create_cq_req {
68 __aligned_u64 user_cq_buf;
69 __aligned_u64 user_shadow_area;
70};
71struct irdma_create_qp_req {
72 __aligned_u64 user_wqe_bufs;
73 __aligned_u64 user_compl_ctx;
74};
75struct irdma_mem_reg_req {
76 __u16 reg_type;
77 __u16 cq_pages;
78 __u16 rq_pages;
79 __u16 sq_pages;
80};
81struct irdma_modify_qp_req {
82 __u8 sq_flush;
83 __u8 rq_flush;
84 __u8 rsvd[6];
85};
86struct irdma_create_cq_resp {
87 __u32 cq_id;
88 __u32 cq_size;
89};
90struct irdma_create_qp_resp {
91 __u32 qp_id;
92 __u32 actual_sq_size;
93 __u32 actual_rq_size;
94 __u32 irdma_drv_opt;
95 __u16 push_idx;
96 __u8 lsmm;
97 __u8 rsvd;
98 __u32 qp_caps;
99};
100struct irdma_modify_qp_resp {
101 __aligned_u64 push_wqe_mmap_key;
102 __aligned_u64 push_db_mmap_key;
103 __u16 push_offset;
104 __u8 push_valid;
105 __u8 rsvd[5];
106};
107struct irdma_create_ah_resp {
108 __u32 ah_id;
109 __u8 rsvd[4];
110};
111#endif