| Elliott Hughes | 180edef | 2023-11-02 00:08:05 +0000 | [diff] [blame] | 1 | /* | 
|  | 2 | * This file is auto-generated. Modifications will be lost. | 
|  | 3 | * | 
|  | 4 | * See https://android.googlesource.com/platform/bionic/+/master/libc/kernel/ | 
|  | 5 | * for more information. | 
|  | 6 | */ | 
| Elliott Hughes | abd6261 | 2013-11-08 11:45:48 -0800 | [diff] [blame] | 7 | #ifndef _UAPI_ASM_X86_PROCESSOR_FLAGS_H | 
|  | 8 | #define _UAPI_ASM_X86_PROCESSOR_FLAGS_H | 
| Christopher Ferris | 38062f9 | 2014-07-09 15:33:25 -0700 | [diff] [blame] | 9 | #include <linux/const.h> | 
|  | 10 | #define X86_EFLAGS_CF_BIT 0 | 
| Christopher Ferris | 38062f9 | 2014-07-09 15:33:25 -0700 | [diff] [blame] | 11 | #define X86_EFLAGS_CF _BITUL(X86_EFLAGS_CF_BIT) | 
|  | 12 | #define X86_EFLAGS_FIXED_BIT 1 | 
|  | 13 | #define X86_EFLAGS_FIXED _BITUL(X86_EFLAGS_FIXED_BIT) | 
|  | 14 | #define X86_EFLAGS_PF_BIT 2 | 
| Christopher Ferris | 38062f9 | 2014-07-09 15:33:25 -0700 | [diff] [blame] | 15 | #define X86_EFLAGS_PF _BITUL(X86_EFLAGS_PF_BIT) | 
|  | 16 | #define X86_EFLAGS_AF_BIT 4 | 
|  | 17 | #define X86_EFLAGS_AF _BITUL(X86_EFLAGS_AF_BIT) | 
|  | 18 | #define X86_EFLAGS_ZF_BIT 6 | 
| Christopher Ferris | 38062f9 | 2014-07-09 15:33:25 -0700 | [diff] [blame] | 19 | #define X86_EFLAGS_ZF _BITUL(X86_EFLAGS_ZF_BIT) | 
|  | 20 | #define X86_EFLAGS_SF_BIT 7 | 
|  | 21 | #define X86_EFLAGS_SF _BITUL(X86_EFLAGS_SF_BIT) | 
|  | 22 | #define X86_EFLAGS_TF_BIT 8 | 
| Christopher Ferris | 38062f9 | 2014-07-09 15:33:25 -0700 | [diff] [blame] | 23 | #define X86_EFLAGS_TF _BITUL(X86_EFLAGS_TF_BIT) | 
|  | 24 | #define X86_EFLAGS_IF_BIT 9 | 
|  | 25 | #define X86_EFLAGS_IF _BITUL(X86_EFLAGS_IF_BIT) | 
|  | 26 | #define X86_EFLAGS_DF_BIT 10 | 
| Christopher Ferris | 38062f9 | 2014-07-09 15:33:25 -0700 | [diff] [blame] | 27 | #define X86_EFLAGS_DF _BITUL(X86_EFLAGS_DF_BIT) | 
|  | 28 | #define X86_EFLAGS_OF_BIT 11 | 
|  | 29 | #define X86_EFLAGS_OF _BITUL(X86_EFLAGS_OF_BIT) | 
|  | 30 | #define X86_EFLAGS_IOPL_BIT 12 | 
| Tao Bao | d7db594 | 2015-01-28 10:07:51 -0800 | [diff] [blame] | 31 | #define X86_EFLAGS_IOPL (_AC(3, UL) << X86_EFLAGS_IOPL_BIT) | 
| Christopher Ferris | 38062f9 | 2014-07-09 15:33:25 -0700 | [diff] [blame] | 32 | #define X86_EFLAGS_NT_BIT 14 | 
|  | 33 | #define X86_EFLAGS_NT _BITUL(X86_EFLAGS_NT_BIT) | 
|  | 34 | #define X86_EFLAGS_RF_BIT 16 | 
| Christopher Ferris | 38062f9 | 2014-07-09 15:33:25 -0700 | [diff] [blame] | 35 | #define X86_EFLAGS_RF _BITUL(X86_EFLAGS_RF_BIT) | 
|  | 36 | #define X86_EFLAGS_VM_BIT 17 | 
|  | 37 | #define X86_EFLAGS_VM _BITUL(X86_EFLAGS_VM_BIT) | 
|  | 38 | #define X86_EFLAGS_AC_BIT 18 | 
| Christopher Ferris | 38062f9 | 2014-07-09 15:33:25 -0700 | [diff] [blame] | 39 | #define X86_EFLAGS_AC _BITUL(X86_EFLAGS_AC_BIT) | 
| Christopher Ferris | 38062f9 | 2014-07-09 15:33:25 -0700 | [diff] [blame] | 40 | #define X86_EFLAGS_VIF_BIT 19 | 
| Christopher Ferris | 38062f9 | 2014-07-09 15:33:25 -0700 | [diff] [blame] | 41 | #define X86_EFLAGS_VIF _BITUL(X86_EFLAGS_VIF_BIT) | 
|  | 42 | #define X86_EFLAGS_VIP_BIT 20 | 
|  | 43 | #define X86_EFLAGS_VIP _BITUL(X86_EFLAGS_VIP_BIT) | 
|  | 44 | #define X86_EFLAGS_ID_BIT 21 | 
| Christopher Ferris | 38062f9 | 2014-07-09 15:33:25 -0700 | [diff] [blame] | 45 | #define X86_EFLAGS_ID _BITUL(X86_EFLAGS_ID_BIT) | 
|  | 46 | #define X86_CR0_PE_BIT 0 | 
|  | 47 | #define X86_CR0_PE _BITUL(X86_CR0_PE_BIT) | 
|  | 48 | #define X86_CR0_MP_BIT 1 | 
| Christopher Ferris | 38062f9 | 2014-07-09 15:33:25 -0700 | [diff] [blame] | 49 | #define X86_CR0_MP _BITUL(X86_CR0_MP_BIT) | 
|  | 50 | #define X86_CR0_EM_BIT 2 | 
|  | 51 | #define X86_CR0_EM _BITUL(X86_CR0_EM_BIT) | 
|  | 52 | #define X86_CR0_TS_BIT 3 | 
| Christopher Ferris | 38062f9 | 2014-07-09 15:33:25 -0700 | [diff] [blame] | 53 | #define X86_CR0_TS _BITUL(X86_CR0_TS_BIT) | 
|  | 54 | #define X86_CR0_ET_BIT 4 | 
|  | 55 | #define X86_CR0_ET _BITUL(X86_CR0_ET_BIT) | 
|  | 56 | #define X86_CR0_NE_BIT 5 | 
| Christopher Ferris | 38062f9 | 2014-07-09 15:33:25 -0700 | [diff] [blame] | 57 | #define X86_CR0_NE _BITUL(X86_CR0_NE_BIT) | 
|  | 58 | #define X86_CR0_WP_BIT 16 | 
|  | 59 | #define X86_CR0_WP _BITUL(X86_CR0_WP_BIT) | 
|  | 60 | #define X86_CR0_AM_BIT 18 | 
| Christopher Ferris | 38062f9 | 2014-07-09 15:33:25 -0700 | [diff] [blame] | 61 | #define X86_CR0_AM _BITUL(X86_CR0_AM_BIT) | 
|  | 62 | #define X86_CR0_NW_BIT 29 | 
|  | 63 | #define X86_CR0_NW _BITUL(X86_CR0_NW_BIT) | 
|  | 64 | #define X86_CR0_CD_BIT 30 | 
| Christopher Ferris | 38062f9 | 2014-07-09 15:33:25 -0700 | [diff] [blame] | 65 | #define X86_CR0_CD _BITUL(X86_CR0_CD_BIT) | 
|  | 66 | #define X86_CR0_PG_BIT 31 | 
|  | 67 | #define X86_CR0_PG _BITUL(X86_CR0_PG_BIT) | 
|  | 68 | #define X86_CR3_PWT_BIT 3 | 
| Christopher Ferris | 38062f9 | 2014-07-09 15:33:25 -0700 | [diff] [blame] | 69 | #define X86_CR3_PWT _BITUL(X86_CR3_PWT_BIT) | 
|  | 70 | #define X86_CR3_PCD_BIT 4 | 
|  | 71 | #define X86_CR3_PCD _BITUL(X86_CR3_PCD_BIT) | 
| Christopher Ferris | 934ec94 | 2018-01-31 15:29:16 -0800 | [diff] [blame] | 72 | #define X86_CR3_PCID_BITS 12 | 
|  | 73 | #define X86_CR3_PCID_MASK (_AC((1UL << X86_CR3_PCID_BITS) - 1, UL)) | 
| Christopher Ferris | 37c3f3c | 2023-07-10 10:59:05 -0700 | [diff] [blame] | 74 | #define X86_CR3_LAM_U57_BIT 61 | 
|  | 75 | #define X86_CR3_LAM_U57 _BITULL(X86_CR3_LAM_U57_BIT) | 
|  | 76 | #define X86_CR3_LAM_U48_BIT 62 | 
|  | 77 | #define X86_CR3_LAM_U48 _BITULL(X86_CR3_LAM_U48_BIT) | 
| Christopher Ferris | 934ec94 | 2018-01-31 15:29:16 -0800 | [diff] [blame] | 78 | #define X86_CR3_PCID_NOFLUSH_BIT 63 | 
|  | 79 | #define X86_CR3_PCID_NOFLUSH _BITULL(X86_CR3_PCID_NOFLUSH_BIT) | 
| Christopher Ferris | 38062f9 | 2014-07-09 15:33:25 -0700 | [diff] [blame] | 80 | #define X86_CR4_VME_BIT 0 | 
|  | 81 | #define X86_CR4_VME _BITUL(X86_CR4_VME_BIT) | 
|  | 82 | #define X86_CR4_PVI_BIT 1 | 
|  | 83 | #define X86_CR4_PVI _BITUL(X86_CR4_PVI_BIT) | 
| Christopher Ferris | 38062f9 | 2014-07-09 15:33:25 -0700 | [diff] [blame] | 84 | #define X86_CR4_TSD_BIT 2 | 
|  | 85 | #define X86_CR4_TSD _BITUL(X86_CR4_TSD_BIT) | 
|  | 86 | #define X86_CR4_DE_BIT 3 | 
|  | 87 | #define X86_CR4_DE _BITUL(X86_CR4_DE_BIT) | 
| Christopher Ferris | 38062f9 | 2014-07-09 15:33:25 -0700 | [diff] [blame] | 88 | #define X86_CR4_PSE_BIT 4 | 
|  | 89 | #define X86_CR4_PSE _BITUL(X86_CR4_PSE_BIT) | 
|  | 90 | #define X86_CR4_PAE_BIT 5 | 
|  | 91 | #define X86_CR4_PAE _BITUL(X86_CR4_PAE_BIT) | 
| Christopher Ferris | 38062f9 | 2014-07-09 15:33:25 -0700 | [diff] [blame] | 92 | #define X86_CR4_MCE_BIT 6 | 
|  | 93 | #define X86_CR4_MCE _BITUL(X86_CR4_MCE_BIT) | 
|  | 94 | #define X86_CR4_PGE_BIT 7 | 
|  | 95 | #define X86_CR4_PGE _BITUL(X86_CR4_PGE_BIT) | 
| Christopher Ferris | 38062f9 | 2014-07-09 15:33:25 -0700 | [diff] [blame] | 96 | #define X86_CR4_PCE_BIT 8 | 
|  | 97 | #define X86_CR4_PCE _BITUL(X86_CR4_PCE_BIT) | 
|  | 98 | #define X86_CR4_OSFXSR_BIT 9 | 
|  | 99 | #define X86_CR4_OSFXSR _BITUL(X86_CR4_OSFXSR_BIT) | 
| Christopher Ferris | 38062f9 | 2014-07-09 15:33:25 -0700 | [diff] [blame] | 100 | #define X86_CR4_OSXMMEXCPT_BIT 10 | 
|  | 101 | #define X86_CR4_OSXMMEXCPT _BITUL(X86_CR4_OSXMMEXCPT_BIT) | 
| Christopher Ferris | 934ec94 | 2018-01-31 15:29:16 -0800 | [diff] [blame] | 102 | #define X86_CR4_UMIP_BIT 11 | 
|  | 103 | #define X86_CR4_UMIP _BITUL(X86_CR4_UMIP_BIT) | 
| Christopher Ferris | 1308ad3 | 2017-11-14 17:32:13 -0800 | [diff] [blame] | 104 | #define X86_CR4_LA57_BIT 12 | 
|  | 105 | #define X86_CR4_LA57 _BITUL(X86_CR4_LA57_BIT) | 
| Christopher Ferris | 38062f9 | 2014-07-09 15:33:25 -0700 | [diff] [blame] | 106 | #define X86_CR4_VMXE_BIT 13 | 
|  | 107 | #define X86_CR4_VMXE _BITUL(X86_CR4_VMXE_BIT) | 
| Christopher Ferris | 38062f9 | 2014-07-09 15:33:25 -0700 | [diff] [blame] | 108 | #define X86_CR4_SMXE_BIT 14 | 
|  | 109 | #define X86_CR4_SMXE _BITUL(X86_CR4_SMXE_BIT) | 
|  | 110 | #define X86_CR4_FSGSBASE_BIT 16 | 
|  | 111 | #define X86_CR4_FSGSBASE _BITUL(X86_CR4_FSGSBASE_BIT) | 
| Christopher Ferris | 38062f9 | 2014-07-09 15:33:25 -0700 | [diff] [blame] | 112 | #define X86_CR4_PCIDE_BIT 17 | 
|  | 113 | #define X86_CR4_PCIDE _BITUL(X86_CR4_PCIDE_BIT) | 
|  | 114 | #define X86_CR4_OSXSAVE_BIT 18 | 
|  | 115 | #define X86_CR4_OSXSAVE _BITUL(X86_CR4_OSXSAVE_BIT) | 
| Christopher Ferris | 38062f9 | 2014-07-09 15:33:25 -0700 | [diff] [blame] | 116 | #define X86_CR4_SMEP_BIT 20 | 
|  | 117 | #define X86_CR4_SMEP _BITUL(X86_CR4_SMEP_BIT) | 
|  | 118 | #define X86_CR4_SMAP_BIT 21 | 
|  | 119 | #define X86_CR4_SMAP _BITUL(X86_CR4_SMAP_BIT) | 
| Christopher Ferris | 106b3a8 | 2016-08-24 12:15:38 -0700 | [diff] [blame] | 120 | #define X86_CR4_PKE_BIT 22 | 
|  | 121 | #define X86_CR4_PKE _BITUL(X86_CR4_PKE_BIT) | 
| Christopher Ferris | 10a76e6 | 2022-06-08 13:31:52 -0700 | [diff] [blame] | 122 | #define X86_CR4_CET_BIT 23 | 
|  | 123 | #define X86_CR4_CET _BITUL(X86_CR4_CET_BIT) | 
| Christopher Ferris | 37c3f3c | 2023-07-10 10:59:05 -0700 | [diff] [blame] | 124 | #define X86_CR4_LAM_SUP_BIT 28 | 
|  | 125 | #define X86_CR4_LAM_SUP _BITUL(X86_CR4_LAM_SUP_BIT) | 
| Tao Bao | d7db594 | 2015-01-28 10:07:51 -0800 | [diff] [blame] | 126 | #define X86_CR8_TPR _AC(0x0000000f, UL) | 
| Elliott Hughes | abd6261 | 2013-11-08 11:45:48 -0800 | [diff] [blame] | 127 | #define CX86_PCR0 0x20 | 
|  | 128 | #define CX86_GCR 0xb8 | 
|  | 129 | #define CX86_CCR0 0xc0 | 
| Christopher Ferris | 38062f9 | 2014-07-09 15:33:25 -0700 | [diff] [blame] | 130 | #define CX86_CCR1 0xc1 | 
| Elliott Hughes | abd6261 | 2013-11-08 11:45:48 -0800 | [diff] [blame] | 131 | #define CX86_CCR2 0xc2 | 
|  | 132 | #define CX86_CCR3 0xc3 | 
|  | 133 | #define CX86_CCR4 0xe8 | 
| Christopher Ferris | 38062f9 | 2014-07-09 15:33:25 -0700 | [diff] [blame] | 134 | #define CX86_CCR5 0xe9 | 
| Elliott Hughes | abd6261 | 2013-11-08 11:45:48 -0800 | [diff] [blame] | 135 | #define CX86_CCR6 0xea | 
|  | 136 | #define CX86_CCR7 0xeb | 
|  | 137 | #define CX86_PCR1 0xf0 | 
| Christopher Ferris | 38062f9 | 2014-07-09 15:33:25 -0700 | [diff] [blame] | 138 | #define CX86_DIR0 0xfe | 
| Elliott Hughes | abd6261 | 2013-11-08 11:45:48 -0800 | [diff] [blame] | 139 | #define CX86_DIR1 0xff | 
|  | 140 | #define CX86_ARR_BASE 0xc4 | 
|  | 141 | #define CX86_RCR_BASE 0xdc | 
| Christopher Ferris | 934ec94 | 2018-01-31 15:29:16 -0800 | [diff] [blame] | 142 | #define CR0_STATE (X86_CR0_PE | X86_CR0_MP | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM | X86_CR0_PG) | 
| Christopher Ferris | 38062f9 | 2014-07-09 15:33:25 -0700 | [diff] [blame] | 143 | #endif |