Update to kernel headers v4.7.2.

Modify the kernel header update script to rename C++ keyword
struct members to something else. This fixes problems when including
these kernel files in C++ code.

Also, make a manual change to linux/fib_rules.h and comment out the
value FRA_PAD since it conflicts with a special android kernel value
FRA_UID_START that has not been upstreamed yet.

Test: Built aosp_angler, aosp_x86_64, aosp_mips (bionic only)
Test: Booted on angler and ran bionic unit tests
Test: Built these changes in internal master

Change-Id: Ia22b7e3ca409404696dba76311f49157f4a9ceed
diff --git a/libc/kernel/uapi/asm-x86/asm/processor-flags.h b/libc/kernel/uapi/asm-x86/asm/processor-flags.h
index 74fbff2..b9a8943 100644
--- a/libc/kernel/uapi/asm-x86/asm/processor-flags.h
+++ b/libc/kernel/uapi/asm-x86/asm/processor-flags.h
@@ -143,24 +143,27 @@
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define X86_CR4_SMAP_BIT 21
 #define X86_CR4_SMAP _BITUL(X86_CR4_SMAP_BIT)
+#define X86_CR4_PKE_BIT 22
+#define X86_CR4_PKE _BITUL(X86_CR4_PKE_BIT)
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define X86_CR8_TPR _AC(0x0000000f, UL)
 #define CX86_PCR0 0x20
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define CX86_GCR 0xb8
 #define CX86_CCR0 0xc0
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define CX86_CCR1 0xc1
 #define CX86_CCR2 0xc2
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define CX86_CCR3 0xc3
 #define CX86_CCR4 0xe8
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define CX86_CCR5 0xe9
 #define CX86_CCR6 0xea
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define CX86_CCR7 0xeb
 #define CX86_PCR1 0xf0
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define CX86_DIR0 0xfe
 #define CX86_DIR1 0xff
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define CX86_ARR_BASE 0xc4
 #define CX86_RCR_BASE 0xdc
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #endif