blob: 2e5f9a4210562aa82d4250eaee45118c45e6b50b [file] [log] [blame]
Elliott Hughes180edef2023-11-02 00:08:05 +00001/*
2 * This file is auto-generated. Modifications will be lost.
3 *
4 * See https://android.googlesource.com/platform/bionic/+/master/libc/kernel/
5 * for more information.
6 */
Christopher Ferris37c3f3c2023-07-10 10:59:05 -07007#ifndef _UAPI_ASM_HWPROBE_H
8#define _UAPI_ASM_HWPROBE_H
9#include <linux/types.h>
10struct riscv_hwprobe {
11 __s64 key;
12 __u64 value;
13};
14#define RISCV_HWPROBE_KEY_MVENDORID 0
15#define RISCV_HWPROBE_KEY_MARCHID 1
16#define RISCV_HWPROBE_KEY_MIMPID 2
17#define RISCV_HWPROBE_KEY_BASE_BEHAVIOR 3
18#define RISCV_HWPROBE_BASE_BEHAVIOR_IMA (1 << 0)
19#define RISCV_HWPROBE_KEY_IMA_EXT_0 4
20#define RISCV_HWPROBE_IMA_FD (1 << 0)
21#define RISCV_HWPROBE_IMA_C (1 << 1)
Christopher Ferris8666d042023-09-06 14:55:31 -070022#define RISCV_HWPROBE_IMA_V (1 << 2)
23#define RISCV_HWPROBE_EXT_ZBA (1 << 3)
24#define RISCV_HWPROBE_EXT_ZBB (1 << 4)
25#define RISCV_HWPROBE_EXT_ZBS (1 << 5)
Christopher Ferris0f795212024-01-17 14:17:28 -080026#define RISCV_HWPROBE_EXT_ZICBOZ (1 << 6)
Christopher Ferrisb830ddf2024-03-28 11:48:08 -070027#define RISCV_HWPROBE_EXT_ZBC (1 << 7)
28#define RISCV_HWPROBE_EXT_ZBKB (1 << 8)
29#define RISCV_HWPROBE_EXT_ZBKC (1 << 9)
30#define RISCV_HWPROBE_EXT_ZBKX (1 << 10)
31#define RISCV_HWPROBE_EXT_ZKND (1 << 11)
32#define RISCV_HWPROBE_EXT_ZKNE (1 << 12)
33#define RISCV_HWPROBE_EXT_ZKNH (1 << 13)
34#define RISCV_HWPROBE_EXT_ZKSED (1 << 14)
35#define RISCV_HWPROBE_EXT_ZKSH (1 << 15)
36#define RISCV_HWPROBE_EXT_ZKT (1 << 16)
37#define RISCV_HWPROBE_EXT_ZVBB (1 << 17)
38#define RISCV_HWPROBE_EXT_ZVBC (1 << 18)
39#define RISCV_HWPROBE_EXT_ZVKB (1 << 19)
40#define RISCV_HWPROBE_EXT_ZVKG (1 << 20)
41#define RISCV_HWPROBE_EXT_ZVKNED (1 << 21)
42#define RISCV_HWPROBE_EXT_ZVKNHA (1 << 22)
43#define RISCV_HWPROBE_EXT_ZVKNHB (1 << 23)
44#define RISCV_HWPROBE_EXT_ZVKSED (1 << 24)
45#define RISCV_HWPROBE_EXT_ZVKSH (1 << 25)
46#define RISCV_HWPROBE_EXT_ZVKT (1 << 26)
47#define RISCV_HWPROBE_EXT_ZFH (1 << 27)
48#define RISCV_HWPROBE_EXT_ZFHMIN (1 << 28)
49#define RISCV_HWPROBE_EXT_ZIHINTNTL (1 << 29)
50#define RISCV_HWPROBE_EXT_ZVFH (1 << 30)
Christopher Ferris7f4c8372024-06-03 14:22:19 -070051#define RISCV_HWPROBE_EXT_ZVFHMIN (1ULL << 31)
Christopher Ferrisb830ddf2024-03-28 11:48:08 -070052#define RISCV_HWPROBE_EXT_ZFA (1ULL << 32)
53#define RISCV_HWPROBE_EXT_ZTSO (1ULL << 33)
54#define RISCV_HWPROBE_EXT_ZACAS (1ULL << 34)
55#define RISCV_HWPROBE_EXT_ZICOND (1ULL << 35)
Christopher Ferris7ac54f52024-08-07 21:07:12 +000056#define RISCV_HWPROBE_EXT_ZIHINTPAUSE (1ULL << 36)
Christopher Ferris63fcca42024-09-26 01:12:10 +000057#define RISCV_HWPROBE_EXT_ZVE32X (1ULL << 37)
58#define RISCV_HWPROBE_EXT_ZVE32F (1ULL << 38)
59#define RISCV_HWPROBE_EXT_ZVE64X (1ULL << 39)
60#define RISCV_HWPROBE_EXT_ZVE64F (1ULL << 40)
61#define RISCV_HWPROBE_EXT_ZVE64D (1ULL << 41)
62#define RISCV_HWPROBE_EXT_ZIMOP (1ULL << 42)
63#define RISCV_HWPROBE_EXT_ZCA (1ULL << 43)
64#define RISCV_HWPROBE_EXT_ZCB (1ULL << 44)
65#define RISCV_HWPROBE_EXT_ZCD (1ULL << 45)
66#define RISCV_HWPROBE_EXT_ZCF (1ULL << 46)
67#define RISCV_HWPROBE_EXT_ZCMOP (1ULL << 47)
68#define RISCV_HWPROBE_EXT_ZAWRS (1ULL << 48)
Christopher Ferris37c3f3c2023-07-10 10:59:05 -070069#define RISCV_HWPROBE_KEY_CPUPERF_0 5
70#define RISCV_HWPROBE_MISALIGNED_UNKNOWN (0 << 0)
71#define RISCV_HWPROBE_MISALIGNED_EMULATED (1 << 0)
72#define RISCV_HWPROBE_MISALIGNED_SLOW (2 << 0)
73#define RISCV_HWPROBE_MISALIGNED_FAST (3 << 0)
74#define RISCV_HWPROBE_MISALIGNED_UNSUPPORTED (4 << 0)
75#define RISCV_HWPROBE_MISALIGNED_MASK (7 << 0)
Christopher Ferris0f795212024-01-17 14:17:28 -080076#define RISCV_HWPROBE_KEY_ZICBOZ_BLOCK_SIZE 6
Christopher Ferris63fcca42024-09-26 01:12:10 +000077#define RISCV_HWPROBE_KEY_HIGHEST_VIRT_ADDRESS 7
78#define RISCV_HWPROBE_KEY_TIME_CSR_FREQ 8
79#define RISCV_HWPROBE_KEY_MISALIGNED_SCALAR_PERF 9
80#define RISCV_HWPROBE_MISALIGNED_SCALAR_UNKNOWN 0
81#define RISCV_HWPROBE_MISALIGNED_SCALAR_EMULATED 1
82#define RISCV_HWPROBE_MISALIGNED_SCALAR_SLOW 2
83#define RISCV_HWPROBE_MISALIGNED_SCALAR_FAST 3
84#define RISCV_HWPROBE_MISALIGNED_SCALAR_UNSUPPORTED 4
Christopher Ferrisb830ddf2024-03-28 11:48:08 -070085#define RISCV_HWPROBE_WHICH_CPUS (1 << 0)
Christopher Ferris37c3f3c2023-07-10 10:59:05 -070086#endif