| Christopher Ferris | 37c3f3c | 2023-07-10 10:59:05 -0700 | [diff] [blame] | 1 | /**************************************************************************** |
| 2 | **************************************************************************** |
| 3 | *** |
| 4 | *** This header was automatically generated from a Linux kernel header |
| 5 | *** of the same name, to make information necessary for userspace to |
| 6 | *** call into the kernel available to libc. It contains only constants, |
| 7 | *** structures, and macros generated from the original header, and thus, |
| 8 | *** contains no copyrightable information. |
| 9 | *** |
| 10 | *** To edit the content of this header, modify the corresponding |
| 11 | *** source file (e.g. under external/kernel-headers/original/) then |
| 12 | *** run bionic/libc/kernel/tools/update_all.py |
| 13 | *** |
| 14 | *** Any manual change here will be lost the next time this script will |
| 15 | *** be run. You've been warned! |
| 16 | *** |
| 17 | **************************************************************************** |
| 18 | ****************************************************************************/ |
| 19 | #ifndef _UAPI_ASM_HWPROBE_H |
| 20 | #define _UAPI_ASM_HWPROBE_H |
| 21 | #include <linux/types.h> |
| 22 | struct riscv_hwprobe { |
| 23 | __s64 key; |
| 24 | __u64 value; |
| 25 | }; |
| 26 | #define RISCV_HWPROBE_KEY_MVENDORID 0 |
| 27 | #define RISCV_HWPROBE_KEY_MARCHID 1 |
| 28 | #define RISCV_HWPROBE_KEY_MIMPID 2 |
| 29 | #define RISCV_HWPROBE_KEY_BASE_BEHAVIOR 3 |
| 30 | #define RISCV_HWPROBE_BASE_BEHAVIOR_IMA (1 << 0) |
| 31 | #define RISCV_HWPROBE_KEY_IMA_EXT_0 4 |
| 32 | #define RISCV_HWPROBE_IMA_FD (1 << 0) |
| 33 | #define RISCV_HWPROBE_IMA_C (1 << 1) |
| Christopher Ferris | 8666d04 | 2023-09-06 14:55:31 -0700 | [diff] [blame^] | 34 | #define RISCV_HWPROBE_IMA_V (1 << 2) |
| 35 | #define RISCV_HWPROBE_EXT_ZBA (1 << 3) |
| 36 | #define RISCV_HWPROBE_EXT_ZBB (1 << 4) |
| 37 | #define RISCV_HWPROBE_EXT_ZBS (1 << 5) |
| Christopher Ferris | 37c3f3c | 2023-07-10 10:59:05 -0700 | [diff] [blame] | 38 | #define RISCV_HWPROBE_KEY_CPUPERF_0 5 |
| 39 | #define RISCV_HWPROBE_MISALIGNED_UNKNOWN (0 << 0) |
| 40 | #define RISCV_HWPROBE_MISALIGNED_EMULATED (1 << 0) |
| 41 | #define RISCV_HWPROBE_MISALIGNED_SLOW (2 << 0) |
| 42 | #define RISCV_HWPROBE_MISALIGNED_FAST (3 << 0) |
| 43 | #define RISCV_HWPROBE_MISALIGNED_UNSUPPORTED (4 << 0) |
| 44 | #define RISCV_HWPROBE_MISALIGNED_MASK (7 << 0) |
| 45 | #endif |