Elliott Hughes | 180edef | 2023-11-02 00:08:05 +0000 | [diff] [blame] | 1 | /* |
| 2 | * This file is auto-generated. Modifications will be lost. |
| 3 | * |
| 4 | * See https://android.googlesource.com/platform/bionic/+/master/libc/kernel/ |
| 5 | * for more information. |
| 6 | */ |
Ben Cheng | 655a7c0 | 2013-10-16 16:09:24 -0700 | [diff] [blame] | 7 | #ifndef _UAPI_LINUX_SERIAL_H |
| 8 | #define _UAPI_LINUX_SERIAL_H |
Christopher Ferris | b830ddf | 2024-03-28 11:48:08 -0700 | [diff] [blame^] | 9 | #include <linux/const.h> |
Ben Cheng | 655a7c0 | 2013-10-16 16:09:24 -0700 | [diff] [blame] | 10 | #include <linux/types.h> |
| 11 | #include <linux/tty_flags.h> |
Ben Cheng | 655a7c0 | 2013-10-16 16:09:24 -0700 | [diff] [blame] | 12 | struct serial_struct { |
Tao Bao | d7db594 | 2015-01-28 10:07:51 -0800 | [diff] [blame] | 13 | int type; |
| 14 | int line; |
| 15 | unsigned int port; |
Tao Bao | d7db594 | 2015-01-28 10:07:51 -0800 | [diff] [blame] | 16 | int irq; |
| 17 | int flags; |
| 18 | int xmit_fifo_size; |
| 19 | int custom_divisor; |
Tao Bao | d7db594 | 2015-01-28 10:07:51 -0800 | [diff] [blame] | 20 | int baud_base; |
| 21 | unsigned short close_delay; |
| 22 | char io_type; |
| 23 | char reserved_char[1]; |
Tao Bao | d7db594 | 2015-01-28 10:07:51 -0800 | [diff] [blame] | 24 | int hub6; |
| 25 | unsigned short closing_wait; |
| 26 | unsigned short closing_wait2; |
| 27 | unsigned char * iomem_base; |
Tao Bao | d7db594 | 2015-01-28 10:07:51 -0800 | [diff] [blame] | 28 | unsigned short iomem_reg_shift; |
| 29 | unsigned int port_high; |
| 30 | unsigned long iomap_base; |
Ben Cheng | 655a7c0 | 2013-10-16 16:09:24 -0700 | [diff] [blame] | 31 | }; |
Ben Cheng | 655a7c0 | 2013-10-16 16:09:24 -0700 | [diff] [blame] | 32 | #define ASYNC_CLOSING_WAIT_INF 0 |
| 33 | #define ASYNC_CLOSING_WAIT_NONE 65535 |
| 34 | #define PORT_UNKNOWN 0 |
| 35 | #define PORT_8250 1 |
Ben Cheng | 655a7c0 | 2013-10-16 16:09:24 -0700 | [diff] [blame] | 36 | #define PORT_16450 2 |
| 37 | #define PORT_16550 3 |
| 38 | #define PORT_16550A 4 |
| 39 | #define PORT_CIRRUS 5 |
Ben Cheng | 655a7c0 | 2013-10-16 16:09:24 -0700 | [diff] [blame] | 40 | #define PORT_16650 6 |
| 41 | #define PORT_16650V2 7 |
| 42 | #define PORT_16750 8 |
| 43 | #define PORT_STARTECH 9 |
Ben Cheng | 655a7c0 | 2013-10-16 16:09:24 -0700 | [diff] [blame] | 44 | #define PORT_16C950 10 |
| 45 | #define PORT_16654 11 |
| 46 | #define PORT_16850 12 |
| 47 | #define PORT_RSA 13 |
Ben Cheng | 655a7c0 | 2013-10-16 16:09:24 -0700 | [diff] [blame] | 48 | #define PORT_MAX 13 |
| 49 | #define SERIAL_IO_PORT 0 |
| 50 | #define SERIAL_IO_HUB6 1 |
| 51 | #define SERIAL_IO_MEM 2 |
Christopher Ferris | 05d08e9 | 2016-02-04 13:16:38 -0800 | [diff] [blame] | 52 | #define SERIAL_IO_MEM32 3 |
| 53 | #define SERIAL_IO_AU 4 |
| 54 | #define SERIAL_IO_TSI 5 |
| 55 | #define SERIAL_IO_MEM32BE 6 |
Christopher Ferris | 106b3a8 | 2016-08-24 12:15:38 -0700 | [diff] [blame] | 56 | #define SERIAL_IO_MEM16 7 |
Ben Cheng | 655a7c0 | 2013-10-16 16:09:24 -0700 | [diff] [blame] | 57 | #define UART_CLEAR_FIFO 0x01 |
| 58 | #define UART_USE_FIFO 0x02 |
| 59 | #define UART_STARTECH 0x04 |
Christopher Ferris | 106b3a8 | 2016-08-24 12:15:38 -0700 | [diff] [blame] | 60 | #define UART_NATSEMI 0x08 |
Ben Cheng | 655a7c0 | 2013-10-16 16:09:24 -0700 | [diff] [blame] | 61 | struct serial_multiport_struct { |
Tao Bao | d7db594 | 2015-01-28 10:07:51 -0800 | [diff] [blame] | 62 | int irq; |
| 63 | int port1; |
Christopher Ferris | 106b3a8 | 2016-08-24 12:15:38 -0700 | [diff] [blame] | 64 | unsigned char mask1, match1; |
Tao Bao | d7db594 | 2015-01-28 10:07:51 -0800 | [diff] [blame] | 65 | int port2; |
| 66 | unsigned char mask2, match2; |
| 67 | int port3; |
Christopher Ferris | 106b3a8 | 2016-08-24 12:15:38 -0700 | [diff] [blame] | 68 | unsigned char mask3, match3; |
Tao Bao | d7db594 | 2015-01-28 10:07:51 -0800 | [diff] [blame] | 69 | int port4; |
| 70 | unsigned char mask4, match4; |
| 71 | int port_monitor; |
Christopher Ferris | 106b3a8 | 2016-08-24 12:15:38 -0700 | [diff] [blame] | 72 | int reserved[32]; |
Ben Cheng | 655a7c0 | 2013-10-16 16:09:24 -0700 | [diff] [blame] | 73 | }; |
| 74 | struct serial_icounter_struct { |
Tao Bao | d7db594 | 2015-01-28 10:07:51 -0800 | [diff] [blame] | 75 | int cts, dsr, rng, dcd; |
Christopher Ferris | 106b3a8 | 2016-08-24 12:15:38 -0700 | [diff] [blame] | 76 | int rx, tx; |
Tao Bao | d7db594 | 2015-01-28 10:07:51 -0800 | [diff] [blame] | 77 | int frame, overrun, parity, brk; |
| 78 | int buf_overrun; |
| 79 | int reserved[9]; |
Christopher Ferris | 106b3a8 | 2016-08-24 12:15:38 -0700 | [diff] [blame] | 80 | }; |
Ben Cheng | 655a7c0 | 2013-10-16 16:09:24 -0700 | [diff] [blame] | 81 | struct serial_rs485 { |
Tao Bao | d7db594 | 2015-01-28 10:07:51 -0800 | [diff] [blame] | 82 | __u32 flags; |
Christopher Ferris | b830ddf | 2024-03-28 11:48:08 -0700 | [diff] [blame^] | 83 | #define SER_RS485_ENABLED _BITUL(0) |
| 84 | #define SER_RS485_RTS_ON_SEND _BITUL(1) |
| 85 | #define SER_RS485_RTS_AFTER_SEND _BITUL(2) |
| 86 | #define SER_RS485_RX_DURING_TX _BITUL(4) |
| 87 | #define SER_RS485_TERMINATE_BUS _BITUL(5) |
| 88 | #define SER_RS485_ADDRB _BITUL(6) |
| 89 | #define SER_RS485_ADDR_RECV _BITUL(7) |
| 90 | #define SER_RS485_ADDR_DEST _BITUL(8) |
| 91 | #define SER_RS485_MODE_RS422 _BITUL(9) |
Tao Bao | d7db594 | 2015-01-28 10:07:51 -0800 | [diff] [blame] | 92 | __u32 delay_rts_before_send; |
Christopher Ferris | 106b3a8 | 2016-08-24 12:15:38 -0700 | [diff] [blame] | 93 | __u32 delay_rts_after_send; |
Christopher Ferris | 7447a1c | 2022-10-04 18:24:44 -0700 | [diff] [blame] | 94 | union { |
| 95 | __u32 padding[5]; |
| 96 | struct { |
| 97 | __u8 addr_recv; |
| 98 | __u8 addr_dest; |
| 99 | __u8 padding0[2]; |
| 100 | __u32 padding1[4]; |
| 101 | }; |
| 102 | }; |
Ben Cheng | 655a7c0 | 2013-10-16 16:09:24 -0700 | [diff] [blame] | 103 | }; |
Christopher Ferris | 86a4837 | 2019-01-10 14:14:59 -0800 | [diff] [blame] | 104 | struct serial_iso7816 { |
| 105 | __u32 flags; |
| 106 | #define SER_ISO7816_ENABLED (1 << 0) |
| 107 | #define SER_ISO7816_T_PARAM (0x0f << 4) |
| 108 | #define SER_ISO7816_T(t) (((t) & 0x0f) << 4) |
| 109 | __u32 tg; |
| 110 | __u32 sc_fi; |
| 111 | __u32 sc_di; |
| 112 | __u32 clk; |
| 113 | __u32 reserved[5]; |
| 114 | }; |
Ben Cheng | 655a7c0 | 2013-10-16 16:09:24 -0700 | [diff] [blame] | 115 | #endif |