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Elliott Hughes180edef2023-11-02 00:08:05 +00001/*
2 * This file is auto-generated. Modifications will be lost.
3 *
4 * See https://android.googlesource.com/platform/bionic/+/master/libc/kernel/
5 * for more information.
6 */
Ben Cheng655a7c02013-10-16 16:09:24 -07007#ifndef _UAPI_LINUX_SERIAL_H
8#define _UAPI_LINUX_SERIAL_H
9#include <linux/types.h>
10#include <linux/tty_flags.h>
Ben Cheng655a7c02013-10-16 16:09:24 -070011struct serial_struct {
Tao Baod7db5942015-01-28 10:07:51 -080012 int type;
13 int line;
14 unsigned int port;
Tao Baod7db5942015-01-28 10:07:51 -080015 int irq;
16 int flags;
17 int xmit_fifo_size;
18 int custom_divisor;
Tao Baod7db5942015-01-28 10:07:51 -080019 int baud_base;
20 unsigned short close_delay;
21 char io_type;
22 char reserved_char[1];
Tao Baod7db5942015-01-28 10:07:51 -080023 int hub6;
24 unsigned short closing_wait;
25 unsigned short closing_wait2;
26 unsigned char * iomem_base;
Tao Baod7db5942015-01-28 10:07:51 -080027 unsigned short iomem_reg_shift;
28 unsigned int port_high;
29 unsigned long iomap_base;
Ben Cheng655a7c02013-10-16 16:09:24 -070030};
Ben Cheng655a7c02013-10-16 16:09:24 -070031#define ASYNC_CLOSING_WAIT_INF 0
32#define ASYNC_CLOSING_WAIT_NONE 65535
33#define PORT_UNKNOWN 0
34#define PORT_8250 1
Ben Cheng655a7c02013-10-16 16:09:24 -070035#define PORT_16450 2
36#define PORT_16550 3
37#define PORT_16550A 4
38#define PORT_CIRRUS 5
Ben Cheng655a7c02013-10-16 16:09:24 -070039#define PORT_16650 6
40#define PORT_16650V2 7
41#define PORT_16750 8
42#define PORT_STARTECH 9
Ben Cheng655a7c02013-10-16 16:09:24 -070043#define PORT_16C950 10
44#define PORT_16654 11
45#define PORT_16850 12
46#define PORT_RSA 13
Ben Cheng655a7c02013-10-16 16:09:24 -070047#define PORT_MAX 13
48#define SERIAL_IO_PORT 0
49#define SERIAL_IO_HUB6 1
50#define SERIAL_IO_MEM 2
Christopher Ferris05d08e92016-02-04 13:16:38 -080051#define SERIAL_IO_MEM32 3
52#define SERIAL_IO_AU 4
53#define SERIAL_IO_TSI 5
54#define SERIAL_IO_MEM32BE 6
Christopher Ferris106b3a82016-08-24 12:15:38 -070055#define SERIAL_IO_MEM16 7
Ben Cheng655a7c02013-10-16 16:09:24 -070056#define UART_CLEAR_FIFO 0x01
57#define UART_USE_FIFO 0x02
58#define UART_STARTECH 0x04
Christopher Ferris106b3a82016-08-24 12:15:38 -070059#define UART_NATSEMI 0x08
Ben Cheng655a7c02013-10-16 16:09:24 -070060struct serial_multiport_struct {
Tao Baod7db5942015-01-28 10:07:51 -080061 int irq;
62 int port1;
Christopher Ferris106b3a82016-08-24 12:15:38 -070063 unsigned char mask1, match1;
Tao Baod7db5942015-01-28 10:07:51 -080064 int port2;
65 unsigned char mask2, match2;
66 int port3;
Christopher Ferris106b3a82016-08-24 12:15:38 -070067 unsigned char mask3, match3;
Tao Baod7db5942015-01-28 10:07:51 -080068 int port4;
69 unsigned char mask4, match4;
70 int port_monitor;
Christopher Ferris106b3a82016-08-24 12:15:38 -070071 int reserved[32];
Ben Cheng655a7c02013-10-16 16:09:24 -070072};
73struct serial_icounter_struct {
Tao Baod7db5942015-01-28 10:07:51 -080074 int cts, dsr, rng, dcd;
Christopher Ferris106b3a82016-08-24 12:15:38 -070075 int rx, tx;
Tao Baod7db5942015-01-28 10:07:51 -080076 int frame, overrun, parity, brk;
77 int buf_overrun;
78 int reserved[9];
Christopher Ferris106b3a82016-08-24 12:15:38 -070079};
Ben Cheng655a7c02013-10-16 16:09:24 -070080struct serial_rs485 {
Tao Baod7db5942015-01-28 10:07:51 -080081 __u32 flags;
Ben Cheng655a7c02013-10-16 16:09:24 -070082#define SER_RS485_ENABLED (1 << 0)
Christopher Ferris106b3a82016-08-24 12:15:38 -070083#define SER_RS485_RTS_ON_SEND (1 << 1)
Ben Cheng655a7c02013-10-16 16:09:24 -070084#define SER_RS485_RTS_AFTER_SEND (1 << 2)
85#define SER_RS485_RX_DURING_TX (1 << 4)
Christopher Ferris1308ad32017-11-14 17:32:13 -080086#define SER_RS485_TERMINATE_BUS (1 << 5)
Christopher Ferris7447a1c2022-10-04 18:24:44 -070087#define SER_RS485_ADDRB (1 << 6)
88#define SER_RS485_ADDR_RECV (1 << 7)
89#define SER_RS485_ADDR_DEST (1 << 8)
Tao Baod7db5942015-01-28 10:07:51 -080090 __u32 delay_rts_before_send;
Christopher Ferris106b3a82016-08-24 12:15:38 -070091 __u32 delay_rts_after_send;
Christopher Ferris7447a1c2022-10-04 18:24:44 -070092 union {
93 __u32 padding[5];
94 struct {
95 __u8 addr_recv;
96 __u8 addr_dest;
97 __u8 padding0[2];
98 __u32 padding1[4];
99 };
100 };
Ben Cheng655a7c02013-10-16 16:09:24 -0700101};
Christopher Ferris86a48372019-01-10 14:14:59 -0800102struct serial_iso7816 {
103 __u32 flags;
104#define SER_ISO7816_ENABLED (1 << 0)
105#define SER_ISO7816_T_PARAM (0x0f << 4)
106#define SER_ISO7816_T(t) (((t) & 0x0f) << 4)
107 __u32 tg;
108 __u32 sc_fi;
109 __u32 sc_di;
110 __u32 clk;
111 __u32 reserved[5];
112};
Ben Cheng655a7c02013-10-16 16:09:24 -0700113#endif