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gerrit.omnirom.org / android_bionic / b82fcdaf36d6a48e56c9849f06bb5f2bc019a0b2 / . / libc / kernel / uapi / drm / lima_drm.h
blob: bd8ba9ce05be6222420d51f5245ff36d5a14ded1 [file] [log] [blame]
Christopher Ferrisaeddbcf2019-07-08 12:45:46 -0700[diff] [blame]1/****************************************************************************
2 ****************************************************************************
3 ***
4 *** This header was automatically generated from a Linux kernel header
5 *** of the same name, to make information necessary for userspace to
6 *** call into the kernel available to libc. It contains only constants,
7 *** structures, and macros generated from the original header, and thus,
8 *** contains no copyrightable information.
9 ***
10 *** To edit the content of this header, modify the corresponding
11 *** source file (e.g. under external/kernel-headers/original/) then
12 *** run bionic/libc/kernel/tools/update_all.py
13 ***
14 *** Any manual change here will be lost the next time this script will
15 *** be run. You've been warned!
16 ***
17 ****************************************************************************
18 ****************************************************************************/
19#ifndef __LIMA_DRM_H__
20#define __LIMA_DRM_H__
21#include "drm.h"
22#ifdef __cplusplus
23extern "C" {
24#endif
25enum drm_lima_param_gpu_id {
26 DRM_LIMA_PARAM_GPU_ID_UNKNOWN,
27 DRM_LIMA_PARAM_GPU_ID_MALI400,
28 DRM_LIMA_PARAM_GPU_ID_MALI450,
29};
30enum drm_lima_param {
31 DRM_LIMA_PARAM_GPU_ID,
32 DRM_LIMA_PARAM_NUM_PP,
33 DRM_LIMA_PARAM_GP_VERSION,
34 DRM_LIMA_PARAM_PP_VERSION,
35};
36struct drm_lima_get_param {
37 __u32 param;
38 __u32 pad;
39 __u64 value;
40};
Christopher Ferrisaf09c702020-06-01 20:29:29 -0700[diff] [blame]41#define LIMA_BO_FLAG_HEAP (1 << 0)
Christopher Ferrisaeddbcf2019-07-08 12:45:46 -0700[diff] [blame]42struct drm_lima_gem_create {
43 __u32 size;
44 __u32 flags;
45 __u32 handle;
46 __u32 pad;
47};
48struct drm_lima_gem_info {
49 __u32 handle;
50 __u32 va;
51 __u64 offset;
52};
53#define LIMA_SUBMIT_BO_READ 0x01
54#define LIMA_SUBMIT_BO_WRITE 0x02
55struct drm_lima_gem_submit_bo {
56 __u32 handle;
57 __u32 flags;
58};
59#define LIMA_GP_FRAME_REG_NUM 6
60struct drm_lima_gp_frame {
61 __u32 frame[LIMA_GP_FRAME_REG_NUM];
62};
63#define LIMA_PP_FRAME_REG_NUM 23
64#define LIMA_PP_WB_REG_NUM 12
65struct drm_lima_m400_pp_frame {
66 __u32 frame[LIMA_PP_FRAME_REG_NUM];
67 __u32 num_pp;
68 __u32 wb[3 * LIMA_PP_WB_REG_NUM];
69 __u32 plbu_array_address[4];
70 __u32 fragment_stack_address[4];
71};
72struct drm_lima_m450_pp_frame {
73 __u32 frame[LIMA_PP_FRAME_REG_NUM];
74 __u32 num_pp;
75 __u32 wb[3 * LIMA_PP_WB_REG_NUM];
76 __u32 use_dlbu;
77 __u32 _pad;
78 union {
79 __u32 plbu_array_address[8];
80 __u32 dlbu_regs[4];
81 };
82 __u32 fragment_stack_address[8];
83};
84#define LIMA_PIPE_GP 0x00
85#define LIMA_PIPE_PP 0x01
86#define LIMA_SUBMIT_FLAG_EXPLICIT_FENCE (1 << 0)
87struct drm_lima_gem_submit {
88 __u32 ctx;
89 __u32 pipe;
90 __u32 nr_bos;
91 __u32 frame_size;
92 __u64 bos;
93 __u64 frame;
94 __u32 flags;
95 __u32 out_sync;
96 __u32 in_sync[2];
97};
98#define LIMA_GEM_WAIT_READ 0x01
99#define LIMA_GEM_WAIT_WRITE 0x02
100struct drm_lima_gem_wait {
101 __u32 handle;
102 __u32 op;
103 __s64 timeout_ns;
104};
105struct drm_lima_ctx_create {
106 __u32 id;
107 __u32 _pad;
108};
109struct drm_lima_ctx_free {
110 __u32 id;
111 __u32 _pad;
112};
113#define DRM_LIMA_GET_PARAM 0x00
114#define DRM_LIMA_GEM_CREATE 0x01
115#define DRM_LIMA_GEM_INFO 0x02
116#define DRM_LIMA_GEM_SUBMIT 0x03
117#define DRM_LIMA_GEM_WAIT 0x04
118#define DRM_LIMA_CTX_CREATE 0x05
119#define DRM_LIMA_CTX_FREE 0x06
120#define DRM_IOCTL_LIMA_GET_PARAM DRM_IOWR(DRM_COMMAND_BASE + DRM_LIMA_GET_PARAM, struct drm_lima_get_param)
121#define DRM_IOCTL_LIMA_GEM_CREATE DRM_IOWR(DRM_COMMAND_BASE + DRM_LIMA_GEM_CREATE, struct drm_lima_gem_create)
122#define DRM_IOCTL_LIMA_GEM_INFO DRM_IOWR(DRM_COMMAND_BASE + DRM_LIMA_GEM_INFO, struct drm_lima_gem_info)
123#define DRM_IOCTL_LIMA_GEM_SUBMIT DRM_IOW(DRM_COMMAND_BASE + DRM_LIMA_GEM_SUBMIT, struct drm_lima_gem_submit)
124#define DRM_IOCTL_LIMA_GEM_WAIT DRM_IOW(DRM_COMMAND_BASE + DRM_LIMA_GEM_WAIT, struct drm_lima_gem_wait)
125#define DRM_IOCTL_LIMA_CTX_CREATE DRM_IOR(DRM_COMMAND_BASE + DRM_LIMA_CTX_CREATE, struct drm_lima_ctx_create)
126#define DRM_IOCTL_LIMA_CTX_FREE DRM_IOW(DRM_COMMAND_BASE + DRM_LIMA_CTX_FREE, struct drm_lima_ctx_free)
127#ifdef __cplusplus
128}
129#endif
130#endif