Christopher Ferris | 48af7cb | 2017-02-21 12:35:09 -0800 | [diff] [blame] | 1 | /**************************************************************************** |
| 2 | **************************************************************************** |
| 3 | *** |
| 4 | *** This header was automatically generated from a Linux kernel header |
| 5 | *** of the same name, to make information necessary for userspace to |
| 6 | *** call into the kernel available to libc. It contains only constants, |
| 7 | *** structures, and macros generated from the original header, and thus, |
| 8 | *** contains no copyrightable information. |
| 9 | *** |
| 10 | *** To edit the content of this header, modify the corresponding |
| 11 | *** source file (e.g. under external/kernel-headers/original/) then |
| 12 | *** run bionic/libc/kernel/tools/update_all.py |
| 13 | *** |
| 14 | *** Any manual change here will be lost the next time this script will |
| 15 | *** be run. You've been warned! |
| 16 | *** |
| 17 | **************************************************************************** |
| 18 | ****************************************************************************/ |
| 19 | #ifndef __VMW_PVRDMA_ABI_H__ |
| 20 | #define __VMW_PVRDMA_ABI_H__ |
| 21 | #include <linux/types.h> |
| 22 | #define PVRDMA_UVERBS_ABI_VERSION 3 |
Christopher Ferris | 48af7cb | 2017-02-21 12:35:09 -0800 | [diff] [blame] | 23 | #define PVRDMA_UAR_HANDLE_MASK 0x00FFFFFF |
| 24 | #define PVRDMA_UAR_QP_OFFSET 0 |
| 25 | #define PVRDMA_UAR_QP_SEND BIT(30) |
| 26 | #define PVRDMA_UAR_QP_RECV BIT(31) |
Christopher Ferris | 48af7cb | 2017-02-21 12:35:09 -0800 | [diff] [blame] | 27 | #define PVRDMA_UAR_CQ_OFFSET 4 |
| 28 | #define PVRDMA_UAR_CQ_ARM_SOL BIT(29) |
| 29 | #define PVRDMA_UAR_CQ_ARM BIT(30) |
| 30 | #define PVRDMA_UAR_CQ_POLL BIT(31) |
Christopher Ferris | 48af7cb | 2017-02-21 12:35:09 -0800 | [diff] [blame] | 31 | enum pvrdma_wr_opcode { |
| 32 | PVRDMA_WR_RDMA_WRITE, |
| 33 | PVRDMA_WR_RDMA_WRITE_WITH_IMM, |
| 34 | PVRDMA_WR_SEND, |
Christopher Ferris | 48af7cb | 2017-02-21 12:35:09 -0800 | [diff] [blame] | 35 | PVRDMA_WR_SEND_WITH_IMM, |
| 36 | PVRDMA_WR_RDMA_READ, |
| 37 | PVRDMA_WR_ATOMIC_CMP_AND_SWP, |
| 38 | PVRDMA_WR_ATOMIC_FETCH_AND_ADD, |
Christopher Ferris | 48af7cb | 2017-02-21 12:35:09 -0800 | [diff] [blame] | 39 | PVRDMA_WR_LSO, |
| 40 | PVRDMA_WR_SEND_WITH_INV, |
| 41 | PVRDMA_WR_RDMA_READ_WITH_INV, |
| 42 | PVRDMA_WR_LOCAL_INV, |
Christopher Ferris | 48af7cb | 2017-02-21 12:35:09 -0800 | [diff] [blame] | 43 | PVRDMA_WR_FAST_REG_MR, |
| 44 | PVRDMA_WR_MASKED_ATOMIC_CMP_AND_SWP, |
| 45 | PVRDMA_WR_MASKED_ATOMIC_FETCH_AND_ADD, |
| 46 | PVRDMA_WR_BIND_MW, |
Christopher Ferris | 48af7cb | 2017-02-21 12:35:09 -0800 | [diff] [blame] | 47 | PVRDMA_WR_REG_SIG_MR, |
| 48 | }; |
| 49 | enum pvrdma_wc_status { |
| 50 | PVRDMA_WC_SUCCESS, |
Christopher Ferris | 48af7cb | 2017-02-21 12:35:09 -0800 | [diff] [blame] | 51 | PVRDMA_WC_LOC_LEN_ERR, |
| 52 | PVRDMA_WC_LOC_QP_OP_ERR, |
| 53 | PVRDMA_WC_LOC_EEC_OP_ERR, |
| 54 | PVRDMA_WC_LOC_PROT_ERR, |
Christopher Ferris | 48af7cb | 2017-02-21 12:35:09 -0800 | [diff] [blame] | 55 | PVRDMA_WC_WR_FLUSH_ERR, |
| 56 | PVRDMA_WC_MW_BIND_ERR, |
| 57 | PVRDMA_WC_BAD_RESP_ERR, |
| 58 | PVRDMA_WC_LOC_ACCESS_ERR, |
Christopher Ferris | 48af7cb | 2017-02-21 12:35:09 -0800 | [diff] [blame] | 59 | PVRDMA_WC_REM_INV_REQ_ERR, |
| 60 | PVRDMA_WC_REM_ACCESS_ERR, |
| 61 | PVRDMA_WC_REM_OP_ERR, |
| 62 | PVRDMA_WC_RETRY_EXC_ERR, |
Christopher Ferris | 48af7cb | 2017-02-21 12:35:09 -0800 | [diff] [blame] | 63 | PVRDMA_WC_RNR_RETRY_EXC_ERR, |
| 64 | PVRDMA_WC_LOC_RDD_VIOL_ERR, |
| 65 | PVRDMA_WC_REM_INV_RD_REQ_ERR, |
| 66 | PVRDMA_WC_REM_ABORT_ERR, |
Christopher Ferris | 48af7cb | 2017-02-21 12:35:09 -0800 | [diff] [blame] | 67 | PVRDMA_WC_INV_EECN_ERR, |
| 68 | PVRDMA_WC_INV_EEC_STATE_ERR, |
| 69 | PVRDMA_WC_FATAL_ERR, |
| 70 | PVRDMA_WC_RESP_TIMEOUT_ERR, |
Christopher Ferris | 48af7cb | 2017-02-21 12:35:09 -0800 | [diff] [blame] | 71 | PVRDMA_WC_GENERAL_ERR, |
| 72 | }; |
| 73 | enum pvrdma_wc_opcode { |
| 74 | PVRDMA_WC_SEND, |
Christopher Ferris | 48af7cb | 2017-02-21 12:35:09 -0800 | [diff] [blame] | 75 | PVRDMA_WC_RDMA_WRITE, |
| 76 | PVRDMA_WC_RDMA_READ, |
| 77 | PVRDMA_WC_COMP_SWAP, |
| 78 | PVRDMA_WC_FETCH_ADD, |
Christopher Ferris | 48af7cb | 2017-02-21 12:35:09 -0800 | [diff] [blame] | 79 | PVRDMA_WC_BIND_MW, |
| 80 | PVRDMA_WC_LSO, |
| 81 | PVRDMA_WC_LOCAL_INV, |
| 82 | PVRDMA_WC_FAST_REG_MR, |
Christopher Ferris | 48af7cb | 2017-02-21 12:35:09 -0800 | [diff] [blame] | 83 | PVRDMA_WC_MASKED_COMP_SWAP, |
| 84 | PVRDMA_WC_MASKED_FETCH_ADD, |
| 85 | PVRDMA_WC_RECV = 1 << 7, |
| 86 | PVRDMA_WC_RECV_RDMA_WITH_IMM, |
Christopher Ferris | 48af7cb | 2017-02-21 12:35:09 -0800 | [diff] [blame] | 87 | }; |
| 88 | enum pvrdma_wc_flags { |
| 89 | PVRDMA_WC_GRH = 1 << 0, |
| 90 | PVRDMA_WC_WITH_IMM = 1 << 1, |
Christopher Ferris | 48af7cb | 2017-02-21 12:35:09 -0800 | [diff] [blame] | 91 | PVRDMA_WC_WITH_INVALIDATE = 1 << 2, |
| 92 | PVRDMA_WC_IP_CSUM_OK = 1 << 3, |
| 93 | PVRDMA_WC_WITH_SMAC = 1 << 4, |
| 94 | PVRDMA_WC_WITH_VLAN = 1 << 5, |
Christopher Ferris | 1308ad3 | 2017-11-14 17:32:13 -0800 | [diff] [blame] | 95 | PVRDMA_WC_WITH_NETWORK_HDR_TYPE = 1 << 6, |
| 96 | PVRDMA_WC_FLAGS_MAX = PVRDMA_WC_WITH_NETWORK_HDR_TYPE, |
Christopher Ferris | 48af7cb | 2017-02-21 12:35:09 -0800 | [diff] [blame] | 97 | }; |
| 98 | struct pvrdma_alloc_ucontext_resp { |
| 99 | __u32 qp_tab_size; |
Christopher Ferris | 48af7cb | 2017-02-21 12:35:09 -0800 | [diff] [blame] | 100 | __u32 reserved; |
| 101 | }; |
| 102 | struct pvrdma_alloc_pd_resp { |
| 103 | __u32 pdn; |
Christopher Ferris | 48af7cb | 2017-02-21 12:35:09 -0800 | [diff] [blame] | 104 | __u32 reserved; |
| 105 | }; |
| 106 | struct pvrdma_create_cq { |
| 107 | __u64 buf_addr; |
Christopher Ferris | 48af7cb | 2017-02-21 12:35:09 -0800 | [diff] [blame] | 108 | __u32 buf_size; |
| 109 | __u32 reserved; |
| 110 | }; |
| 111 | struct pvrdma_create_cq_resp { |
Christopher Ferris | 48af7cb | 2017-02-21 12:35:09 -0800 | [diff] [blame] | 112 | __u32 cqn; |
| 113 | __u32 reserved; |
| 114 | }; |
| 115 | struct pvrdma_resize_cq { |
Christopher Ferris | 48af7cb | 2017-02-21 12:35:09 -0800 | [diff] [blame] | 116 | __u64 buf_addr; |
| 117 | __u32 buf_size; |
| 118 | __u32 reserved; |
| 119 | }; |
Christopher Ferris | 48af7cb | 2017-02-21 12:35:09 -0800 | [diff] [blame] | 120 | struct pvrdma_create_srq { |
| 121 | __u64 buf_addr; |
Christopher Ferris | 934ec94 | 2018-01-31 15:29:16 -0800 | [diff] [blame^] | 122 | __u32 buf_size; |
| 123 | __u32 reserved; |
Christopher Ferris | 48af7cb | 2017-02-21 12:35:09 -0800 | [diff] [blame] | 124 | }; |
| 125 | struct pvrdma_create_srq_resp { |
Christopher Ferris | 48af7cb | 2017-02-21 12:35:09 -0800 | [diff] [blame] | 126 | __u32 srqn; |
| 127 | __u32 reserved; |
| 128 | }; |
| 129 | struct pvrdma_create_qp { |
Christopher Ferris | 48af7cb | 2017-02-21 12:35:09 -0800 | [diff] [blame] | 130 | __u64 rbuf_addr; |
| 131 | __u64 sbuf_addr; |
| 132 | __u32 rbuf_size; |
| 133 | __u32 sbuf_size; |
Christopher Ferris | 48af7cb | 2017-02-21 12:35:09 -0800 | [diff] [blame] | 134 | __u64 qp_addr; |
| 135 | }; |
| 136 | struct pvrdma_ex_cmp_swap { |
| 137 | __u64 swap_val; |
Christopher Ferris | 48af7cb | 2017-02-21 12:35:09 -0800 | [diff] [blame] | 138 | __u64 compare_val; |
| 139 | __u64 swap_mask; |
| 140 | __u64 compare_mask; |
| 141 | }; |
Christopher Ferris | 48af7cb | 2017-02-21 12:35:09 -0800 | [diff] [blame] | 142 | struct pvrdma_ex_fetch_add { |
| 143 | __u64 add_val; |
| 144 | __u64 field_boundary; |
| 145 | }; |
Christopher Ferris | 48af7cb | 2017-02-21 12:35:09 -0800 | [diff] [blame] | 146 | struct pvrdma_av { |
| 147 | __u32 port_pd; |
| 148 | __u32 sl_tclass_flowlabel; |
| 149 | __u8 dgid[16]; |
Christopher Ferris | 48af7cb | 2017-02-21 12:35:09 -0800 | [diff] [blame] | 150 | __u8 src_path_bits; |
| 151 | __u8 gid_index; |
| 152 | __u8 stat_rate; |
| 153 | __u8 hop_limit; |
Christopher Ferris | 48af7cb | 2017-02-21 12:35:09 -0800 | [diff] [blame] | 154 | __u8 dmac[6]; |
| 155 | __u8 reserved[6]; |
| 156 | }; |
| 157 | struct pvrdma_sge { |
Christopher Ferris | 48af7cb | 2017-02-21 12:35:09 -0800 | [diff] [blame] | 158 | __u64 addr; |
| 159 | __u32 length; |
| 160 | __u32 lkey; |
| 161 | }; |
Christopher Ferris | 48af7cb | 2017-02-21 12:35:09 -0800 | [diff] [blame] | 162 | struct pvrdma_rq_wqe_hdr { |
| 163 | __u64 wr_id; |
| 164 | __u32 num_sge; |
| 165 | __u32 total_len; |
Christopher Ferris | 48af7cb | 2017-02-21 12:35:09 -0800 | [diff] [blame] | 166 | }; |
| 167 | struct pvrdma_sq_wqe_hdr { |
| 168 | __u64 wr_id; |
| 169 | __u32 num_sge; |
Christopher Ferris | 48af7cb | 2017-02-21 12:35:09 -0800 | [diff] [blame] | 170 | __u32 total_len; |
| 171 | __u32 opcode; |
| 172 | __u32 send_flags; |
| 173 | union { |
Christopher Ferris | 525ce91 | 2017-07-26 13:12:53 -0700 | [diff] [blame] | 174 | __be32 imm_data; |
Christopher Ferris | 48af7cb | 2017-02-21 12:35:09 -0800 | [diff] [blame] | 175 | __u32 invalidate_rkey; |
| 176 | } ex; |
| 177 | __u32 reserved; |
Christopher Ferris | 48af7cb | 2017-02-21 12:35:09 -0800 | [diff] [blame] | 178 | union { |
| 179 | struct { |
| 180 | __u64 remote_addr; |
| 181 | __u32 rkey; |
Christopher Ferris | 48af7cb | 2017-02-21 12:35:09 -0800 | [diff] [blame] | 182 | __u8 reserved[4]; |
| 183 | } rdma; |
| 184 | struct { |
| 185 | __u64 remote_addr; |
Christopher Ferris | 48af7cb | 2017-02-21 12:35:09 -0800 | [diff] [blame] | 186 | __u64 compare_add; |
| 187 | __u64 swap; |
| 188 | __u32 rkey; |
| 189 | __u32 reserved; |
Christopher Ferris | 48af7cb | 2017-02-21 12:35:09 -0800 | [diff] [blame] | 190 | } atomic; |
| 191 | struct { |
| 192 | __u64 remote_addr; |
| 193 | __u32 log_arg_sz; |
Christopher Ferris | 48af7cb | 2017-02-21 12:35:09 -0800 | [diff] [blame] | 194 | __u32 rkey; |
| 195 | union { |
| 196 | struct pvrdma_ex_cmp_swap cmp_swap; |
| 197 | struct pvrdma_ex_fetch_add fetch_add; |
Christopher Ferris | 48af7cb | 2017-02-21 12:35:09 -0800 | [diff] [blame] | 198 | } wr_data; |
| 199 | } masked_atomics; |
| 200 | struct { |
| 201 | __u64 iova_start; |
Christopher Ferris | 48af7cb | 2017-02-21 12:35:09 -0800 | [diff] [blame] | 202 | __u64 pl_pdir_dma; |
| 203 | __u32 page_shift; |
| 204 | __u32 page_list_len; |
| 205 | __u32 length; |
Christopher Ferris | 48af7cb | 2017-02-21 12:35:09 -0800 | [diff] [blame] | 206 | __u32 access_flags; |
| 207 | __u32 rkey; |
| 208 | } fast_reg; |
| 209 | struct { |
Christopher Ferris | 48af7cb | 2017-02-21 12:35:09 -0800 | [diff] [blame] | 210 | __u32 remote_qpn; |
| 211 | __u32 remote_qkey; |
| 212 | struct pvrdma_av av; |
| 213 | } ud; |
Christopher Ferris | 48af7cb | 2017-02-21 12:35:09 -0800 | [diff] [blame] | 214 | } wr; |
| 215 | }; |
| 216 | struct pvrdma_cqe { |
| 217 | __u64 wr_id; |
Christopher Ferris | 48af7cb | 2017-02-21 12:35:09 -0800 | [diff] [blame] | 218 | __u64 qp; |
| 219 | __u32 opcode; |
| 220 | __u32 status; |
| 221 | __u32 byte_len; |
Christopher Ferris | 525ce91 | 2017-07-26 13:12:53 -0700 | [diff] [blame] | 222 | __be32 imm_data; |
Christopher Ferris | 48af7cb | 2017-02-21 12:35:09 -0800 | [diff] [blame] | 223 | __u32 src_qp; |
| 224 | __u32 wc_flags; |
| 225 | __u32 vendor_err; |
Christopher Ferris | 48af7cb | 2017-02-21 12:35:09 -0800 | [diff] [blame] | 226 | __u16 pkey_index; |
| 227 | __u16 slid; |
| 228 | __u8 sl; |
| 229 | __u8 dlid_path_bits; |
Christopher Ferris | 48af7cb | 2017-02-21 12:35:09 -0800 | [diff] [blame] | 230 | __u8 port_num; |
| 231 | __u8 smac[6]; |
Christopher Ferris | 1308ad3 | 2017-11-14 17:32:13 -0800 | [diff] [blame] | 232 | __u8 network_hdr_type; |
| 233 | __u8 reserved2[6]; |
Christopher Ferris | 48af7cb | 2017-02-21 12:35:09 -0800 | [diff] [blame] | 234 | }; |
Christopher Ferris | 48af7cb | 2017-02-21 12:35:09 -0800 | [diff] [blame] | 235 | #endif |