blob: 8865911b837d6facc3fd53d99d5bf73c155deccf [file] [log] [blame]
Christopher Ferris9ce28842018-10-25 12:11:39 -07001/****************************************************************************
2 ****************************************************************************
3 ***
4 *** This header was automatically generated from a Linux kernel header
5 *** of the same name, to make information necessary for userspace to
6 *** call into the kernel available to libc. It contains only constants,
7 *** structures, and macros generated from the original header, and thus,
8 *** contains no copyrightable information.
9 ***
10 *** To edit the content of this header, modify the corresponding
11 *** source file (e.g. under external/kernel-headers/original/) then
12 *** run bionic/libc/kernel/tools/update_all.py
13 ***
14 *** Any manual change here will be lost the next time this script will
15 *** be run. You've been warned!
16 ***
17 ****************************************************************************
18 ****************************************************************************/
19#ifndef _V3D_DRM_H_
20#define _V3D_DRM_H_
21#include "drm.h"
22#ifdef __cplusplus
Christopher Ferris48fe0ae2019-01-10 15:59:33 -080023extern "C" {
Christopher Ferris9ce28842018-10-25 12:11:39 -070024#endif
25#define DRM_V3D_SUBMIT_CL 0x00
26#define DRM_V3D_WAIT_BO 0x01
27#define DRM_V3D_CREATE_BO 0x02
28#define DRM_V3D_MMAP_BO 0x03
29#define DRM_V3D_GET_PARAM 0x04
30#define DRM_V3D_GET_BO_OFFSET 0x05
31#define DRM_IOCTL_V3D_SUBMIT_CL DRM_IOWR(DRM_COMMAND_BASE + DRM_V3D_SUBMIT_CL, struct drm_v3d_submit_cl)
32#define DRM_IOCTL_V3D_WAIT_BO DRM_IOWR(DRM_COMMAND_BASE + DRM_V3D_WAIT_BO, struct drm_v3d_wait_bo)
33#define DRM_IOCTL_V3D_CREATE_BO DRM_IOWR(DRM_COMMAND_BASE + DRM_V3D_CREATE_BO, struct drm_v3d_create_bo)
34#define DRM_IOCTL_V3D_MMAP_BO DRM_IOWR(DRM_COMMAND_BASE + DRM_V3D_MMAP_BO, struct drm_v3d_mmap_bo)
35#define DRM_IOCTL_V3D_GET_PARAM DRM_IOWR(DRM_COMMAND_BASE + DRM_V3D_GET_PARAM, struct drm_v3d_get_param)
36#define DRM_IOCTL_V3D_GET_BO_OFFSET DRM_IOWR(DRM_COMMAND_BASE + DRM_V3D_GET_BO_OFFSET, struct drm_v3d_get_bo_offset)
37struct drm_v3d_submit_cl {
38 __u32 bcl_start;
39 __u32 bcl_end;
40 __u32 rcl_start;
41 __u32 rcl_end;
42 __u32 in_sync_bcl;
43 __u32 in_sync_rcl;
44 __u32 out_sync;
45 __u32 qma;
46 __u32 qms;
47 __u32 qts;
48 __u64 bo_handles;
49 __u32 bo_handle_count;
50 __u32 pad;
51};
52struct drm_v3d_wait_bo {
53 __u32 handle;
54 __u32 pad;
55 __u64 timeout_ns;
56};
57struct drm_v3d_create_bo {
58 __u32 size;
59 __u32 flags;
60 __u32 handle;
61 __u32 offset;
62};
63struct drm_v3d_mmap_bo {
64 __u32 handle;
65 __u32 flags;
66 __u64 offset;
67};
68enum drm_v3d_param {
69 DRM_V3D_PARAM_V3D_UIFCFG,
70 DRM_V3D_PARAM_V3D_HUB_IDENT1,
71 DRM_V3D_PARAM_V3D_HUB_IDENT2,
72 DRM_V3D_PARAM_V3D_HUB_IDENT3,
73 DRM_V3D_PARAM_V3D_CORE0_IDENT0,
74 DRM_V3D_PARAM_V3D_CORE0_IDENT1,
75 DRM_V3D_PARAM_V3D_CORE0_IDENT2,
76};
77struct drm_v3d_get_param {
78 __u32 param;
79 __u32 pad;
80 __u64 value;
81};
82struct drm_v3d_get_bo_offset {
83 __u32 handle;
84 __u32 offset;
85};
86#ifdef __cplusplus
Christopher Ferris48fe0ae2019-01-10 15:59:33 -080087}
Christopher Ferris9ce28842018-10-25 12:11:39 -070088#endif
89#endif