blob: ef64ed712f85207415c0cc6bb2f65e411364a5a8 [file] [log] [blame]
Ben Cheng655a7c02013-10-16 16:09:24 -07001/****************************************************************************
2 ****************************************************************************
3 ***
4 *** This header was automatically generated from a Linux kernel header
5 *** of the same name, to make information necessary for userspace to
6 *** call into the kernel available to libc. It contains only constants,
7 *** structures, and macros generated from the original header, and thus,
8 *** contains no copyrightable information.
9 ***
10 *** To edit the content of this header, modify the corresponding
11 *** source file (e.g. under external/kernel-headers/original/) then
12 *** run bionic/libc/kernel/tools/update_all.py
13 ***
14 *** Any manual change here will be lost the next time this script will
15 *** be run. You've been warned!
16 ***
17 ****************************************************************************
18 ****************************************************************************/
19#ifndef _DRM_H_
20#define _DRM_H_
21#ifdef __linux__
22#include <linux/types.h>
Ben Cheng655a7c02013-10-16 16:09:24 -070023#include <asm/ioctl.h>
24typedef unsigned int drm_handle_t;
25#else
26#include <sys/ioccom.h>
Ben Cheng655a7c02013-10-16 16:09:24 -070027#include <sys/types.h>
28typedef int8_t __s8;
29typedef uint8_t __u8;
30typedef int16_t __s16;
Ben Cheng655a7c02013-10-16 16:09:24 -070031typedef uint16_t __u16;
32typedef int32_t __s32;
33typedef uint32_t __u32;
34typedef int64_t __s64;
Ben Cheng655a7c02013-10-16 16:09:24 -070035typedef uint64_t __u64;
Christopher Ferris106b3a82016-08-24 12:15:38 -070036typedef size_t __kernel_size_t;
Ben Cheng655a7c02013-10-16 16:09:24 -070037typedef unsigned long drm_handle_t;
38#endif
Christopher Ferris106b3a82016-08-24 12:15:38 -070039#ifdef __cplusplus
Christopher Ferris48fe0ae2019-01-10 15:59:33 -080040extern "C" {
Christopher Ferris106b3a82016-08-24 12:15:38 -070041#endif
42#define DRM_NAME "drm"
Ben Cheng655a7c02013-10-16 16:09:24 -070043#define DRM_MIN_ORDER 5
44#define DRM_MAX_ORDER 22
45#define DRM_RAM_PERCENT 10
46#define _DRM_LOCK_HELD 0x80000000U
Ben Cheng655a7c02013-10-16 16:09:24 -070047#define _DRM_LOCK_CONT 0x40000000U
48#define _DRM_LOCK_IS_HELD(lock) ((lock) & _DRM_LOCK_HELD)
49#define _DRM_LOCK_IS_CONT(lock) ((lock) & _DRM_LOCK_CONT)
Tao Baod7db5942015-01-28 10:07:51 -080050#define _DRM_LOCKING_CONTEXT(lock) ((lock) & ~(_DRM_LOCK_HELD | _DRM_LOCK_CONT))
Ben Cheng655a7c02013-10-16 16:09:24 -070051typedef unsigned int drm_context_t;
52typedef unsigned int drm_drawable_t;
53typedef unsigned int drm_magic_t;
54struct drm_clip_rect {
Tao Baod7db5942015-01-28 10:07:51 -080055 unsigned short x1;
56 unsigned short y1;
57 unsigned short x2;
58 unsigned short y2;
Ben Cheng655a7c02013-10-16 16:09:24 -070059};
60struct drm_drawable_info {
Tao Baod7db5942015-01-28 10:07:51 -080061 unsigned int num_rects;
62 struct drm_clip_rect * rects;
Ben Cheng655a7c02013-10-16 16:09:24 -070063};
64struct drm_tex_region {
Tao Baod7db5942015-01-28 10:07:51 -080065 unsigned char next;
66 unsigned char prev;
Tao Baod7db5942015-01-28 10:07:51 -080067 unsigned char in_use;
68 unsigned char padding;
69 unsigned int age;
Ben Cheng655a7c02013-10-16 16:09:24 -070070};
Ben Cheng655a7c02013-10-16 16:09:24 -070071struct drm_hw_lock {
Tao Baod7db5942015-01-28 10:07:51 -080072 __volatile__ unsigned int lock;
73 char padding[60];
Ben Cheng655a7c02013-10-16 16:09:24 -070074};
Ben Cheng655a7c02013-10-16 16:09:24 -070075struct drm_version {
Tao Baod7db5942015-01-28 10:07:51 -080076 int version_major;
77 int version_minor;
78 int version_patchlevel;
Christopher Ferris106b3a82016-08-24 12:15:38 -070079 __kernel_size_t name_len;
Tao Baod7db5942015-01-28 10:07:51 -080080 char __user * name;
Christopher Ferris106b3a82016-08-24 12:15:38 -070081 __kernel_size_t date_len;
Tao Baod7db5942015-01-28 10:07:51 -080082 char __user * date;
Christopher Ferris106b3a82016-08-24 12:15:38 -070083 __kernel_size_t desc_len;
Tao Baod7db5942015-01-28 10:07:51 -080084 char __user * desc;
Ben Cheng655a7c02013-10-16 16:09:24 -070085};
86struct drm_unique {
Christopher Ferris106b3a82016-08-24 12:15:38 -070087 __kernel_size_t unique_len;
Tao Baod7db5942015-01-28 10:07:51 -080088 char __user * unique;
Ben Cheng655a7c02013-10-16 16:09:24 -070089};
90struct drm_list {
Tao Baod7db5942015-01-28 10:07:51 -080091 int count;
92 struct drm_version __user * version;
Ben Cheng655a7c02013-10-16 16:09:24 -070093};
94struct drm_block {
Tao Baod7db5942015-01-28 10:07:51 -080095 int unused;
Ben Cheng655a7c02013-10-16 16:09:24 -070096};
97struct drm_control {
Tao Baod7db5942015-01-28 10:07:51 -080098 enum {
Tao Baod7db5942015-01-28 10:07:51 -080099 DRM_ADD_COMMAND,
100 DRM_RM_COMMAND,
101 DRM_INST_HANDLER,
102 DRM_UNINST_HANDLER
Tao Baod7db5942015-01-28 10:07:51 -0800103 } func;
104 int irq;
Ben Cheng655a7c02013-10-16 16:09:24 -0700105};
106enum drm_map_type {
Tao Baod7db5942015-01-28 10:07:51 -0800107 _DRM_FRAME_BUFFER = 0,
108 _DRM_REGISTERS = 1,
109 _DRM_SHM = 2,
110 _DRM_AGP = 3,
Tao Baod7db5942015-01-28 10:07:51 -0800111 _DRM_SCATTER_GATHER = 4,
Christopher Ferris106b3a82016-08-24 12:15:38 -0700112 _DRM_CONSISTENT = 5
Ben Cheng655a7c02013-10-16 16:09:24 -0700113};
Ben Cheng655a7c02013-10-16 16:09:24 -0700114enum drm_map_flags {
Tao Baod7db5942015-01-28 10:07:51 -0800115 _DRM_RESTRICTED = 0x01,
116 _DRM_READ_ONLY = 0x02,
117 _DRM_LOCKED = 0x04,
118 _DRM_KERNEL = 0x08,
Tao Baod7db5942015-01-28 10:07:51 -0800119 _DRM_WRITE_COMBINING = 0x10,
120 _DRM_CONTAINS_LOCK = 0x20,
121 _DRM_REMOVABLE = 0x40,
122 _DRM_DRIVER = 0x80
Ben Cheng655a7c02013-10-16 16:09:24 -0700123};
124struct drm_ctx_priv_map {
Tao Baod7db5942015-01-28 10:07:51 -0800125 unsigned int ctx_id;
126 void * handle;
Ben Cheng655a7c02013-10-16 16:09:24 -0700127};
128struct drm_map {
Tao Baod7db5942015-01-28 10:07:51 -0800129 unsigned long offset;
130 unsigned long size;
Tao Baod7db5942015-01-28 10:07:51 -0800131 enum drm_map_type type;
132 enum drm_map_flags flags;
133 void * handle;
134 int mtrr;
Ben Cheng655a7c02013-10-16 16:09:24 -0700135};
136struct drm_client {
Tao Baod7db5942015-01-28 10:07:51 -0800137 int idx;
138 int auth;
Tao Baod7db5942015-01-28 10:07:51 -0800139 unsigned long pid;
140 unsigned long uid;
141 unsigned long magic;
142 unsigned long iocs;
Ben Cheng655a7c02013-10-16 16:09:24 -0700143};
144enum drm_stat_type {
Tao Baod7db5942015-01-28 10:07:51 -0800145 _DRM_STAT_LOCK,
146 _DRM_STAT_OPENS,
Tao Baod7db5942015-01-28 10:07:51 -0800147 _DRM_STAT_CLOSES,
148 _DRM_STAT_IOCTLS,
149 _DRM_STAT_LOCKS,
150 _DRM_STAT_UNLOCKS,
Tao Baod7db5942015-01-28 10:07:51 -0800151 _DRM_STAT_VALUE,
152 _DRM_STAT_BYTE,
153 _DRM_STAT_COUNT,
154 _DRM_STAT_IRQ,
Tao Baod7db5942015-01-28 10:07:51 -0800155 _DRM_STAT_PRIMARY,
156 _DRM_STAT_SECONDARY,
157 _DRM_STAT_DMA,
158 _DRM_STAT_SPECIAL,
Tao Baod7db5942015-01-28 10:07:51 -0800159 _DRM_STAT_MISSED
Ben Cheng655a7c02013-10-16 16:09:24 -0700160};
161struct drm_stats {
Tao Baod7db5942015-01-28 10:07:51 -0800162 unsigned long count;
Tao Baod7db5942015-01-28 10:07:51 -0800163 struct {
164 unsigned long value;
165 enum drm_stat_type type;
166 } data[15];
Ben Cheng655a7c02013-10-16 16:09:24 -0700167};
168enum drm_lock_flags {
Tao Baod7db5942015-01-28 10:07:51 -0800169 _DRM_LOCK_READY = 0x01,
170 _DRM_LOCK_QUIESCENT = 0x02,
Tao Baod7db5942015-01-28 10:07:51 -0800171 _DRM_LOCK_FLUSH = 0x04,
172 _DRM_LOCK_FLUSH_ALL = 0x08,
173 _DRM_HALT_ALL_QUEUES = 0x10,
174 _DRM_HALT_CUR_QUEUES = 0x20
Ben Cheng655a7c02013-10-16 16:09:24 -0700175};
176struct drm_lock {
Tao Baod7db5942015-01-28 10:07:51 -0800177 int context;
178 enum drm_lock_flags flags;
Ben Cheng655a7c02013-10-16 16:09:24 -0700179};
180enum drm_dma_flags {
Tao Baod7db5942015-01-28 10:07:51 -0800181 _DRM_DMA_BLOCK = 0x01,
182 _DRM_DMA_WHILE_LOCKED = 0x02,
Tao Baod7db5942015-01-28 10:07:51 -0800183 _DRM_DMA_PRIORITY = 0x04,
184 _DRM_DMA_WAIT = 0x10,
185 _DRM_DMA_SMALLER_OK = 0x20,
186 _DRM_DMA_LARGER_OK = 0x40
Ben Cheng655a7c02013-10-16 16:09:24 -0700187};
188struct drm_buf_desc {
Tao Baod7db5942015-01-28 10:07:51 -0800189 int count;
190 int size;
Tao Baod7db5942015-01-28 10:07:51 -0800191 int low_mark;
192 int high_mark;
193 enum {
194 _DRM_PAGE_ALIGN = 0x01,
Tao Baod7db5942015-01-28 10:07:51 -0800195 _DRM_AGP_BUFFER = 0x02,
196 _DRM_SG_BUFFER = 0x04,
197 _DRM_FB_BUFFER = 0x08,
198 _DRM_PCI_BUFFER_RO = 0x10
Tao Baod7db5942015-01-28 10:07:51 -0800199 } flags;
200 unsigned long agp_start;
Ben Cheng655a7c02013-10-16 16:09:24 -0700201};
Ben Cheng655a7c02013-10-16 16:09:24 -0700202struct drm_buf_info {
Tao Baod7db5942015-01-28 10:07:51 -0800203 int count;
204 struct drm_buf_desc __user * list;
Ben Cheng655a7c02013-10-16 16:09:24 -0700205};
Ben Cheng655a7c02013-10-16 16:09:24 -0700206struct drm_buf_free {
Tao Baod7db5942015-01-28 10:07:51 -0800207 int count;
208 int __user * list;
Ben Cheng655a7c02013-10-16 16:09:24 -0700209};
Ben Cheng655a7c02013-10-16 16:09:24 -0700210struct drm_buf_pub {
Tao Baod7db5942015-01-28 10:07:51 -0800211 int idx;
212 int total;
213 int used;
214 void __user * address;
Ben Cheng655a7c02013-10-16 16:09:24 -0700215};
216struct drm_buf_map {
Tao Baod7db5942015-01-28 10:07:51 -0800217 int count;
Christopher Ferris106b3a82016-08-24 12:15:38 -0700218#ifdef __cplusplus
219 void __user * virt;
Christopher Ferris106b3a82016-08-24 12:15:38 -0700220#else
221 void __user * __linux_virtual;
222#endif
Tao Baod7db5942015-01-28 10:07:51 -0800223 struct drm_buf_pub __user * list;
Ben Cheng655a7c02013-10-16 16:09:24 -0700224};
225struct drm_dma {
Tao Baod7db5942015-01-28 10:07:51 -0800226 int context;
Tao Baod7db5942015-01-28 10:07:51 -0800227 int send_count;
228 int __user * send_indices;
229 int __user * send_sizes;
230 enum drm_dma_flags flags;
Tao Baod7db5942015-01-28 10:07:51 -0800231 int request_count;
232 int request_size;
233 int __user * request_indices;
234 int __user * request_sizes;
Tao Baod7db5942015-01-28 10:07:51 -0800235 int granted_count;
Ben Cheng655a7c02013-10-16 16:09:24 -0700236};
237enum drm_ctx_flags {
Tao Baod7db5942015-01-28 10:07:51 -0800238 _DRM_CONTEXT_PRESERVED = 0x01,
Tao Baod7db5942015-01-28 10:07:51 -0800239 _DRM_CONTEXT_2DONLY = 0x02
Ben Cheng655a7c02013-10-16 16:09:24 -0700240};
241struct drm_ctx {
Tao Baod7db5942015-01-28 10:07:51 -0800242 drm_context_t handle;
Tao Baod7db5942015-01-28 10:07:51 -0800243 enum drm_ctx_flags flags;
Ben Cheng655a7c02013-10-16 16:09:24 -0700244};
245struct drm_ctx_res {
Tao Baod7db5942015-01-28 10:07:51 -0800246 int count;
Tao Baod7db5942015-01-28 10:07:51 -0800247 struct drm_ctx __user * contexts;
Ben Cheng655a7c02013-10-16 16:09:24 -0700248};
249struct drm_draw {
Tao Baod7db5942015-01-28 10:07:51 -0800250 drm_drawable_t handle;
Ben Cheng655a7c02013-10-16 16:09:24 -0700251};
Christopher Ferris106b3a82016-08-24 12:15:38 -0700252typedef enum {
253 DRM_DRAWABLE_CLIPRECTS
254} drm_drawable_info_type_t;
Ben Cheng655a7c02013-10-16 16:09:24 -0700255struct drm_update_draw {
Tao Baod7db5942015-01-28 10:07:51 -0800256 drm_drawable_t handle;
257 unsigned int type;
258 unsigned int num;
Tao Baod7db5942015-01-28 10:07:51 -0800259 unsigned long long data;
Ben Cheng655a7c02013-10-16 16:09:24 -0700260};
261struct drm_auth {
Tao Baod7db5942015-01-28 10:07:51 -0800262 drm_magic_t magic;
Ben Cheng655a7c02013-10-16 16:09:24 -0700263};
264struct drm_irq_busid {
Tao Baod7db5942015-01-28 10:07:51 -0800265 int irq;
266 int busnum;
Tao Baod7db5942015-01-28 10:07:51 -0800267 int devnum;
268 int funcnum;
Ben Cheng655a7c02013-10-16 16:09:24 -0700269};
Ben Cheng655a7c02013-10-16 16:09:24 -0700270enum drm_vblank_seq_type {
Tao Baod7db5942015-01-28 10:07:51 -0800271 _DRM_VBLANK_ABSOLUTE = 0x0,
272 _DRM_VBLANK_RELATIVE = 0x1,
273 _DRM_VBLANK_HIGH_CRTC_MASK = 0x0000003e,
274 _DRM_VBLANK_EVENT = 0x4000000,
Tao Baod7db5942015-01-28 10:07:51 -0800275 _DRM_VBLANK_FLIP = 0x8000000,
276 _DRM_VBLANK_NEXTONMISS = 0x10000000,
277 _DRM_VBLANK_SECONDARY = 0x20000000,
278 _DRM_VBLANK_SIGNAL = 0x40000000
Ben Cheng655a7c02013-10-16 16:09:24 -0700279};
280#define _DRM_VBLANK_HIGH_CRTC_SHIFT 1
281#define _DRM_VBLANK_TYPES_MASK (_DRM_VBLANK_ABSOLUTE | _DRM_VBLANK_RELATIVE)
Tao Baod7db5942015-01-28 10:07:51 -0800282#define _DRM_VBLANK_FLAGS_MASK (_DRM_VBLANK_EVENT | _DRM_VBLANK_SIGNAL | _DRM_VBLANK_SECONDARY | _DRM_VBLANK_NEXTONMISS)
Ben Cheng655a7c02013-10-16 16:09:24 -0700283struct drm_wait_vblank_request {
Tao Baod7db5942015-01-28 10:07:51 -0800284 enum drm_vblank_seq_type type;
285 unsigned int sequence;
286 unsigned long signal;
Ben Cheng655a7c02013-10-16 16:09:24 -0700287};
288struct drm_wait_vblank_reply {
Tao Baod7db5942015-01-28 10:07:51 -0800289 enum drm_vblank_seq_type type;
290 unsigned int sequence;
Tao Baod7db5942015-01-28 10:07:51 -0800291 long tval_sec;
292 long tval_usec;
Ben Cheng655a7c02013-10-16 16:09:24 -0700293};
Ben Cheng655a7c02013-10-16 16:09:24 -0700294union drm_wait_vblank {
Tao Baod7db5942015-01-28 10:07:51 -0800295 struct drm_wait_vblank_request request;
296 struct drm_wait_vblank_reply reply;
Ben Cheng655a7c02013-10-16 16:09:24 -0700297};
Ben Cheng655a7c02013-10-16 16:09:24 -0700298#define _DRM_PRE_MODESET 1
299#define _DRM_POST_MODESET 2
300struct drm_modeset_ctl {
Tao Baod7db5942015-01-28 10:07:51 -0800301 __u32 crtc;
302 __u32 cmd;
Ben Cheng655a7c02013-10-16 16:09:24 -0700303};
304struct drm_agp_mode {
Tao Baod7db5942015-01-28 10:07:51 -0800305 unsigned long mode;
Ben Cheng655a7c02013-10-16 16:09:24 -0700306};
307struct drm_agp_buffer {
Tao Baod7db5942015-01-28 10:07:51 -0800308 unsigned long size;
309 unsigned long handle;
310 unsigned long type;
Tao Baod7db5942015-01-28 10:07:51 -0800311 unsigned long physical;
Ben Cheng655a7c02013-10-16 16:09:24 -0700312};
313struct drm_agp_binding {
Tao Baod7db5942015-01-28 10:07:51 -0800314 unsigned long handle;
Tao Baod7db5942015-01-28 10:07:51 -0800315 unsigned long offset;
Ben Cheng655a7c02013-10-16 16:09:24 -0700316};
317struct drm_agp_info {
Tao Baod7db5942015-01-28 10:07:51 -0800318 int agp_version_major;
Tao Baod7db5942015-01-28 10:07:51 -0800319 int agp_version_minor;
320 unsigned long mode;
321 unsigned long aperture_base;
322 unsigned long aperture_size;
Tao Baod7db5942015-01-28 10:07:51 -0800323 unsigned long memory_allowed;
324 unsigned long memory_used;
325 unsigned short id_vendor;
326 unsigned short id_device;
Ben Cheng655a7c02013-10-16 16:09:24 -0700327};
328struct drm_scatter_gather {
Tao Baod7db5942015-01-28 10:07:51 -0800329 unsigned long size;
330 unsigned long handle;
Ben Cheng655a7c02013-10-16 16:09:24 -0700331};
332struct drm_set_version {
Tao Baod7db5942015-01-28 10:07:51 -0800333 int drm_di_major;
334 int drm_di_minor;
Tao Baod7db5942015-01-28 10:07:51 -0800335 int drm_dd_major;
336 int drm_dd_minor;
Ben Cheng655a7c02013-10-16 16:09:24 -0700337};
Ben Cheng655a7c02013-10-16 16:09:24 -0700338struct drm_gem_close {
Tao Baod7db5942015-01-28 10:07:51 -0800339 __u32 handle;
340 __u32 pad;
Ben Cheng655a7c02013-10-16 16:09:24 -0700341};
Ben Cheng655a7c02013-10-16 16:09:24 -0700342struct drm_gem_flink {
Tao Baod7db5942015-01-28 10:07:51 -0800343 __u32 handle;
344 __u32 name;
Ben Cheng655a7c02013-10-16 16:09:24 -0700345};
Ben Cheng655a7c02013-10-16 16:09:24 -0700346struct drm_gem_open {
Tao Baod7db5942015-01-28 10:07:51 -0800347 __u32 name;
348 __u32 handle;
349 __u64 size;
Ben Cheng655a7c02013-10-16 16:09:24 -0700350};
Christopher Ferris38062f92014-07-09 15:33:25 -0700351#define DRM_CAP_DUMB_BUFFER 0x1
352#define DRM_CAP_VBLANK_HIGH_CRTC 0x2
353#define DRM_CAP_DUMB_PREFERRED_DEPTH 0x3
354#define DRM_CAP_DUMB_PREFER_SHADOW 0x4
Christopher Ferris38062f92014-07-09 15:33:25 -0700355#define DRM_CAP_PRIME 0x5
356#define DRM_PRIME_CAP_IMPORT 0x1
357#define DRM_PRIME_CAP_EXPORT 0x2
358#define DRM_CAP_TIMESTAMP_MONOTONIC 0x6
Christopher Ferris38062f92014-07-09 15:33:25 -0700359#define DRM_CAP_ASYNC_PAGE_FLIP 0x7
360#define DRM_CAP_CURSOR_WIDTH 0x8
361#define DRM_CAP_CURSOR_HEIGHT 0x9
Christopher Ferris05d08e92016-02-04 13:16:38 -0800362#define DRM_CAP_ADDFB2_MODIFIERS 0x10
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800363#define DRM_CAP_PAGE_FLIP_TARGET 0x11
Christopher Ferris525ce912017-07-26 13:12:53 -0700364#define DRM_CAP_CRTC_IN_VBLANK_EVENT 0x12
Christopher Ferris1308ad32017-11-14 17:32:13 -0800365#define DRM_CAP_SYNCOBJ 0x13
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800366struct drm_get_cap {
Tao Baod7db5942015-01-28 10:07:51 -0800367 __u64 capability;
368 __u64 value;
Ben Cheng655a7c02013-10-16 16:09:24 -0700369};
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800370#define DRM_CLIENT_CAP_STEREO_3D 1
Christopher Ferrisba8d4f42014-09-03 19:56:49 -0700371#define DRM_CLIENT_CAP_UNIVERSAL_PLANES 2
Christopher Ferris05d08e92016-02-04 13:16:38 -0800372#define DRM_CLIENT_CAP_ATOMIC 3
Christopher Ferris9ce28842018-10-25 12:11:39 -0700373#define DRM_CLIENT_CAP_ASPECT_RATIO 4
374#define DRM_CLIENT_CAP_WRITEBACK_CONNECTORS 5
Christopher Ferris38062f92014-07-09 15:33:25 -0700375struct drm_set_client_cap {
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800376 __u64 capability;
Tao Baod7db5942015-01-28 10:07:51 -0800377 __u64 value;
Christopher Ferrisba8d4f42014-09-03 19:56:49 -0700378};
Christopher Ferris106b3a82016-08-24 12:15:38 -0700379#define DRM_RDWR O_RDWR
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800380#define DRM_CLOEXEC O_CLOEXEC
Ben Cheng655a7c02013-10-16 16:09:24 -0700381struct drm_prime_handle {
Tao Baod7db5942015-01-28 10:07:51 -0800382 __u32 handle;
Tao Baod7db5942015-01-28 10:07:51 -0800383 __u32 flags;
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800384 __s32 fd;
Ben Cheng655a7c02013-10-16 16:09:24 -0700385};
Christopher Ferris1308ad32017-11-14 17:32:13 -0800386struct drm_syncobj_create {
387 __u32 handle;
388#define DRM_SYNCOBJ_CREATE_SIGNALED (1 << 0)
389 __u32 flags;
390};
391struct drm_syncobj_destroy {
392 __u32 handle;
393 __u32 pad;
394};
395#define DRM_SYNCOBJ_FD_TO_HANDLE_FLAGS_IMPORT_SYNC_FILE (1 << 0)
396#define DRM_SYNCOBJ_HANDLE_TO_FD_FLAGS_EXPORT_SYNC_FILE (1 << 0)
397struct drm_syncobj_handle {
398 __u32 handle;
399 __u32 flags;
400 __s32 fd;
401 __u32 pad;
402};
403#define DRM_SYNCOBJ_WAIT_FLAGS_WAIT_ALL (1 << 0)
404#define DRM_SYNCOBJ_WAIT_FLAGS_WAIT_FOR_SUBMIT (1 << 1)
405struct drm_syncobj_wait {
406 __u64 handles;
407 __s64 timeout_nsec;
408 __u32 count_handles;
409 __u32 flags;
410 __u32 first_signaled;
411 __u32 pad;
412};
413struct drm_syncobj_array {
414 __u64 handles;
415 __u32 count_handles;
416 __u32 pad;
417};
Christopher Ferris934ec942018-01-31 15:29:16 -0800418struct drm_crtc_get_sequence {
419 __u32 crtc_id;
420 __u32 active;
421 __u64 sequence;
422 __s64 sequence_ns;
423};
424#define DRM_CRTC_SEQUENCE_RELATIVE 0x00000001
425#define DRM_CRTC_SEQUENCE_NEXT_ON_MISS 0x00000002
426struct drm_crtc_queue_sequence {
427 __u32 crtc_id;
428 __u32 flags;
429 __u64 sequence;
430 __u64 user_data;
431};
Christopher Ferris106b3a82016-08-24 12:15:38 -0700432#ifdef __cplusplus
Christopher Ferris48fe0ae2019-01-10 15:59:33 -0800433}
Christopher Ferris106b3a82016-08-24 12:15:38 -0700434#endif
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800435#include "drm_mode.h"
Christopher Ferris106b3a82016-08-24 12:15:38 -0700436#ifdef __cplusplus
Christopher Ferris48fe0ae2019-01-10 15:59:33 -0800437extern "C" {
Christopher Ferris106b3a82016-08-24 12:15:38 -0700438#endif
Christopher Ferrisba8d4f42014-09-03 19:56:49 -0700439#define DRM_IOCTL_BASE 'd'
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800440#define DRM_IO(nr) _IO(DRM_IOCTL_BASE, nr)
Tao Baod7db5942015-01-28 10:07:51 -0800441#define DRM_IOR(nr,type) _IOR(DRM_IOCTL_BASE, nr, type)
442#define DRM_IOW(nr,type) _IOW(DRM_IOCTL_BASE, nr, type)
Tao Baod7db5942015-01-28 10:07:51 -0800443#define DRM_IOWR(nr,type) _IOWR(DRM_IOCTL_BASE, nr, type)
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800444#define DRM_IOCTL_VERSION DRM_IOWR(0x00, struct drm_version)
Ben Cheng655a7c02013-10-16 16:09:24 -0700445#define DRM_IOCTL_GET_UNIQUE DRM_IOWR(0x01, struct drm_unique)
Tao Baod7db5942015-01-28 10:07:51 -0800446#define DRM_IOCTL_GET_MAGIC DRM_IOR(0x02, struct drm_auth)
Christopher Ferrisba8d4f42014-09-03 19:56:49 -0700447#define DRM_IOCTL_IRQ_BUSID DRM_IOWR(0x03, struct drm_irq_busid)
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800448#define DRM_IOCTL_GET_MAP DRM_IOWR(0x04, struct drm_map)
Ben Cheng655a7c02013-10-16 16:09:24 -0700449#define DRM_IOCTL_GET_CLIENT DRM_IOWR(0x05, struct drm_client)
Tao Baod7db5942015-01-28 10:07:51 -0800450#define DRM_IOCTL_GET_STATS DRM_IOR(0x06, struct drm_stats)
Christopher Ferrisba8d4f42014-09-03 19:56:49 -0700451#define DRM_IOCTL_SET_VERSION DRM_IOWR(0x07, struct drm_set_version)
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800452#define DRM_IOCTL_MODESET_CTL DRM_IOW(0x08, struct drm_modeset_ctl)
Tao Baod7db5942015-01-28 10:07:51 -0800453#define DRM_IOCTL_GEM_CLOSE DRM_IOW(0x09, struct drm_gem_close)
Ben Cheng655a7c02013-10-16 16:09:24 -0700454#define DRM_IOCTL_GEM_FLINK DRM_IOWR(0x0a, struct drm_gem_flink)
Christopher Ferrisba8d4f42014-09-03 19:56:49 -0700455#define DRM_IOCTL_GEM_OPEN DRM_IOWR(0x0b, struct drm_gem_open)
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800456#define DRM_IOCTL_GET_CAP DRM_IOWR(0x0c, struct drm_get_cap)
Tao Baod7db5942015-01-28 10:07:51 -0800457#define DRM_IOCTL_SET_CLIENT_CAP DRM_IOW(0x0d, struct drm_set_client_cap)
458#define DRM_IOCTL_SET_UNIQUE DRM_IOW(0x10, struct drm_unique)
Tao Baod7db5942015-01-28 10:07:51 -0800459#define DRM_IOCTL_AUTH_MAGIC DRM_IOW(0x11, struct drm_auth)
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800460#define DRM_IOCTL_BLOCK DRM_IOWR(0x12, struct drm_block)
Ben Cheng655a7c02013-10-16 16:09:24 -0700461#define DRM_IOCTL_UNBLOCK DRM_IOWR(0x13, struct drm_block)
Tao Baod7db5942015-01-28 10:07:51 -0800462#define DRM_IOCTL_CONTROL DRM_IOW(0x14, struct drm_control)
Christopher Ferrisba8d4f42014-09-03 19:56:49 -0700463#define DRM_IOCTL_ADD_MAP DRM_IOWR(0x15, struct drm_map)
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800464#define DRM_IOCTL_ADD_BUFS DRM_IOWR(0x16, struct drm_buf_desc)
Tao Baod7db5942015-01-28 10:07:51 -0800465#define DRM_IOCTL_MARK_BUFS DRM_IOW(0x17, struct drm_buf_desc)
Ben Cheng655a7c02013-10-16 16:09:24 -0700466#define DRM_IOCTL_INFO_BUFS DRM_IOWR(0x18, struct drm_buf_info)
Christopher Ferrisba8d4f42014-09-03 19:56:49 -0700467#define DRM_IOCTL_MAP_BUFS DRM_IOWR(0x19, struct drm_buf_map)
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800468#define DRM_IOCTL_FREE_BUFS DRM_IOW(0x1a, struct drm_buf_free)
Tao Baod7db5942015-01-28 10:07:51 -0800469#define DRM_IOCTL_RM_MAP DRM_IOW(0x1b, struct drm_map)
470#define DRM_IOCTL_SET_SAREA_CTX DRM_IOW(0x1c, struct drm_ctx_priv_map)
Christopher Ferrisba8d4f42014-09-03 19:56:49 -0700471#define DRM_IOCTL_GET_SAREA_CTX DRM_IOWR(0x1d, struct drm_ctx_priv_map)
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800472#define DRM_IOCTL_SET_MASTER DRM_IO(0x1e)
Ben Cheng655a7c02013-10-16 16:09:24 -0700473#define DRM_IOCTL_DROP_MASTER DRM_IO(0x1f)
474#define DRM_IOCTL_ADD_CTX DRM_IOWR(0x20, struct drm_ctx)
Christopher Ferrisba8d4f42014-09-03 19:56:49 -0700475#define DRM_IOCTL_RM_CTX DRM_IOWR(0x21, struct drm_ctx)
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800476#define DRM_IOCTL_MOD_CTX DRM_IOW(0x22, struct drm_ctx)
Ben Cheng655a7c02013-10-16 16:09:24 -0700477#define DRM_IOCTL_GET_CTX DRM_IOWR(0x23, struct drm_ctx)
Tao Baod7db5942015-01-28 10:07:51 -0800478#define DRM_IOCTL_SWITCH_CTX DRM_IOW(0x24, struct drm_ctx)
Tao Baod7db5942015-01-28 10:07:51 -0800479#define DRM_IOCTL_NEW_CTX DRM_IOW(0x25, struct drm_ctx)
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800480#define DRM_IOCTL_RES_CTX DRM_IOWR(0x26, struct drm_ctx_res)
Ben Cheng655a7c02013-10-16 16:09:24 -0700481#define DRM_IOCTL_ADD_DRAW DRM_IOWR(0x27, struct drm_draw)
482#define DRM_IOCTL_RM_DRAW DRM_IOWR(0x28, struct drm_draw)
Christopher Ferrisba8d4f42014-09-03 19:56:49 -0700483#define DRM_IOCTL_DMA DRM_IOWR(0x29, struct drm_dma)
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800484#define DRM_IOCTL_LOCK DRM_IOW(0x2a, struct drm_lock)
Tao Baod7db5942015-01-28 10:07:51 -0800485#define DRM_IOCTL_UNLOCK DRM_IOW(0x2b, struct drm_lock)
486#define DRM_IOCTL_FINISH DRM_IOW(0x2c, struct drm_lock)
Christopher Ferrisba8d4f42014-09-03 19:56:49 -0700487#define DRM_IOCTL_PRIME_HANDLE_TO_FD DRM_IOWR(0x2d, struct drm_prime_handle)
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800488#define DRM_IOCTL_PRIME_FD_TO_HANDLE DRM_IOWR(0x2e, struct drm_prime_handle)
Tao Baod7db5942015-01-28 10:07:51 -0800489#define DRM_IOCTL_AGP_ACQUIRE DRM_IO(0x30)
490#define DRM_IOCTL_AGP_RELEASE DRM_IO(0x31)
Tao Baod7db5942015-01-28 10:07:51 -0800491#define DRM_IOCTL_AGP_ENABLE DRM_IOW(0x32, struct drm_agp_mode)
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800492#define DRM_IOCTL_AGP_INFO DRM_IOR(0x33, struct drm_agp_info)
Ben Cheng655a7c02013-10-16 16:09:24 -0700493#define DRM_IOCTL_AGP_ALLOC DRM_IOWR(0x34, struct drm_agp_buffer)
Tao Baod7db5942015-01-28 10:07:51 -0800494#define DRM_IOCTL_AGP_FREE DRM_IOW(0x35, struct drm_agp_buffer)
Tao Baod7db5942015-01-28 10:07:51 -0800495#define DRM_IOCTL_AGP_BIND DRM_IOW(0x36, struct drm_agp_binding)
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800496#define DRM_IOCTL_AGP_UNBIND DRM_IOW(0x37, struct drm_agp_binding)
Ben Cheng655a7c02013-10-16 16:09:24 -0700497#define DRM_IOCTL_SG_ALLOC DRM_IOWR(0x38, struct drm_scatter_gather)
Tao Baod7db5942015-01-28 10:07:51 -0800498#define DRM_IOCTL_SG_FREE DRM_IOW(0x39, struct drm_scatter_gather)
Christopher Ferrisba8d4f42014-09-03 19:56:49 -0700499#define DRM_IOCTL_WAIT_VBLANK DRM_IOWR(0x3a, union drm_wait_vblank)
Christopher Ferris934ec942018-01-31 15:29:16 -0800500#define DRM_IOCTL_CRTC_GET_SEQUENCE DRM_IOWR(0x3b, struct drm_crtc_get_sequence)
501#define DRM_IOCTL_CRTC_QUEUE_SEQUENCE DRM_IOWR(0x3c, struct drm_crtc_queue_sequence)
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800502#define DRM_IOCTL_UPDATE_DRAW DRM_IOW(0x3f, struct drm_update_draw)
Ben Cheng655a7c02013-10-16 16:09:24 -0700503#define DRM_IOCTL_MODE_GETRESOURCES DRM_IOWR(0xA0, struct drm_mode_card_res)
504#define DRM_IOCTL_MODE_GETCRTC DRM_IOWR(0xA1, struct drm_mode_crtc)
Christopher Ferrisba8d4f42014-09-03 19:56:49 -0700505#define DRM_IOCTL_MODE_SETCRTC DRM_IOWR(0xA2, struct drm_mode_crtc)
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800506#define DRM_IOCTL_MODE_CURSOR DRM_IOWR(0xA3, struct drm_mode_cursor)
Ben Cheng655a7c02013-10-16 16:09:24 -0700507#define DRM_IOCTL_MODE_GETGAMMA DRM_IOWR(0xA4, struct drm_mode_crtc_lut)
508#define DRM_IOCTL_MODE_SETGAMMA DRM_IOWR(0xA5, struct drm_mode_crtc_lut)
Christopher Ferrisba8d4f42014-09-03 19:56:49 -0700509#define DRM_IOCTL_MODE_GETENCODER DRM_IOWR(0xA6, struct drm_mode_get_encoder)
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800510#define DRM_IOCTL_MODE_GETCONNECTOR DRM_IOWR(0xA7, struct drm_mode_get_connector)
Ben Cheng655a7c02013-10-16 16:09:24 -0700511#define DRM_IOCTL_MODE_ATTACHMODE DRM_IOWR(0xA8, struct drm_mode_mode_cmd)
512#define DRM_IOCTL_MODE_DETACHMODE DRM_IOWR(0xA9, struct drm_mode_mode_cmd)
Christopher Ferrisba8d4f42014-09-03 19:56:49 -0700513#define DRM_IOCTL_MODE_GETPROPERTY DRM_IOWR(0xAA, struct drm_mode_get_property)
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800514#define DRM_IOCTL_MODE_SETPROPERTY DRM_IOWR(0xAB, struct drm_mode_connector_set_property)
Ben Cheng655a7c02013-10-16 16:09:24 -0700515#define DRM_IOCTL_MODE_GETPROPBLOB DRM_IOWR(0xAC, struct drm_mode_get_blob)
516#define DRM_IOCTL_MODE_GETFB DRM_IOWR(0xAD, struct drm_mode_fb_cmd)
Christopher Ferrisba8d4f42014-09-03 19:56:49 -0700517#define DRM_IOCTL_MODE_ADDFB DRM_IOWR(0xAE, struct drm_mode_fb_cmd)
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800518#define DRM_IOCTL_MODE_RMFB DRM_IOWR(0xAF, unsigned int)
Ben Cheng655a7c02013-10-16 16:09:24 -0700519#define DRM_IOCTL_MODE_PAGE_FLIP DRM_IOWR(0xB0, struct drm_mode_crtc_page_flip)
520#define DRM_IOCTL_MODE_DIRTYFB DRM_IOWR(0xB1, struct drm_mode_fb_dirty_cmd)
Christopher Ferrisba8d4f42014-09-03 19:56:49 -0700521#define DRM_IOCTL_MODE_CREATE_DUMB DRM_IOWR(0xB2, struct drm_mode_create_dumb)
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800522#define DRM_IOCTL_MODE_MAP_DUMB DRM_IOWR(0xB3, struct drm_mode_map_dumb)
Ben Cheng655a7c02013-10-16 16:09:24 -0700523#define DRM_IOCTL_MODE_DESTROY_DUMB DRM_IOWR(0xB4, struct drm_mode_destroy_dumb)
524#define DRM_IOCTL_MODE_GETPLANERESOURCES DRM_IOWR(0xB5, struct drm_mode_get_plane_res)
Christopher Ferrisba8d4f42014-09-03 19:56:49 -0700525#define DRM_IOCTL_MODE_GETPLANE DRM_IOWR(0xB6, struct drm_mode_get_plane)
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800526#define DRM_IOCTL_MODE_SETPLANE DRM_IOWR(0xB7, struct drm_mode_set_plane)
Ben Cheng655a7c02013-10-16 16:09:24 -0700527#define DRM_IOCTL_MODE_ADDFB2 DRM_IOWR(0xB8, struct drm_mode_fb_cmd2)
528#define DRM_IOCTL_MODE_OBJ_GETPROPERTIES DRM_IOWR(0xB9, struct drm_mode_obj_get_properties)
Christopher Ferrisba8d4f42014-09-03 19:56:49 -0700529#define DRM_IOCTL_MODE_OBJ_SETPROPERTY DRM_IOWR(0xBA, struct drm_mode_obj_set_property)
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800530#define DRM_IOCTL_MODE_CURSOR2 DRM_IOWR(0xBB, struct drm_mode_cursor2)
Christopher Ferris05d08e92016-02-04 13:16:38 -0800531#define DRM_IOCTL_MODE_ATOMIC DRM_IOWR(0xBC, struct drm_mode_atomic)
532#define DRM_IOCTL_MODE_CREATEPROPBLOB DRM_IOWR(0xBD, struct drm_mode_create_blob)
533#define DRM_IOCTL_MODE_DESTROYPROPBLOB DRM_IOWR(0xBE, struct drm_mode_destroy_blob)
Christopher Ferris1308ad32017-11-14 17:32:13 -0800534#define DRM_IOCTL_SYNCOBJ_CREATE DRM_IOWR(0xBF, struct drm_syncobj_create)
535#define DRM_IOCTL_SYNCOBJ_DESTROY DRM_IOWR(0xC0, struct drm_syncobj_destroy)
536#define DRM_IOCTL_SYNCOBJ_HANDLE_TO_FD DRM_IOWR(0xC1, struct drm_syncobj_handle)
537#define DRM_IOCTL_SYNCOBJ_FD_TO_HANDLE DRM_IOWR(0xC2, struct drm_syncobj_handle)
538#define DRM_IOCTL_SYNCOBJ_WAIT DRM_IOWR(0xC3, struct drm_syncobj_wait)
539#define DRM_IOCTL_SYNCOBJ_RESET DRM_IOWR(0xC4, struct drm_syncobj_array)
540#define DRM_IOCTL_SYNCOBJ_SIGNAL DRM_IOWR(0xC5, struct drm_syncobj_array)
Christopher Ferris934ec942018-01-31 15:29:16 -0800541#define DRM_IOCTL_MODE_CREATE_LEASE DRM_IOWR(0xC6, struct drm_mode_create_lease)
542#define DRM_IOCTL_MODE_LIST_LESSEES DRM_IOWR(0xC7, struct drm_mode_list_lessees)
543#define DRM_IOCTL_MODE_GET_LEASE DRM_IOWR(0xC8, struct drm_mode_get_lease)
544#define DRM_IOCTL_MODE_REVOKE_LEASE DRM_IOWR(0xC9, struct drm_mode_revoke_lease)
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800545#define DRM_COMMAND_BASE 0x40
Christopher Ferris05d08e92016-02-04 13:16:38 -0800546#define DRM_COMMAND_END 0xA0
Christopher Ferrisba8d4f42014-09-03 19:56:49 -0700547struct drm_event {
Tao Baod7db5942015-01-28 10:07:51 -0800548 __u32 type;
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800549 __u32 length;
Christopher Ferris05d08e92016-02-04 13:16:38 -0800550};
Christopher Ferrisba8d4f42014-09-03 19:56:49 -0700551#define DRM_EVENT_VBLANK 0x01
Christopher Ferris38062f92014-07-09 15:33:25 -0700552#define DRM_EVENT_FLIP_COMPLETE 0x02
Christopher Ferris934ec942018-01-31 15:29:16 -0800553#define DRM_EVENT_CRTC_SEQUENCE 0x03
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800554struct drm_event_vblank {
Christopher Ferris05d08e92016-02-04 13:16:38 -0800555 struct drm_event base;
Tao Baod7db5942015-01-28 10:07:51 -0800556 __u64 user_data;
557 __u32 tv_sec;
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800558 __u32 tv_usec;
Christopher Ferris05d08e92016-02-04 13:16:38 -0800559 __u32 sequence;
Christopher Ferris525ce912017-07-26 13:12:53 -0700560 __u32 crtc_id;
Ben Cheng655a7c02013-10-16 16:09:24 -0700561};
Christopher Ferris934ec942018-01-31 15:29:16 -0800562struct drm_event_crtc_sequence {
563 struct drm_event base;
564 __u64 user_data;
565 __s64 time_ns;
566 __u64 sequence;
567};
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800568typedef struct drm_clip_rect drm_clip_rect_t;
Christopher Ferris05d08e92016-02-04 13:16:38 -0800569typedef struct drm_drawable_info drm_drawable_info_t;
Christopher Ferrisba8d4f42014-09-03 19:56:49 -0700570typedef struct drm_tex_region drm_tex_region_t;
Christopher Ferris38062f92014-07-09 15:33:25 -0700571typedef struct drm_hw_lock drm_hw_lock_t;
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800572typedef struct drm_version drm_version_t;
Christopher Ferris05d08e92016-02-04 13:16:38 -0800573typedef struct drm_unique drm_unique_t;
Christopher Ferrisba8d4f42014-09-03 19:56:49 -0700574typedef struct drm_list drm_list_t;
Christopher Ferris38062f92014-07-09 15:33:25 -0700575typedef struct drm_block drm_block_t;
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800576typedef struct drm_control drm_control_t;
Christopher Ferris05d08e92016-02-04 13:16:38 -0800577typedef enum drm_map_type drm_map_type_t;
Christopher Ferrisba8d4f42014-09-03 19:56:49 -0700578typedef enum drm_map_flags drm_map_flags_t;
Christopher Ferris38062f92014-07-09 15:33:25 -0700579typedef struct drm_ctx_priv_map drm_ctx_priv_map_t;
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800580typedef struct drm_map drm_map_t;
Christopher Ferris05d08e92016-02-04 13:16:38 -0800581typedef struct drm_client drm_client_t;
Christopher Ferrisba8d4f42014-09-03 19:56:49 -0700582typedef enum drm_stat_type drm_stat_type_t;
Christopher Ferris38062f92014-07-09 15:33:25 -0700583typedef struct drm_stats drm_stats_t;
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800584typedef enum drm_lock_flags drm_lock_flags_t;
Christopher Ferris05d08e92016-02-04 13:16:38 -0800585typedef struct drm_lock drm_lock_t;
Christopher Ferrisba8d4f42014-09-03 19:56:49 -0700586typedef enum drm_dma_flags drm_dma_flags_t;
Christopher Ferris38062f92014-07-09 15:33:25 -0700587typedef struct drm_buf_desc drm_buf_desc_t;
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800588typedef struct drm_buf_info drm_buf_info_t;
Christopher Ferris05d08e92016-02-04 13:16:38 -0800589typedef struct drm_buf_free drm_buf_free_t;
Christopher Ferrisba8d4f42014-09-03 19:56:49 -0700590typedef struct drm_buf_pub drm_buf_pub_t;
Christopher Ferris38062f92014-07-09 15:33:25 -0700591typedef struct drm_buf_map drm_buf_map_t;
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800592typedef struct drm_dma drm_dma_t;
Christopher Ferris05d08e92016-02-04 13:16:38 -0800593typedef union drm_wait_vblank drm_wait_vblank_t;
Christopher Ferrisba8d4f42014-09-03 19:56:49 -0700594typedef struct drm_agp_mode drm_agp_mode_t;
Christopher Ferris38062f92014-07-09 15:33:25 -0700595typedef enum drm_ctx_flags drm_ctx_flags_t;
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800596typedef struct drm_ctx drm_ctx_t;
Christopher Ferris05d08e92016-02-04 13:16:38 -0800597typedef struct drm_ctx_res drm_ctx_res_t;
Christopher Ferrisba8d4f42014-09-03 19:56:49 -0700598typedef struct drm_draw drm_draw_t;
Christopher Ferris38062f92014-07-09 15:33:25 -0700599typedef struct drm_update_draw drm_update_draw_t;
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800600typedef struct drm_auth drm_auth_t;
Christopher Ferris05d08e92016-02-04 13:16:38 -0800601typedef struct drm_irq_busid drm_irq_busid_t;
Christopher Ferrisba8d4f42014-09-03 19:56:49 -0700602typedef enum drm_vblank_seq_type drm_vblank_seq_type_t;
Christopher Ferris38062f92014-07-09 15:33:25 -0700603typedef struct drm_agp_buffer drm_agp_buffer_t;
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800604typedef struct drm_agp_binding drm_agp_binding_t;
Christopher Ferris05d08e92016-02-04 13:16:38 -0800605typedef struct drm_agp_info drm_agp_info_t;
Christopher Ferrisba8d4f42014-09-03 19:56:49 -0700606typedef struct drm_scatter_gather drm_scatter_gather_t;
Christopher Ferris38062f92014-07-09 15:33:25 -0700607typedef struct drm_set_version drm_set_version_t;
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800608#ifdef __cplusplus
Christopher Ferris48fe0ae2019-01-10 15:59:33 -0800609}
Christopher Ferris106b3a82016-08-24 12:15:38 -0700610#endif
611#endif