blob: ec0c1fad3f20c3787f2eab5502ec70c81496daef [file] [log] [blame]
Ben Cheng655a7c02013-10-16 16:09:24 -07001/****************************************************************************
2 ****************************************************************************
3 ***
4 *** This header was automatically generated from a Linux kernel header
5 *** of the same name, to make information necessary for userspace to
6 *** call into the kernel available to libc. It contains only constants,
7 *** structures, and macros generated from the original header, and thus,
8 *** contains no copyrightable information.
9 ***
10 *** To edit the content of this header, modify the corresponding
11 *** source file (e.g. under external/kernel-headers/original/) then
12 *** run bionic/libc/kernel/tools/update_all.py
13 ***
14 *** Any manual change here will be lost the next time this script will
15 *** be run. You've been warned!
16 ***
17 ****************************************************************************
18 ****************************************************************************/
19#ifndef _DRM_H_
20#define _DRM_H_
21#ifdef __linux__
22#include <linux/types.h>
Ben Cheng655a7c02013-10-16 16:09:24 -070023#include <asm/ioctl.h>
24typedef unsigned int drm_handle_t;
25#else
26#include <sys/ioccom.h>
Ben Cheng655a7c02013-10-16 16:09:24 -070027#include <sys/types.h>
28typedef int8_t __s8;
29typedef uint8_t __u8;
30typedef int16_t __s16;
Ben Cheng655a7c02013-10-16 16:09:24 -070031typedef uint16_t __u16;
32typedef int32_t __s32;
33typedef uint32_t __u32;
34typedef int64_t __s64;
Ben Cheng655a7c02013-10-16 16:09:24 -070035typedef uint64_t __u64;
Christopher Ferris106b3a82016-08-24 12:15:38 -070036typedef size_t __kernel_size_t;
Ben Cheng655a7c02013-10-16 16:09:24 -070037typedef unsigned long drm_handle_t;
38#endif
Christopher Ferris106b3a82016-08-24 12:15:38 -070039#ifdef __cplusplus
40#endif
41#define DRM_NAME "drm"
Ben Cheng655a7c02013-10-16 16:09:24 -070042#define DRM_MIN_ORDER 5
43#define DRM_MAX_ORDER 22
44#define DRM_RAM_PERCENT 10
45#define _DRM_LOCK_HELD 0x80000000U
Ben Cheng655a7c02013-10-16 16:09:24 -070046#define _DRM_LOCK_CONT 0x40000000U
47#define _DRM_LOCK_IS_HELD(lock) ((lock) & _DRM_LOCK_HELD)
48#define _DRM_LOCK_IS_CONT(lock) ((lock) & _DRM_LOCK_CONT)
Tao Baod7db5942015-01-28 10:07:51 -080049#define _DRM_LOCKING_CONTEXT(lock) ((lock) & ~(_DRM_LOCK_HELD | _DRM_LOCK_CONT))
Ben Cheng655a7c02013-10-16 16:09:24 -070050typedef unsigned int drm_context_t;
51typedef unsigned int drm_drawable_t;
52typedef unsigned int drm_magic_t;
53struct drm_clip_rect {
Tao Baod7db5942015-01-28 10:07:51 -080054 unsigned short x1;
55 unsigned short y1;
56 unsigned short x2;
57 unsigned short y2;
Ben Cheng655a7c02013-10-16 16:09:24 -070058};
59struct drm_drawable_info {
Tao Baod7db5942015-01-28 10:07:51 -080060 unsigned int num_rects;
61 struct drm_clip_rect * rects;
Ben Cheng655a7c02013-10-16 16:09:24 -070062};
63struct drm_tex_region {
Tao Baod7db5942015-01-28 10:07:51 -080064 unsigned char next;
65 unsigned char prev;
Tao Baod7db5942015-01-28 10:07:51 -080066 unsigned char in_use;
67 unsigned char padding;
68 unsigned int age;
Ben Cheng655a7c02013-10-16 16:09:24 -070069};
Ben Cheng655a7c02013-10-16 16:09:24 -070070struct drm_hw_lock {
Tao Baod7db5942015-01-28 10:07:51 -080071 __volatile__ unsigned int lock;
72 char padding[60];
Ben Cheng655a7c02013-10-16 16:09:24 -070073};
Ben Cheng655a7c02013-10-16 16:09:24 -070074struct drm_version {
Tao Baod7db5942015-01-28 10:07:51 -080075 int version_major;
76 int version_minor;
77 int version_patchlevel;
Christopher Ferris106b3a82016-08-24 12:15:38 -070078 __kernel_size_t name_len;
Tao Baod7db5942015-01-28 10:07:51 -080079 char __user * name;
Christopher Ferris106b3a82016-08-24 12:15:38 -070080 __kernel_size_t date_len;
Tao Baod7db5942015-01-28 10:07:51 -080081 char __user * date;
Christopher Ferris106b3a82016-08-24 12:15:38 -070082 __kernel_size_t desc_len;
Tao Baod7db5942015-01-28 10:07:51 -080083 char __user * desc;
Ben Cheng655a7c02013-10-16 16:09:24 -070084};
85struct drm_unique {
Christopher Ferris106b3a82016-08-24 12:15:38 -070086 __kernel_size_t unique_len;
Tao Baod7db5942015-01-28 10:07:51 -080087 char __user * unique;
Ben Cheng655a7c02013-10-16 16:09:24 -070088};
89struct drm_list {
Tao Baod7db5942015-01-28 10:07:51 -080090 int count;
91 struct drm_version __user * version;
Ben Cheng655a7c02013-10-16 16:09:24 -070092};
93struct drm_block {
Tao Baod7db5942015-01-28 10:07:51 -080094 int unused;
Ben Cheng655a7c02013-10-16 16:09:24 -070095};
96struct drm_control {
Tao Baod7db5942015-01-28 10:07:51 -080097 enum {
Tao Baod7db5942015-01-28 10:07:51 -080098 DRM_ADD_COMMAND,
99 DRM_RM_COMMAND,
100 DRM_INST_HANDLER,
101 DRM_UNINST_HANDLER
Tao Baod7db5942015-01-28 10:07:51 -0800102 } func;
103 int irq;
Ben Cheng655a7c02013-10-16 16:09:24 -0700104};
105enum drm_map_type {
Tao Baod7db5942015-01-28 10:07:51 -0800106 _DRM_FRAME_BUFFER = 0,
107 _DRM_REGISTERS = 1,
108 _DRM_SHM = 2,
109 _DRM_AGP = 3,
Tao Baod7db5942015-01-28 10:07:51 -0800110 _DRM_SCATTER_GATHER = 4,
Christopher Ferris106b3a82016-08-24 12:15:38 -0700111 _DRM_CONSISTENT = 5
Ben Cheng655a7c02013-10-16 16:09:24 -0700112};
Ben Cheng655a7c02013-10-16 16:09:24 -0700113enum drm_map_flags {
Tao Baod7db5942015-01-28 10:07:51 -0800114 _DRM_RESTRICTED = 0x01,
115 _DRM_READ_ONLY = 0x02,
116 _DRM_LOCKED = 0x04,
117 _DRM_KERNEL = 0x08,
Tao Baod7db5942015-01-28 10:07:51 -0800118 _DRM_WRITE_COMBINING = 0x10,
119 _DRM_CONTAINS_LOCK = 0x20,
120 _DRM_REMOVABLE = 0x40,
121 _DRM_DRIVER = 0x80
Ben Cheng655a7c02013-10-16 16:09:24 -0700122};
123struct drm_ctx_priv_map {
Tao Baod7db5942015-01-28 10:07:51 -0800124 unsigned int ctx_id;
125 void * handle;
Ben Cheng655a7c02013-10-16 16:09:24 -0700126};
127struct drm_map {
Tao Baod7db5942015-01-28 10:07:51 -0800128 unsigned long offset;
129 unsigned long size;
Tao Baod7db5942015-01-28 10:07:51 -0800130 enum drm_map_type type;
131 enum drm_map_flags flags;
132 void * handle;
133 int mtrr;
Ben Cheng655a7c02013-10-16 16:09:24 -0700134};
135struct drm_client {
Tao Baod7db5942015-01-28 10:07:51 -0800136 int idx;
137 int auth;
Tao Baod7db5942015-01-28 10:07:51 -0800138 unsigned long pid;
139 unsigned long uid;
140 unsigned long magic;
141 unsigned long iocs;
Ben Cheng655a7c02013-10-16 16:09:24 -0700142};
143enum drm_stat_type {
Tao Baod7db5942015-01-28 10:07:51 -0800144 _DRM_STAT_LOCK,
145 _DRM_STAT_OPENS,
Tao Baod7db5942015-01-28 10:07:51 -0800146 _DRM_STAT_CLOSES,
147 _DRM_STAT_IOCTLS,
148 _DRM_STAT_LOCKS,
149 _DRM_STAT_UNLOCKS,
Tao Baod7db5942015-01-28 10:07:51 -0800150 _DRM_STAT_VALUE,
151 _DRM_STAT_BYTE,
152 _DRM_STAT_COUNT,
153 _DRM_STAT_IRQ,
Tao Baod7db5942015-01-28 10:07:51 -0800154 _DRM_STAT_PRIMARY,
155 _DRM_STAT_SECONDARY,
156 _DRM_STAT_DMA,
157 _DRM_STAT_SPECIAL,
Tao Baod7db5942015-01-28 10:07:51 -0800158 _DRM_STAT_MISSED
Ben Cheng655a7c02013-10-16 16:09:24 -0700159};
160struct drm_stats {
Tao Baod7db5942015-01-28 10:07:51 -0800161 unsigned long count;
Tao Baod7db5942015-01-28 10:07:51 -0800162 struct {
163 unsigned long value;
164 enum drm_stat_type type;
165 } data[15];
Ben Cheng655a7c02013-10-16 16:09:24 -0700166};
167enum drm_lock_flags {
Tao Baod7db5942015-01-28 10:07:51 -0800168 _DRM_LOCK_READY = 0x01,
169 _DRM_LOCK_QUIESCENT = 0x02,
Tao Baod7db5942015-01-28 10:07:51 -0800170 _DRM_LOCK_FLUSH = 0x04,
171 _DRM_LOCK_FLUSH_ALL = 0x08,
172 _DRM_HALT_ALL_QUEUES = 0x10,
173 _DRM_HALT_CUR_QUEUES = 0x20
Ben Cheng655a7c02013-10-16 16:09:24 -0700174};
175struct drm_lock {
Tao Baod7db5942015-01-28 10:07:51 -0800176 int context;
177 enum drm_lock_flags flags;
Ben Cheng655a7c02013-10-16 16:09:24 -0700178};
179enum drm_dma_flags {
Tao Baod7db5942015-01-28 10:07:51 -0800180 _DRM_DMA_BLOCK = 0x01,
181 _DRM_DMA_WHILE_LOCKED = 0x02,
Tao Baod7db5942015-01-28 10:07:51 -0800182 _DRM_DMA_PRIORITY = 0x04,
183 _DRM_DMA_WAIT = 0x10,
184 _DRM_DMA_SMALLER_OK = 0x20,
185 _DRM_DMA_LARGER_OK = 0x40
Ben Cheng655a7c02013-10-16 16:09:24 -0700186};
187struct drm_buf_desc {
Tao Baod7db5942015-01-28 10:07:51 -0800188 int count;
189 int size;
Tao Baod7db5942015-01-28 10:07:51 -0800190 int low_mark;
191 int high_mark;
192 enum {
193 _DRM_PAGE_ALIGN = 0x01,
Tao Baod7db5942015-01-28 10:07:51 -0800194 _DRM_AGP_BUFFER = 0x02,
195 _DRM_SG_BUFFER = 0x04,
196 _DRM_FB_BUFFER = 0x08,
197 _DRM_PCI_BUFFER_RO = 0x10
Tao Baod7db5942015-01-28 10:07:51 -0800198 } flags;
199 unsigned long agp_start;
Ben Cheng655a7c02013-10-16 16:09:24 -0700200};
Ben Cheng655a7c02013-10-16 16:09:24 -0700201struct drm_buf_info {
Tao Baod7db5942015-01-28 10:07:51 -0800202 int count;
203 struct drm_buf_desc __user * list;
Ben Cheng655a7c02013-10-16 16:09:24 -0700204};
Ben Cheng655a7c02013-10-16 16:09:24 -0700205struct drm_buf_free {
Tao Baod7db5942015-01-28 10:07:51 -0800206 int count;
207 int __user * list;
Ben Cheng655a7c02013-10-16 16:09:24 -0700208};
Ben Cheng655a7c02013-10-16 16:09:24 -0700209struct drm_buf_pub {
Tao Baod7db5942015-01-28 10:07:51 -0800210 int idx;
211 int total;
212 int used;
213 void __user * address;
Ben Cheng655a7c02013-10-16 16:09:24 -0700214};
215struct drm_buf_map {
Tao Baod7db5942015-01-28 10:07:51 -0800216 int count;
Christopher Ferris106b3a82016-08-24 12:15:38 -0700217#ifdef __cplusplus
218 void __user * virt;
Christopher Ferris106b3a82016-08-24 12:15:38 -0700219#else
220 void __user * __linux_virtual;
221#endif
Tao Baod7db5942015-01-28 10:07:51 -0800222 struct drm_buf_pub __user * list;
Ben Cheng655a7c02013-10-16 16:09:24 -0700223};
224struct drm_dma {
Tao Baod7db5942015-01-28 10:07:51 -0800225 int context;
Tao Baod7db5942015-01-28 10:07:51 -0800226 int send_count;
227 int __user * send_indices;
228 int __user * send_sizes;
229 enum drm_dma_flags flags;
Tao Baod7db5942015-01-28 10:07:51 -0800230 int request_count;
231 int request_size;
232 int __user * request_indices;
233 int __user * request_sizes;
Tao Baod7db5942015-01-28 10:07:51 -0800234 int granted_count;
Ben Cheng655a7c02013-10-16 16:09:24 -0700235};
236enum drm_ctx_flags {
Tao Baod7db5942015-01-28 10:07:51 -0800237 _DRM_CONTEXT_PRESERVED = 0x01,
Tao Baod7db5942015-01-28 10:07:51 -0800238 _DRM_CONTEXT_2DONLY = 0x02
Ben Cheng655a7c02013-10-16 16:09:24 -0700239};
240struct drm_ctx {
Tao Baod7db5942015-01-28 10:07:51 -0800241 drm_context_t handle;
Tao Baod7db5942015-01-28 10:07:51 -0800242 enum drm_ctx_flags flags;
Ben Cheng655a7c02013-10-16 16:09:24 -0700243};
244struct drm_ctx_res {
Tao Baod7db5942015-01-28 10:07:51 -0800245 int count;
Tao Baod7db5942015-01-28 10:07:51 -0800246 struct drm_ctx __user * contexts;
Ben Cheng655a7c02013-10-16 16:09:24 -0700247};
248struct drm_draw {
Tao Baod7db5942015-01-28 10:07:51 -0800249 drm_drawable_t handle;
Ben Cheng655a7c02013-10-16 16:09:24 -0700250};
Christopher Ferris106b3a82016-08-24 12:15:38 -0700251typedef enum {
252 DRM_DRAWABLE_CLIPRECTS
253} drm_drawable_info_type_t;
Ben Cheng655a7c02013-10-16 16:09:24 -0700254struct drm_update_draw {
Tao Baod7db5942015-01-28 10:07:51 -0800255 drm_drawable_t handle;
256 unsigned int type;
257 unsigned int num;
Tao Baod7db5942015-01-28 10:07:51 -0800258 unsigned long long data;
Ben Cheng655a7c02013-10-16 16:09:24 -0700259};
260struct drm_auth {
Tao Baod7db5942015-01-28 10:07:51 -0800261 drm_magic_t magic;
Ben Cheng655a7c02013-10-16 16:09:24 -0700262};
263struct drm_irq_busid {
Tao Baod7db5942015-01-28 10:07:51 -0800264 int irq;
265 int busnum;
Tao Baod7db5942015-01-28 10:07:51 -0800266 int devnum;
267 int funcnum;
Ben Cheng655a7c02013-10-16 16:09:24 -0700268};
Ben Cheng655a7c02013-10-16 16:09:24 -0700269enum drm_vblank_seq_type {
Tao Baod7db5942015-01-28 10:07:51 -0800270 _DRM_VBLANK_ABSOLUTE = 0x0,
271 _DRM_VBLANK_RELATIVE = 0x1,
272 _DRM_VBLANK_HIGH_CRTC_MASK = 0x0000003e,
273 _DRM_VBLANK_EVENT = 0x4000000,
Tao Baod7db5942015-01-28 10:07:51 -0800274 _DRM_VBLANK_FLIP = 0x8000000,
275 _DRM_VBLANK_NEXTONMISS = 0x10000000,
276 _DRM_VBLANK_SECONDARY = 0x20000000,
277 _DRM_VBLANK_SIGNAL = 0x40000000
Ben Cheng655a7c02013-10-16 16:09:24 -0700278};
279#define _DRM_VBLANK_HIGH_CRTC_SHIFT 1
280#define _DRM_VBLANK_TYPES_MASK (_DRM_VBLANK_ABSOLUTE | _DRM_VBLANK_RELATIVE)
Tao Baod7db5942015-01-28 10:07:51 -0800281#define _DRM_VBLANK_FLAGS_MASK (_DRM_VBLANK_EVENT | _DRM_VBLANK_SIGNAL | _DRM_VBLANK_SECONDARY | _DRM_VBLANK_NEXTONMISS)
Ben Cheng655a7c02013-10-16 16:09:24 -0700282struct drm_wait_vblank_request {
Tao Baod7db5942015-01-28 10:07:51 -0800283 enum drm_vblank_seq_type type;
284 unsigned int sequence;
285 unsigned long signal;
Ben Cheng655a7c02013-10-16 16:09:24 -0700286};
287struct drm_wait_vblank_reply {
Tao Baod7db5942015-01-28 10:07:51 -0800288 enum drm_vblank_seq_type type;
289 unsigned int sequence;
Tao Baod7db5942015-01-28 10:07:51 -0800290 long tval_sec;
291 long tval_usec;
Ben Cheng655a7c02013-10-16 16:09:24 -0700292};
Ben Cheng655a7c02013-10-16 16:09:24 -0700293union drm_wait_vblank {
Tao Baod7db5942015-01-28 10:07:51 -0800294 struct drm_wait_vblank_request request;
295 struct drm_wait_vblank_reply reply;
Ben Cheng655a7c02013-10-16 16:09:24 -0700296};
Ben Cheng655a7c02013-10-16 16:09:24 -0700297#define _DRM_PRE_MODESET 1
298#define _DRM_POST_MODESET 2
299struct drm_modeset_ctl {
Tao Baod7db5942015-01-28 10:07:51 -0800300 __u32 crtc;
301 __u32 cmd;
Ben Cheng655a7c02013-10-16 16:09:24 -0700302};
303struct drm_agp_mode {
Tao Baod7db5942015-01-28 10:07:51 -0800304 unsigned long mode;
Ben Cheng655a7c02013-10-16 16:09:24 -0700305};
306struct drm_agp_buffer {
Tao Baod7db5942015-01-28 10:07:51 -0800307 unsigned long size;
308 unsigned long handle;
309 unsigned long type;
Tao Baod7db5942015-01-28 10:07:51 -0800310 unsigned long physical;
Ben Cheng655a7c02013-10-16 16:09:24 -0700311};
312struct drm_agp_binding {
Tao Baod7db5942015-01-28 10:07:51 -0800313 unsigned long handle;
Tao Baod7db5942015-01-28 10:07:51 -0800314 unsigned long offset;
Ben Cheng655a7c02013-10-16 16:09:24 -0700315};
316struct drm_agp_info {
Tao Baod7db5942015-01-28 10:07:51 -0800317 int agp_version_major;
Tao Baod7db5942015-01-28 10:07:51 -0800318 int agp_version_minor;
319 unsigned long mode;
320 unsigned long aperture_base;
321 unsigned long aperture_size;
Tao Baod7db5942015-01-28 10:07:51 -0800322 unsigned long memory_allowed;
323 unsigned long memory_used;
324 unsigned short id_vendor;
325 unsigned short id_device;
Ben Cheng655a7c02013-10-16 16:09:24 -0700326};
327struct drm_scatter_gather {
Tao Baod7db5942015-01-28 10:07:51 -0800328 unsigned long size;
329 unsigned long handle;
Ben Cheng655a7c02013-10-16 16:09:24 -0700330};
331struct drm_set_version {
Tao Baod7db5942015-01-28 10:07:51 -0800332 int drm_di_major;
333 int drm_di_minor;
Tao Baod7db5942015-01-28 10:07:51 -0800334 int drm_dd_major;
335 int drm_dd_minor;
Ben Cheng655a7c02013-10-16 16:09:24 -0700336};
Ben Cheng655a7c02013-10-16 16:09:24 -0700337struct drm_gem_close {
Tao Baod7db5942015-01-28 10:07:51 -0800338 __u32 handle;
339 __u32 pad;
Ben Cheng655a7c02013-10-16 16:09:24 -0700340};
Ben Cheng655a7c02013-10-16 16:09:24 -0700341struct drm_gem_flink {
Tao Baod7db5942015-01-28 10:07:51 -0800342 __u32 handle;
343 __u32 name;
Ben Cheng655a7c02013-10-16 16:09:24 -0700344};
Ben Cheng655a7c02013-10-16 16:09:24 -0700345struct drm_gem_open {
Tao Baod7db5942015-01-28 10:07:51 -0800346 __u32 name;
347 __u32 handle;
348 __u64 size;
Ben Cheng655a7c02013-10-16 16:09:24 -0700349};
Christopher Ferris38062f92014-07-09 15:33:25 -0700350#define DRM_CAP_DUMB_BUFFER 0x1
351#define DRM_CAP_VBLANK_HIGH_CRTC 0x2
352#define DRM_CAP_DUMB_PREFERRED_DEPTH 0x3
353#define DRM_CAP_DUMB_PREFER_SHADOW 0x4
Christopher Ferris38062f92014-07-09 15:33:25 -0700354#define DRM_CAP_PRIME 0x5
355#define DRM_PRIME_CAP_IMPORT 0x1
356#define DRM_PRIME_CAP_EXPORT 0x2
357#define DRM_CAP_TIMESTAMP_MONOTONIC 0x6
Christopher Ferris38062f92014-07-09 15:33:25 -0700358#define DRM_CAP_ASYNC_PAGE_FLIP 0x7
359#define DRM_CAP_CURSOR_WIDTH 0x8
360#define DRM_CAP_CURSOR_HEIGHT 0x9
Christopher Ferris05d08e92016-02-04 13:16:38 -0800361#define DRM_CAP_ADDFB2_MODIFIERS 0x10
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800362#define DRM_CAP_PAGE_FLIP_TARGET 0x11
Christopher Ferris525ce912017-07-26 13:12:53 -0700363#define DRM_CAP_CRTC_IN_VBLANK_EVENT 0x12
Christopher Ferris1308ad32017-11-14 17:32:13 -0800364#define DRM_CAP_SYNCOBJ 0x13
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800365struct drm_get_cap {
Tao Baod7db5942015-01-28 10:07:51 -0800366 __u64 capability;
367 __u64 value;
Ben Cheng655a7c02013-10-16 16:09:24 -0700368};
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800369#define DRM_CLIENT_CAP_STEREO_3D 1
Christopher Ferrisba8d4f42014-09-03 19:56:49 -0700370#define DRM_CLIENT_CAP_UNIVERSAL_PLANES 2
Christopher Ferris05d08e92016-02-04 13:16:38 -0800371#define DRM_CLIENT_CAP_ATOMIC 3
Christopher Ferris38062f92014-07-09 15:33:25 -0700372struct drm_set_client_cap {
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800373 __u64 capability;
Tao Baod7db5942015-01-28 10:07:51 -0800374 __u64 value;
Christopher Ferrisba8d4f42014-09-03 19:56:49 -0700375};
Christopher Ferris106b3a82016-08-24 12:15:38 -0700376#define DRM_RDWR O_RDWR
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800377#define DRM_CLOEXEC O_CLOEXEC
Ben Cheng655a7c02013-10-16 16:09:24 -0700378struct drm_prime_handle {
Tao Baod7db5942015-01-28 10:07:51 -0800379 __u32 handle;
Tao Baod7db5942015-01-28 10:07:51 -0800380 __u32 flags;
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800381 __s32 fd;
Ben Cheng655a7c02013-10-16 16:09:24 -0700382};
Christopher Ferris1308ad32017-11-14 17:32:13 -0800383struct drm_syncobj_create {
384 __u32 handle;
385#define DRM_SYNCOBJ_CREATE_SIGNALED (1 << 0)
386 __u32 flags;
387};
388struct drm_syncobj_destroy {
389 __u32 handle;
390 __u32 pad;
391};
392#define DRM_SYNCOBJ_FD_TO_HANDLE_FLAGS_IMPORT_SYNC_FILE (1 << 0)
393#define DRM_SYNCOBJ_HANDLE_TO_FD_FLAGS_EXPORT_SYNC_FILE (1 << 0)
394struct drm_syncobj_handle {
395 __u32 handle;
396 __u32 flags;
397 __s32 fd;
398 __u32 pad;
399};
400#define DRM_SYNCOBJ_WAIT_FLAGS_WAIT_ALL (1 << 0)
401#define DRM_SYNCOBJ_WAIT_FLAGS_WAIT_FOR_SUBMIT (1 << 1)
402struct drm_syncobj_wait {
403 __u64 handles;
404 __s64 timeout_nsec;
405 __u32 count_handles;
406 __u32 flags;
407 __u32 first_signaled;
408 __u32 pad;
409};
410struct drm_syncobj_array {
411 __u64 handles;
412 __u32 count_handles;
413 __u32 pad;
414};
Christopher Ferris934ec942018-01-31 15:29:16 -0800415struct drm_crtc_get_sequence {
416 __u32 crtc_id;
417 __u32 active;
418 __u64 sequence;
419 __s64 sequence_ns;
420};
421#define DRM_CRTC_SEQUENCE_RELATIVE 0x00000001
422#define DRM_CRTC_SEQUENCE_NEXT_ON_MISS 0x00000002
423struct drm_crtc_queue_sequence {
424 __u32 crtc_id;
425 __u32 flags;
426 __u64 sequence;
427 __u64 user_data;
428};
Christopher Ferris106b3a82016-08-24 12:15:38 -0700429#ifdef __cplusplus
430#endif
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800431#include "drm_mode.h"
Christopher Ferris106b3a82016-08-24 12:15:38 -0700432#ifdef __cplusplus
433#endif
Christopher Ferrisba8d4f42014-09-03 19:56:49 -0700434#define DRM_IOCTL_BASE 'd'
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800435#define DRM_IO(nr) _IO(DRM_IOCTL_BASE, nr)
Tao Baod7db5942015-01-28 10:07:51 -0800436#define DRM_IOR(nr,type) _IOR(DRM_IOCTL_BASE, nr, type)
437#define DRM_IOW(nr,type) _IOW(DRM_IOCTL_BASE, nr, type)
Tao Baod7db5942015-01-28 10:07:51 -0800438#define DRM_IOWR(nr,type) _IOWR(DRM_IOCTL_BASE, nr, type)
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800439#define DRM_IOCTL_VERSION DRM_IOWR(0x00, struct drm_version)
Ben Cheng655a7c02013-10-16 16:09:24 -0700440#define DRM_IOCTL_GET_UNIQUE DRM_IOWR(0x01, struct drm_unique)
Tao Baod7db5942015-01-28 10:07:51 -0800441#define DRM_IOCTL_GET_MAGIC DRM_IOR(0x02, struct drm_auth)
Christopher Ferrisba8d4f42014-09-03 19:56:49 -0700442#define DRM_IOCTL_IRQ_BUSID DRM_IOWR(0x03, struct drm_irq_busid)
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800443#define DRM_IOCTL_GET_MAP DRM_IOWR(0x04, struct drm_map)
Ben Cheng655a7c02013-10-16 16:09:24 -0700444#define DRM_IOCTL_GET_CLIENT DRM_IOWR(0x05, struct drm_client)
Tao Baod7db5942015-01-28 10:07:51 -0800445#define DRM_IOCTL_GET_STATS DRM_IOR(0x06, struct drm_stats)
Christopher Ferrisba8d4f42014-09-03 19:56:49 -0700446#define DRM_IOCTL_SET_VERSION DRM_IOWR(0x07, struct drm_set_version)
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800447#define DRM_IOCTL_MODESET_CTL DRM_IOW(0x08, struct drm_modeset_ctl)
Tao Baod7db5942015-01-28 10:07:51 -0800448#define DRM_IOCTL_GEM_CLOSE DRM_IOW(0x09, struct drm_gem_close)
Ben Cheng655a7c02013-10-16 16:09:24 -0700449#define DRM_IOCTL_GEM_FLINK DRM_IOWR(0x0a, struct drm_gem_flink)
Christopher Ferrisba8d4f42014-09-03 19:56:49 -0700450#define DRM_IOCTL_GEM_OPEN DRM_IOWR(0x0b, struct drm_gem_open)
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800451#define DRM_IOCTL_GET_CAP DRM_IOWR(0x0c, struct drm_get_cap)
Tao Baod7db5942015-01-28 10:07:51 -0800452#define DRM_IOCTL_SET_CLIENT_CAP DRM_IOW(0x0d, struct drm_set_client_cap)
453#define DRM_IOCTL_SET_UNIQUE DRM_IOW(0x10, struct drm_unique)
Tao Baod7db5942015-01-28 10:07:51 -0800454#define DRM_IOCTL_AUTH_MAGIC DRM_IOW(0x11, struct drm_auth)
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800455#define DRM_IOCTL_BLOCK DRM_IOWR(0x12, struct drm_block)
Ben Cheng655a7c02013-10-16 16:09:24 -0700456#define DRM_IOCTL_UNBLOCK DRM_IOWR(0x13, struct drm_block)
Tao Baod7db5942015-01-28 10:07:51 -0800457#define DRM_IOCTL_CONTROL DRM_IOW(0x14, struct drm_control)
Christopher Ferrisba8d4f42014-09-03 19:56:49 -0700458#define DRM_IOCTL_ADD_MAP DRM_IOWR(0x15, struct drm_map)
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800459#define DRM_IOCTL_ADD_BUFS DRM_IOWR(0x16, struct drm_buf_desc)
Tao Baod7db5942015-01-28 10:07:51 -0800460#define DRM_IOCTL_MARK_BUFS DRM_IOW(0x17, struct drm_buf_desc)
Ben Cheng655a7c02013-10-16 16:09:24 -0700461#define DRM_IOCTL_INFO_BUFS DRM_IOWR(0x18, struct drm_buf_info)
Christopher Ferrisba8d4f42014-09-03 19:56:49 -0700462#define DRM_IOCTL_MAP_BUFS DRM_IOWR(0x19, struct drm_buf_map)
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800463#define DRM_IOCTL_FREE_BUFS DRM_IOW(0x1a, struct drm_buf_free)
Tao Baod7db5942015-01-28 10:07:51 -0800464#define DRM_IOCTL_RM_MAP DRM_IOW(0x1b, struct drm_map)
465#define DRM_IOCTL_SET_SAREA_CTX DRM_IOW(0x1c, struct drm_ctx_priv_map)
Christopher Ferrisba8d4f42014-09-03 19:56:49 -0700466#define DRM_IOCTL_GET_SAREA_CTX DRM_IOWR(0x1d, struct drm_ctx_priv_map)
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800467#define DRM_IOCTL_SET_MASTER DRM_IO(0x1e)
Ben Cheng655a7c02013-10-16 16:09:24 -0700468#define DRM_IOCTL_DROP_MASTER DRM_IO(0x1f)
469#define DRM_IOCTL_ADD_CTX DRM_IOWR(0x20, struct drm_ctx)
Christopher Ferrisba8d4f42014-09-03 19:56:49 -0700470#define DRM_IOCTL_RM_CTX DRM_IOWR(0x21, struct drm_ctx)
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800471#define DRM_IOCTL_MOD_CTX DRM_IOW(0x22, struct drm_ctx)
Ben Cheng655a7c02013-10-16 16:09:24 -0700472#define DRM_IOCTL_GET_CTX DRM_IOWR(0x23, struct drm_ctx)
Tao Baod7db5942015-01-28 10:07:51 -0800473#define DRM_IOCTL_SWITCH_CTX DRM_IOW(0x24, struct drm_ctx)
Tao Baod7db5942015-01-28 10:07:51 -0800474#define DRM_IOCTL_NEW_CTX DRM_IOW(0x25, struct drm_ctx)
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800475#define DRM_IOCTL_RES_CTX DRM_IOWR(0x26, struct drm_ctx_res)
Ben Cheng655a7c02013-10-16 16:09:24 -0700476#define DRM_IOCTL_ADD_DRAW DRM_IOWR(0x27, struct drm_draw)
477#define DRM_IOCTL_RM_DRAW DRM_IOWR(0x28, struct drm_draw)
Christopher Ferrisba8d4f42014-09-03 19:56:49 -0700478#define DRM_IOCTL_DMA DRM_IOWR(0x29, struct drm_dma)
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800479#define DRM_IOCTL_LOCK DRM_IOW(0x2a, struct drm_lock)
Tao Baod7db5942015-01-28 10:07:51 -0800480#define DRM_IOCTL_UNLOCK DRM_IOW(0x2b, struct drm_lock)
481#define DRM_IOCTL_FINISH DRM_IOW(0x2c, struct drm_lock)
Christopher Ferrisba8d4f42014-09-03 19:56:49 -0700482#define DRM_IOCTL_PRIME_HANDLE_TO_FD DRM_IOWR(0x2d, struct drm_prime_handle)
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800483#define DRM_IOCTL_PRIME_FD_TO_HANDLE DRM_IOWR(0x2e, struct drm_prime_handle)
Tao Baod7db5942015-01-28 10:07:51 -0800484#define DRM_IOCTL_AGP_ACQUIRE DRM_IO(0x30)
485#define DRM_IOCTL_AGP_RELEASE DRM_IO(0x31)
Tao Baod7db5942015-01-28 10:07:51 -0800486#define DRM_IOCTL_AGP_ENABLE DRM_IOW(0x32, struct drm_agp_mode)
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800487#define DRM_IOCTL_AGP_INFO DRM_IOR(0x33, struct drm_agp_info)
Ben Cheng655a7c02013-10-16 16:09:24 -0700488#define DRM_IOCTL_AGP_ALLOC DRM_IOWR(0x34, struct drm_agp_buffer)
Tao Baod7db5942015-01-28 10:07:51 -0800489#define DRM_IOCTL_AGP_FREE DRM_IOW(0x35, struct drm_agp_buffer)
Tao Baod7db5942015-01-28 10:07:51 -0800490#define DRM_IOCTL_AGP_BIND DRM_IOW(0x36, struct drm_agp_binding)
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800491#define DRM_IOCTL_AGP_UNBIND DRM_IOW(0x37, struct drm_agp_binding)
Ben Cheng655a7c02013-10-16 16:09:24 -0700492#define DRM_IOCTL_SG_ALLOC DRM_IOWR(0x38, struct drm_scatter_gather)
Tao Baod7db5942015-01-28 10:07:51 -0800493#define DRM_IOCTL_SG_FREE DRM_IOW(0x39, struct drm_scatter_gather)
Christopher Ferrisba8d4f42014-09-03 19:56:49 -0700494#define DRM_IOCTL_WAIT_VBLANK DRM_IOWR(0x3a, union drm_wait_vblank)
Christopher Ferris934ec942018-01-31 15:29:16 -0800495#define DRM_IOCTL_CRTC_GET_SEQUENCE DRM_IOWR(0x3b, struct drm_crtc_get_sequence)
496#define DRM_IOCTL_CRTC_QUEUE_SEQUENCE DRM_IOWR(0x3c, struct drm_crtc_queue_sequence)
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800497#define DRM_IOCTL_UPDATE_DRAW DRM_IOW(0x3f, struct drm_update_draw)
Ben Cheng655a7c02013-10-16 16:09:24 -0700498#define DRM_IOCTL_MODE_GETRESOURCES DRM_IOWR(0xA0, struct drm_mode_card_res)
499#define DRM_IOCTL_MODE_GETCRTC DRM_IOWR(0xA1, struct drm_mode_crtc)
Christopher Ferrisba8d4f42014-09-03 19:56:49 -0700500#define DRM_IOCTL_MODE_SETCRTC DRM_IOWR(0xA2, struct drm_mode_crtc)
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800501#define DRM_IOCTL_MODE_CURSOR DRM_IOWR(0xA3, struct drm_mode_cursor)
Ben Cheng655a7c02013-10-16 16:09:24 -0700502#define DRM_IOCTL_MODE_GETGAMMA DRM_IOWR(0xA4, struct drm_mode_crtc_lut)
503#define DRM_IOCTL_MODE_SETGAMMA DRM_IOWR(0xA5, struct drm_mode_crtc_lut)
Christopher Ferrisba8d4f42014-09-03 19:56:49 -0700504#define DRM_IOCTL_MODE_GETENCODER DRM_IOWR(0xA6, struct drm_mode_get_encoder)
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800505#define DRM_IOCTL_MODE_GETCONNECTOR DRM_IOWR(0xA7, struct drm_mode_get_connector)
Ben Cheng655a7c02013-10-16 16:09:24 -0700506#define DRM_IOCTL_MODE_ATTACHMODE DRM_IOWR(0xA8, struct drm_mode_mode_cmd)
507#define DRM_IOCTL_MODE_DETACHMODE DRM_IOWR(0xA9, struct drm_mode_mode_cmd)
Christopher Ferrisba8d4f42014-09-03 19:56:49 -0700508#define DRM_IOCTL_MODE_GETPROPERTY DRM_IOWR(0xAA, struct drm_mode_get_property)
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800509#define DRM_IOCTL_MODE_SETPROPERTY DRM_IOWR(0xAB, struct drm_mode_connector_set_property)
Ben Cheng655a7c02013-10-16 16:09:24 -0700510#define DRM_IOCTL_MODE_GETPROPBLOB DRM_IOWR(0xAC, struct drm_mode_get_blob)
511#define DRM_IOCTL_MODE_GETFB DRM_IOWR(0xAD, struct drm_mode_fb_cmd)
Christopher Ferrisba8d4f42014-09-03 19:56:49 -0700512#define DRM_IOCTL_MODE_ADDFB DRM_IOWR(0xAE, struct drm_mode_fb_cmd)
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800513#define DRM_IOCTL_MODE_RMFB DRM_IOWR(0xAF, unsigned int)
Ben Cheng655a7c02013-10-16 16:09:24 -0700514#define DRM_IOCTL_MODE_PAGE_FLIP DRM_IOWR(0xB0, struct drm_mode_crtc_page_flip)
515#define DRM_IOCTL_MODE_DIRTYFB DRM_IOWR(0xB1, struct drm_mode_fb_dirty_cmd)
Christopher Ferrisba8d4f42014-09-03 19:56:49 -0700516#define DRM_IOCTL_MODE_CREATE_DUMB DRM_IOWR(0xB2, struct drm_mode_create_dumb)
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800517#define DRM_IOCTL_MODE_MAP_DUMB DRM_IOWR(0xB3, struct drm_mode_map_dumb)
Ben Cheng655a7c02013-10-16 16:09:24 -0700518#define DRM_IOCTL_MODE_DESTROY_DUMB DRM_IOWR(0xB4, struct drm_mode_destroy_dumb)
519#define DRM_IOCTL_MODE_GETPLANERESOURCES DRM_IOWR(0xB5, struct drm_mode_get_plane_res)
Christopher Ferrisba8d4f42014-09-03 19:56:49 -0700520#define DRM_IOCTL_MODE_GETPLANE DRM_IOWR(0xB6, struct drm_mode_get_plane)
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800521#define DRM_IOCTL_MODE_SETPLANE DRM_IOWR(0xB7, struct drm_mode_set_plane)
Ben Cheng655a7c02013-10-16 16:09:24 -0700522#define DRM_IOCTL_MODE_ADDFB2 DRM_IOWR(0xB8, struct drm_mode_fb_cmd2)
523#define DRM_IOCTL_MODE_OBJ_GETPROPERTIES DRM_IOWR(0xB9, struct drm_mode_obj_get_properties)
Christopher Ferrisba8d4f42014-09-03 19:56:49 -0700524#define DRM_IOCTL_MODE_OBJ_SETPROPERTY DRM_IOWR(0xBA, struct drm_mode_obj_set_property)
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800525#define DRM_IOCTL_MODE_CURSOR2 DRM_IOWR(0xBB, struct drm_mode_cursor2)
Christopher Ferris05d08e92016-02-04 13:16:38 -0800526#define DRM_IOCTL_MODE_ATOMIC DRM_IOWR(0xBC, struct drm_mode_atomic)
527#define DRM_IOCTL_MODE_CREATEPROPBLOB DRM_IOWR(0xBD, struct drm_mode_create_blob)
528#define DRM_IOCTL_MODE_DESTROYPROPBLOB DRM_IOWR(0xBE, struct drm_mode_destroy_blob)
Christopher Ferris1308ad32017-11-14 17:32:13 -0800529#define DRM_IOCTL_SYNCOBJ_CREATE DRM_IOWR(0xBF, struct drm_syncobj_create)
530#define DRM_IOCTL_SYNCOBJ_DESTROY DRM_IOWR(0xC0, struct drm_syncobj_destroy)
531#define DRM_IOCTL_SYNCOBJ_HANDLE_TO_FD DRM_IOWR(0xC1, struct drm_syncobj_handle)
532#define DRM_IOCTL_SYNCOBJ_FD_TO_HANDLE DRM_IOWR(0xC2, struct drm_syncobj_handle)
533#define DRM_IOCTL_SYNCOBJ_WAIT DRM_IOWR(0xC3, struct drm_syncobj_wait)
534#define DRM_IOCTL_SYNCOBJ_RESET DRM_IOWR(0xC4, struct drm_syncobj_array)
535#define DRM_IOCTL_SYNCOBJ_SIGNAL DRM_IOWR(0xC5, struct drm_syncobj_array)
Christopher Ferris934ec942018-01-31 15:29:16 -0800536#define DRM_IOCTL_MODE_CREATE_LEASE DRM_IOWR(0xC6, struct drm_mode_create_lease)
537#define DRM_IOCTL_MODE_LIST_LESSEES DRM_IOWR(0xC7, struct drm_mode_list_lessees)
538#define DRM_IOCTL_MODE_GET_LEASE DRM_IOWR(0xC8, struct drm_mode_get_lease)
539#define DRM_IOCTL_MODE_REVOKE_LEASE DRM_IOWR(0xC9, struct drm_mode_revoke_lease)
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800540#define DRM_COMMAND_BASE 0x40
Christopher Ferris05d08e92016-02-04 13:16:38 -0800541#define DRM_COMMAND_END 0xA0
Christopher Ferrisba8d4f42014-09-03 19:56:49 -0700542struct drm_event {
Tao Baod7db5942015-01-28 10:07:51 -0800543 __u32 type;
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800544 __u32 length;
Christopher Ferris05d08e92016-02-04 13:16:38 -0800545};
Christopher Ferrisba8d4f42014-09-03 19:56:49 -0700546#define DRM_EVENT_VBLANK 0x01
Christopher Ferris38062f92014-07-09 15:33:25 -0700547#define DRM_EVENT_FLIP_COMPLETE 0x02
Christopher Ferris934ec942018-01-31 15:29:16 -0800548#define DRM_EVENT_CRTC_SEQUENCE 0x03
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800549struct drm_event_vblank {
Christopher Ferris05d08e92016-02-04 13:16:38 -0800550 struct drm_event base;
Tao Baod7db5942015-01-28 10:07:51 -0800551 __u64 user_data;
552 __u32 tv_sec;
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800553 __u32 tv_usec;
Christopher Ferris05d08e92016-02-04 13:16:38 -0800554 __u32 sequence;
Christopher Ferris525ce912017-07-26 13:12:53 -0700555 __u32 crtc_id;
Ben Cheng655a7c02013-10-16 16:09:24 -0700556};
Christopher Ferris934ec942018-01-31 15:29:16 -0800557struct drm_event_crtc_sequence {
558 struct drm_event base;
559 __u64 user_data;
560 __s64 time_ns;
561 __u64 sequence;
562};
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800563typedef struct drm_clip_rect drm_clip_rect_t;
Christopher Ferris05d08e92016-02-04 13:16:38 -0800564typedef struct drm_drawable_info drm_drawable_info_t;
Christopher Ferrisba8d4f42014-09-03 19:56:49 -0700565typedef struct drm_tex_region drm_tex_region_t;
Christopher Ferris38062f92014-07-09 15:33:25 -0700566typedef struct drm_hw_lock drm_hw_lock_t;
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800567typedef struct drm_version drm_version_t;
Christopher Ferris05d08e92016-02-04 13:16:38 -0800568typedef struct drm_unique drm_unique_t;
Christopher Ferrisba8d4f42014-09-03 19:56:49 -0700569typedef struct drm_list drm_list_t;
Christopher Ferris38062f92014-07-09 15:33:25 -0700570typedef struct drm_block drm_block_t;
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800571typedef struct drm_control drm_control_t;
Christopher Ferris05d08e92016-02-04 13:16:38 -0800572typedef enum drm_map_type drm_map_type_t;
Christopher Ferrisba8d4f42014-09-03 19:56:49 -0700573typedef enum drm_map_flags drm_map_flags_t;
Christopher Ferris38062f92014-07-09 15:33:25 -0700574typedef struct drm_ctx_priv_map drm_ctx_priv_map_t;
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800575typedef struct drm_map drm_map_t;
Christopher Ferris05d08e92016-02-04 13:16:38 -0800576typedef struct drm_client drm_client_t;
Christopher Ferrisba8d4f42014-09-03 19:56:49 -0700577typedef enum drm_stat_type drm_stat_type_t;
Christopher Ferris38062f92014-07-09 15:33:25 -0700578typedef struct drm_stats drm_stats_t;
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800579typedef enum drm_lock_flags drm_lock_flags_t;
Christopher Ferris05d08e92016-02-04 13:16:38 -0800580typedef struct drm_lock drm_lock_t;
Christopher Ferrisba8d4f42014-09-03 19:56:49 -0700581typedef enum drm_dma_flags drm_dma_flags_t;
Christopher Ferris38062f92014-07-09 15:33:25 -0700582typedef struct drm_buf_desc drm_buf_desc_t;
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800583typedef struct drm_buf_info drm_buf_info_t;
Christopher Ferris05d08e92016-02-04 13:16:38 -0800584typedef struct drm_buf_free drm_buf_free_t;
Christopher Ferrisba8d4f42014-09-03 19:56:49 -0700585typedef struct drm_buf_pub drm_buf_pub_t;
Christopher Ferris38062f92014-07-09 15:33:25 -0700586typedef struct drm_buf_map drm_buf_map_t;
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800587typedef struct drm_dma drm_dma_t;
Christopher Ferris05d08e92016-02-04 13:16:38 -0800588typedef union drm_wait_vblank drm_wait_vblank_t;
Christopher Ferrisba8d4f42014-09-03 19:56:49 -0700589typedef struct drm_agp_mode drm_agp_mode_t;
Christopher Ferris38062f92014-07-09 15:33:25 -0700590typedef enum drm_ctx_flags drm_ctx_flags_t;
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800591typedef struct drm_ctx drm_ctx_t;
Christopher Ferris05d08e92016-02-04 13:16:38 -0800592typedef struct drm_ctx_res drm_ctx_res_t;
Christopher Ferrisba8d4f42014-09-03 19:56:49 -0700593typedef struct drm_draw drm_draw_t;
Christopher Ferris38062f92014-07-09 15:33:25 -0700594typedef struct drm_update_draw drm_update_draw_t;
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800595typedef struct drm_auth drm_auth_t;
Christopher Ferris05d08e92016-02-04 13:16:38 -0800596typedef struct drm_irq_busid drm_irq_busid_t;
Christopher Ferrisba8d4f42014-09-03 19:56:49 -0700597typedef enum drm_vblank_seq_type drm_vblank_seq_type_t;
Christopher Ferris38062f92014-07-09 15:33:25 -0700598typedef struct drm_agp_buffer drm_agp_buffer_t;
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800599typedef struct drm_agp_binding drm_agp_binding_t;
Christopher Ferris05d08e92016-02-04 13:16:38 -0800600typedef struct drm_agp_info drm_agp_info_t;
Christopher Ferrisba8d4f42014-09-03 19:56:49 -0700601typedef struct drm_scatter_gather drm_scatter_gather_t;
Christopher Ferris38062f92014-07-09 15:33:25 -0700602typedef struct drm_set_version drm_set_version_t;
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800603#ifdef __cplusplus
Christopher Ferris106b3a82016-08-24 12:15:38 -0700604#endif
605#endif