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Christopher Ferris6a9755d2017-01-13 14:09:31 -08001/****************************************************************************
2 ****************************************************************************
3 ***
4 *** This header was automatically generated from a Linux kernel header
5 *** of the same name, to make information necessary for userspace to
6 *** call into the kernel available to libc. It contains only constants,
7 *** structures, and macros generated from the original header, and thus,
8 *** contains no copyrightable information.
9 ***
10 *** To edit the content of this header, modify the corresponding
11 *** source file (e.g. under external/kernel-headers/original/) then
12 *** run bionic/libc/kernel/tools/update_all.py
13 ***
14 *** Any manual change here will be lost the next time this script will
15 *** be run. You've been warned!
16 ***
17 ****************************************************************************
18 ****************************************************************************/
19#ifndef MLX5_ABI_USER_H
20#define MLX5_ABI_USER_H
21#include <linux/types.h>
Christopher Ferris525ce912017-07-26 13:12:53 -070022#include <linux/if_ether.h>
Christopher Ferris9ce28842018-10-25 12:11:39 -070023#include <rdma/ib_user_ioctl_verbs.h>
Christopher Ferris6a9755d2017-01-13 14:09:31 -080024enum {
Christopher Ferris6a9755d2017-01-13 14:09:31 -080025 MLX5_QP_FLAG_SIGNATURE = 1 << 0,
26 MLX5_QP_FLAG_SCATTER_CQE = 1 << 1,
Christopher Ferris934ec942018-01-31 15:29:16 -080027 MLX5_QP_FLAG_TUNNEL_OFFLOADS = 1 << 2,
Christopher Ferris76a1d452018-06-27 14:12:29 -070028 MLX5_QP_FLAG_BFREG_INDEX = 1 << 3,
29 MLX5_QP_FLAG_TYPE_DCT = 1 << 4,
30 MLX5_QP_FLAG_TYPE_DCI = 1 << 5,
Christopher Ferris86a48372019-01-10 14:14:59 -080031 MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_UC = 1 << 6,
32 MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_MC = 1 << 7,
33 MLX5_QP_FLAG_ALLOW_SCATTER_CQE = 1 << 8,
Christopher Ferrisd842e432019-03-07 10:21:59 -080034 MLX5_QP_FLAG_PACKET_BASED_CREDIT_MODE = 1 << 9,
Christopher Ferrisaf09c702020-06-01 20:29:29 -070035 MLX5_QP_FLAG_UAR_PAGE_INDEX = 1 << 10,
Christopher Ferris2abfa9e2021-11-01 16:26:06 -070036 MLX5_QP_FLAG_DCI_STREAM = 1 << 11,
Christopher Ferris6a9755d2017-01-13 14:09:31 -080037};
38enum {
Christopher Ferris6a9755d2017-01-13 14:09:31 -080039 MLX5_SRQ_FLAG_SIGNATURE = 1 << 0,
40};
41enum {
42 MLX5_WQ_FLAG_SIGNATURE = 1 << 0,
Christopher Ferris6a9755d2017-01-13 14:09:31 -080043};
44#define MLX5_IB_UVERBS_ABI_VERSION 1
45struct mlx5_ib_alloc_ucontext_req {
Christopher Ferris525ce912017-07-26 13:12:53 -070046 __u32 total_num_bfregs;
47 __u32 num_low_latency_bfregs;
48};
49enum mlx5_lib_caps {
50 MLX5_LIB_CAP_4K_UAR = (__u64) 1 << 0,
Christopher Ferrisaf09c702020-06-01 20:29:29 -070051 MLX5_LIB_CAP_DYN_UAR = (__u64) 1 << 1,
Christopher Ferris6a9755d2017-01-13 14:09:31 -080052};
Christopher Ferris9ce28842018-10-25 12:11:39 -070053enum mlx5_ib_alloc_uctx_v2_flags {
54 MLX5_IB_ALLOC_UCTX_DEVX = 1 << 0,
55};
Christopher Ferris6a9755d2017-01-13 14:09:31 -080056struct mlx5_ib_alloc_ucontext_req_v2 {
Christopher Ferris525ce912017-07-26 13:12:53 -070057 __u32 total_num_bfregs;
58 __u32 num_low_latency_bfregs;
Christopher Ferris6a9755d2017-01-13 14:09:31 -080059 __u32 flags;
60 __u32 comp_mask;
61 __u8 max_cqe_version;
Christopher Ferris6a9755d2017-01-13 14:09:31 -080062 __u8 reserved0;
63 __u16 reserved1;
64 __u32 reserved2;
Christopher Ferris76a1d452018-06-27 14:12:29 -070065 __aligned_u64 lib_caps;
Christopher Ferris6a9755d2017-01-13 14:09:31 -080066};
Christopher Ferris6a9755d2017-01-13 14:09:31 -080067enum mlx5_ib_alloc_ucontext_resp_mask {
68 MLX5_IB_ALLOC_UCONTEXT_RESP_MASK_CORE_CLOCK_OFFSET = 1UL << 0,
Christopher Ferris9ce28842018-10-25 12:11:39 -070069 MLX5_IB_ALLOC_UCONTEXT_RESP_MASK_DUMP_FILL_MKEY = 1UL << 1,
Christopher Ferris8177cdf2020-08-03 11:53:55 -070070 MLX5_IB_ALLOC_UCONTEXT_RESP_MASK_ECE = 1UL << 2,
Christopher Ferris3a39c0b2021-09-02 00:03:38 +000071 MLX5_IB_ALLOC_UCONTEXT_RESP_MASK_SQD2RTS = 1UL << 3,
72 MLX5_IB_ALLOC_UCONTEXT_RESP_MASK_REAL_TIME_TS = 1UL << 4,
Christopher Ferris6a9755d2017-01-13 14:09:31 -080073};
74enum mlx5_user_cmds_supp_uhw {
Christopher Ferris6a9755d2017-01-13 14:09:31 -080075 MLX5_USER_CMDS_SUPP_UHW_QUERY_DEVICE = 1 << 0,
Christopher Ferris48af7cb2017-02-21 12:35:09 -080076 MLX5_USER_CMDS_SUPP_UHW_CREATE_AH = 1 << 1,
Christopher Ferris6a9755d2017-01-13 14:09:31 -080077};
Christopher Ferris525ce912017-07-26 13:12:53 -070078enum mlx5_user_inline_mode {
79 MLX5_USER_INLINE_MODE_NA,
80 MLX5_USER_INLINE_MODE_NONE,
81 MLX5_USER_INLINE_MODE_L2,
82 MLX5_USER_INLINE_MODE_IP,
83 MLX5_USER_INLINE_MODE_TCP_UDP,
84};
Christopher Ferris76a1d452018-06-27 14:12:29 -070085enum {
86 MLX5_USER_ALLOC_UCONTEXT_FLOW_ACTION_FLAGS_ESP_AES_GCM = 1 << 0,
87 MLX5_USER_ALLOC_UCONTEXT_FLOW_ACTION_FLAGS_ESP_AES_GCM_REQ_METADATA = 1 << 1,
88 MLX5_USER_ALLOC_UCONTEXT_FLOW_ACTION_FLAGS_ESP_AES_GCM_SPI_STEERING = 1 << 2,
89 MLX5_USER_ALLOC_UCONTEXT_FLOW_ACTION_FLAGS_ESP_AES_GCM_FULL_OFFLOAD = 1 << 3,
90 MLX5_USER_ALLOC_UCONTEXT_FLOW_ACTION_FLAGS_ESP_AES_GCM_TX_IV_IS_ESN = 1 << 4,
91};
Christopher Ferris6a9755d2017-01-13 14:09:31 -080092struct mlx5_ib_alloc_ucontext_resp {
Christopher Ferris48af7cb2017-02-21 12:35:09 -080093 __u32 qp_tab_size;
Christopher Ferris6a9755d2017-01-13 14:09:31 -080094 __u32 bf_reg_size;
Christopher Ferris525ce912017-07-26 13:12:53 -070095 __u32 tot_bfregs;
Christopher Ferris6a9755d2017-01-13 14:09:31 -080096 __u32 cache_line_size;
Christopher Ferris48af7cb2017-02-21 12:35:09 -080097 __u16 max_sq_desc_sz;
Christopher Ferris6a9755d2017-01-13 14:09:31 -080098 __u16 max_rq_desc_sz;
99 __u32 max_send_wqebb;
100 __u32 max_recv_wr;
Christopher Ferris48af7cb2017-02-21 12:35:09 -0800101 __u32 max_srq_recv_wr;
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800102 __u16 num_ports;
Christopher Ferris76a1d452018-06-27 14:12:29 -0700103 __u16 flow_action_flags;
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800104 __u32 comp_mask;
Christopher Ferris48af7cb2017-02-21 12:35:09 -0800105 __u32 response_length;
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800106 __u8 cqe_version;
107 __u8 cmds_supp_uhw;
Christopher Ferris525ce912017-07-26 13:12:53 -0700108 __u8 eth_min_inline;
Christopher Ferris76a1d452018-06-27 14:12:29 -0700109 __u8 clock_info_versions;
110 __aligned_u64 hca_core_clock_offset;
Christopher Ferris525ce912017-07-26 13:12:53 -0700111 __u32 log_uar_size;
112 __u32 num_uars_per_page;
Christopher Ferris76a1d452018-06-27 14:12:29 -0700113 __u32 num_dyn_bfregs;
Christopher Ferris9ce28842018-10-25 12:11:39 -0700114 __u32 dump_fill_mkey;
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800115};
116struct mlx5_ib_alloc_pd_resp {
117 __u32 pdn;
Christopher Ferris48af7cb2017-02-21 12:35:09 -0800118};
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800119struct mlx5_ib_tso_caps {
120 __u32 max_tso;
121 __u32 supported_qpts;
Christopher Ferris48af7cb2017-02-21 12:35:09 -0800122};
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800123struct mlx5_ib_rss_caps {
Christopher Ferris76a1d452018-06-27 14:12:29 -0700124 __aligned_u64 rx_hash_fields_mask;
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800125 __u8 rx_hash_function;
126 __u8 reserved[7];
Christopher Ferris48af7cb2017-02-21 12:35:09 -0800127};
128enum mlx5_ib_cqe_comp_res_format {
129 MLX5_IB_CQE_RES_FORMAT_HASH = 1 << 0,
Christopher Ferris48af7cb2017-02-21 12:35:09 -0800130 MLX5_IB_CQE_RES_FORMAT_CSUM = 1 << 1,
Christopher Ferris9ce28842018-10-25 12:11:39 -0700131 MLX5_IB_CQE_RES_FORMAT_CSUM_STRIDX = 1 << 2,
Christopher Ferris48af7cb2017-02-21 12:35:09 -0800132};
133struct mlx5_ib_cqe_comp_caps {
Christopher Ferris48af7cb2017-02-21 12:35:09 -0800134 __u32 max_num;
135 __u32 supported_format;
136};
Christopher Ferris76a1d452018-06-27 14:12:29 -0700137enum mlx5_ib_packet_pacing_cap_flags {
138 MLX5_IB_PP_SUPPORT_BURST = 1 << 0,
139};
Christopher Ferris48af7cb2017-02-21 12:35:09 -0800140struct mlx5_packet_pacing_caps {
Christopher Ferris48af7cb2017-02-21 12:35:09 -0800141 __u32 qp_rate_limit_min;
142 __u32 qp_rate_limit_max;
143 __u32 supported_qpts;
Christopher Ferris76a1d452018-06-27 14:12:29 -0700144 __u8 cap_flags;
145 __u8 reserved[3];
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800146};
Christopher Ferris1308ad32017-11-14 17:32:13 -0800147enum mlx5_ib_mpw_caps {
148 MPW_RESERVED = 1 << 0,
149 MLX5_IB_ALLOW_MPW = 1 << 1,
150 MLX5_IB_SUPPORT_EMPW = 1 << 2,
151};
152enum mlx5_ib_sw_parsing_offloads {
153 MLX5_IB_SW_PARSING = 1 << 0,
154 MLX5_IB_SW_PARSING_CSUM = 1 << 1,
155 MLX5_IB_SW_PARSING_LSO = 1 << 2,
156};
157struct mlx5_ib_sw_parsing_caps {
158 __u32 sw_parsing_offloads;
159 __u32 supported_qpts;
160};
Christopher Ferris934ec942018-01-31 15:29:16 -0800161struct mlx5_ib_striding_rq_caps {
162 __u32 min_single_stride_log_num_of_bytes;
163 __u32 max_single_stride_log_num_of_bytes;
164 __u32 min_single_wqe_log_num_of_strides;
165 __u32 max_single_wqe_log_num_of_strides;
166 __u32 supported_qpts;
167 __u32 reserved;
168};
Christopher Ferris2abfa9e2021-11-01 16:26:06 -0700169struct mlx5_ib_dci_streams_caps {
170 __u8 max_log_num_concurent;
171 __u8 max_log_num_errored;
172};
Christopher Ferris934ec942018-01-31 15:29:16 -0800173enum mlx5_ib_query_dev_resp_flags {
174 MLX5_IB_QUERY_DEV_RESP_FLAGS_CQE_128B_COMP = 1 << 0,
175 MLX5_IB_QUERY_DEV_RESP_FLAGS_CQE_128B_PAD = 1 << 1,
Christopher Ferrisd842e432019-03-07 10:21:59 -0800176 MLX5_IB_QUERY_DEV_RESP_PACKET_BASED_CREDIT_MODE = 1 << 2,
Christopher Ferris24f97eb2019-05-20 12:58:13 -0700177 MLX5_IB_QUERY_DEV_RESP_FLAGS_SCAT2CQE_DCT = 1 << 3,
Christopher Ferris934ec942018-01-31 15:29:16 -0800178};
179enum mlx5_ib_tunnel_offloads {
180 MLX5_IB_TUNNELED_OFFLOADS_VXLAN = 1 << 0,
181 MLX5_IB_TUNNELED_OFFLOADS_GRE = 1 << 1,
Christopher Ferris9ce28842018-10-25 12:11:39 -0700182 MLX5_IB_TUNNELED_OFFLOADS_GENEVE = 1 << 2,
183 MLX5_IB_TUNNELED_OFFLOADS_MPLS_GRE = 1 << 3,
184 MLX5_IB_TUNNELED_OFFLOADS_MPLS_UDP = 1 << 4,
Christopher Ferris934ec942018-01-31 15:29:16 -0800185};
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800186struct mlx5_ib_query_device_resp {
187 __u32 comp_mask;
188 __u32 response_length;
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800189 struct mlx5_ib_tso_caps tso_caps;
190 struct mlx5_ib_rss_caps rss_caps;
Christopher Ferris48af7cb2017-02-21 12:35:09 -0800191 struct mlx5_ib_cqe_comp_caps cqe_comp_caps;
192 struct mlx5_packet_pacing_caps packet_pacing_caps;
Christopher Ferris48af7cb2017-02-21 12:35:09 -0800193 __u32 mlx5_ib_support_multi_pkt_send_wqes;
Christopher Ferris934ec942018-01-31 15:29:16 -0800194 __u32 flags;
Christopher Ferris1308ad32017-11-14 17:32:13 -0800195 struct mlx5_ib_sw_parsing_caps sw_parsing_caps;
Christopher Ferris934ec942018-01-31 15:29:16 -0800196 struct mlx5_ib_striding_rq_caps striding_rq_caps;
197 __u32 tunnel_offloads_caps;
Christopher Ferris2abfa9e2021-11-01 16:26:06 -0700198 struct mlx5_ib_dci_streams_caps dci_streams_caps;
199 __u16 reserved;
Christopher Ferris934ec942018-01-31 15:29:16 -0800200};
201enum mlx5_ib_create_cq_flags {
202 MLX5_IB_CREATE_CQ_FLAGS_CQE_128B_PAD = 1 << 0,
Christopher Ferrisaf09c702020-06-01 20:29:29 -0700203 MLX5_IB_CREATE_CQ_FLAGS_UAR_PAGE_INDEX = 1 << 1,
Christopher Ferris3a39c0b2021-09-02 00:03:38 +0000204 MLX5_IB_CREATE_CQ_FLAGS_REAL_TIME_TS = 1 << 2,
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800205};
206struct mlx5_ib_create_cq {
Christopher Ferris76a1d452018-06-27 14:12:29 -0700207 __aligned_u64 buf_addr;
208 __aligned_u64 db_addr;
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800209 __u32 cqe_size;
Christopher Ferris48af7cb2017-02-21 12:35:09 -0800210 __u8 cqe_comp_en;
Christopher Ferris48af7cb2017-02-21 12:35:09 -0800211 __u8 cqe_comp_res_format;
Christopher Ferris934ec942018-01-31 15:29:16 -0800212 __u16 flags;
Christopher Ferrisaf09c702020-06-01 20:29:29 -0700213 __u16 uar_page_index;
214 __u16 reserved0;
215 __u32 reserved1;
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800216};
217struct mlx5_ib_create_cq_resp {
218 __u32 cqn;
219 __u32 reserved;
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800220};
221struct mlx5_ib_resize_cq {
Christopher Ferris76a1d452018-06-27 14:12:29 -0700222 __aligned_u64 buf_addr;
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800223 __u16 cqe_size;
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800224 __u16 reserved0;
225 __u32 reserved1;
226};
227struct mlx5_ib_create_srq {
Christopher Ferris76a1d452018-06-27 14:12:29 -0700228 __aligned_u64 buf_addr;
229 __aligned_u64 db_addr;
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800230 __u32 flags;
231 __u32 reserved0;
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800232 __u32 uidx;
233 __u32 reserved1;
234};
235struct mlx5_ib_create_srq_resp {
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800236 __u32 srqn;
237 __u32 reserved;
238};
Christopher Ferris2abfa9e2021-11-01 16:26:06 -0700239struct mlx5_ib_create_qp_dci_streams {
240 __u8 log_num_concurent;
241 __u8 log_num_errored;
242};
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800243struct mlx5_ib_create_qp {
Christopher Ferris76a1d452018-06-27 14:12:29 -0700244 __aligned_u64 buf_addr;
245 __aligned_u64 db_addr;
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800246 __u32 sq_wqe_count;
247 __u32 rq_wqe_count;
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800248 __u32 rq_wqe_shift;
249 __u32 flags;
250 __u32 uidx;
Christopher Ferris76a1d452018-06-27 14:12:29 -0700251 __u32 bfreg_index;
252 union {
253 __aligned_u64 sq_buf_addr;
254 __aligned_u64 access_key;
255 };
Christopher Ferris8177cdf2020-08-03 11:53:55 -0700256 __u32 ece_options;
Christopher Ferris2abfa9e2021-11-01 16:26:06 -0700257 struct mlx5_ib_create_qp_dci_streams dci_streams;
258 __u16 reserved;
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800259};
260enum mlx5_rx_hash_function_flags {
261 MLX5_RX_HASH_FUNC_TOEPLITZ = 1 << 0,
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800262};
263enum mlx5_rx_hash_fields {
264 MLX5_RX_HASH_SRC_IPV4 = 1 << 0,
265 MLX5_RX_HASH_DST_IPV4 = 1 << 1,
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800266 MLX5_RX_HASH_SRC_IPV6 = 1 << 2,
267 MLX5_RX_HASH_DST_IPV6 = 1 << 3,
268 MLX5_RX_HASH_SRC_PORT_TCP = 1 << 4,
269 MLX5_RX_HASH_DST_PORT_TCP = 1 << 5,
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800270 MLX5_RX_HASH_SRC_PORT_UDP = 1 << 6,
Christopher Ferris934ec942018-01-31 15:29:16 -0800271 MLX5_RX_HASH_DST_PORT_UDP = 1 << 7,
Christopher Ferris76a1d452018-06-27 14:12:29 -0700272 MLX5_RX_HASH_IPSEC_SPI = 1 << 8,
273 MLX5_RX_HASH_INNER = (1UL << 31),
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800274};
275struct mlx5_ib_create_qp_rss {
Christopher Ferris76a1d452018-06-27 14:12:29 -0700276 __aligned_u64 rx_hash_fields_mask;
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800277 __u8 rx_hash_function;
278 __u8 rx_key_len;
279 __u8 reserved[6];
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800280 __u8 rx_hash_key[128];
281 __u32 comp_mask;
Christopher Ferris934ec942018-01-31 15:29:16 -0800282 __u32 flags;
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800283};
Christopher Ferris86a48372019-01-10 14:14:59 -0800284enum mlx5_ib_create_qp_resp_mask {
285 MLX5_IB_CREATE_QP_RESP_MASK_TIRN = 1UL << 0,
286 MLX5_IB_CREATE_QP_RESP_MASK_TISN = 1UL << 1,
287 MLX5_IB_CREATE_QP_RESP_MASK_RQN = 1UL << 2,
288 MLX5_IB_CREATE_QP_RESP_MASK_SQN = 1UL << 3,
Christopher Ferrisaeddbcf2019-07-08 12:45:46 -0700289 MLX5_IB_CREATE_QP_RESP_MASK_TIR_ICM_ADDR = 1UL << 4,
Christopher Ferris86a48372019-01-10 14:14:59 -0800290};
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800291struct mlx5_ib_create_qp_resp {
Christopher Ferris525ce912017-07-26 13:12:53 -0700292 __u32 bfreg_index;
Christopher Ferris8177cdf2020-08-03 11:53:55 -0700293 __u32 ece_options;
Christopher Ferris86a48372019-01-10 14:14:59 -0800294 __u32 comp_mask;
295 __u32 tirn;
296 __u32 tisn;
297 __u32 rqn;
298 __u32 sqn;
299 __u32 reserved1;
Christopher Ferrisaeddbcf2019-07-08 12:45:46 -0700300 __u64 tir_icm_addr;
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800301};
302struct mlx5_ib_alloc_mw {
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800303 __u32 comp_mask;
304 __u8 num_klms;
305 __u8 reserved1;
306 __u16 reserved2;
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800307};
Christopher Ferris934ec942018-01-31 15:29:16 -0800308enum mlx5_ib_create_wq_mask {
309 MLX5_IB_CREATE_WQ_STRIDING_RQ = (1 << 0),
310};
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800311struct mlx5_ib_create_wq {
Christopher Ferris76a1d452018-06-27 14:12:29 -0700312 __aligned_u64 buf_addr;
313 __aligned_u64 db_addr;
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800314 __u32 rq_wqe_count;
315 __u32 rq_wqe_shift;
316 __u32 user_index;
317 __u32 flags;
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800318 __u32 comp_mask;
Christopher Ferris934ec942018-01-31 15:29:16 -0800319 __u32 single_stride_log_num_of_bytes;
320 __u32 single_wqe_log_num_of_strides;
321 __u32 two_byte_shift_en;
Christopher Ferris48af7cb2017-02-21 12:35:09 -0800322};
323struct mlx5_ib_create_ah_resp {
324 __u32 response_length;
325 __u8 dmac[ETH_ALEN];
Christopher Ferris48af7cb2017-02-21 12:35:09 -0800326 __u8 reserved[6];
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800327};
Christopher Ferris76a1d452018-06-27 14:12:29 -0700328struct mlx5_ib_burst_info {
329 __u32 max_burst_sz;
330 __u16 typical_pkt_sz;
331 __u16 reserved;
332};
333struct mlx5_ib_modify_qp {
334 __u32 comp_mask;
335 struct mlx5_ib_burst_info burst_info;
Christopher Ferris8177cdf2020-08-03 11:53:55 -0700336 __u32 ece_options;
Christopher Ferris76a1d452018-06-27 14:12:29 -0700337};
338struct mlx5_ib_modify_qp_resp {
339 __u32 response_length;
340 __u32 dctn;
Christopher Ferris8177cdf2020-08-03 11:53:55 -0700341 __u32 ece_options;
342 __u32 reserved;
Christopher Ferris76a1d452018-06-27 14:12:29 -0700343};
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800344struct mlx5_ib_create_wq_resp {
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800345 __u32 response_length;
346 __u32 reserved;
347};
348struct mlx5_ib_create_rwq_ind_tbl_resp {
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800349 __u32 response_length;
350 __u32 reserved;
351};
352struct mlx5_ib_modify_wq {
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800353 __u32 comp_mask;
354 __u32 reserved;
355};
Christopher Ferris76a1d452018-06-27 14:12:29 -0700356struct mlx5_ib_clock_info {
357 __u32 sign;
358 __u32 resv;
359 __aligned_u64 nsec;
360 __aligned_u64 cycles;
361 __aligned_u64 frac;
362 __u32 mult;
363 __u32 shift;
364 __aligned_u64 mask;
365 __aligned_u64 overflow_period;
366};
367enum mlx5_ib_mmap_cmd {
368 MLX5_IB_MMAP_REGULAR_PAGE = 0,
369 MLX5_IB_MMAP_GET_CONTIGUOUS_PAGES = 1,
370 MLX5_IB_MMAP_WC_PAGE = 2,
371 MLX5_IB_MMAP_NC_PAGE = 3,
372 MLX5_IB_MMAP_CORE_CLOCK = 5,
373 MLX5_IB_MMAP_ALLOC_WC = 6,
374 MLX5_IB_MMAP_CLOCK_INFO = 7,
375 MLX5_IB_MMAP_DEVICE_MEM = 8,
376};
377enum {
378 MLX5_IB_CLOCK_INFO_KERNEL_UPDATING = 1,
379};
380enum {
381 MLX5_IB_CLOCK_INFO_V1 = 0,
382};
Christopher Ferris9ce28842018-10-25 12:11:39 -0700383struct mlx5_ib_flow_counters_desc {
384 __u32 description;
385 __u32 index;
386};
387struct mlx5_ib_flow_counters_data {
388 RDMA_UAPI_PTR(struct mlx5_ib_flow_counters_desc *, counters_data);
389 __u32 ncounters;
390 __u32 reserved;
391};
392struct mlx5_ib_create_flow {
393 __u32 ncounters_data;
394 __u32 reserved;
395 struct mlx5_ib_flow_counters_data data[];
396};
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800397#endif