Christopher Ferris | 723cf9b | 2017-01-19 20:08:48 -0800 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2017 The Android Open Source Project |
| 3 | * |
| 4 | * Licensed under the Apache License, Version 2.0 (the "License"); |
| 5 | * you may not use this file except in compliance with the License. |
| 6 | * You may obtain a copy of the License at |
| 7 | * |
| 8 | * http://www.apache.org/licenses/LICENSE-2.0 |
| 9 | * |
| 10 | * Unless required by applicable law or agreed to in writing, software |
| 11 | * distributed under the License is distributed on an "AS IS" BASIS, |
| 12 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
| 13 | * See the License for the specific language governing permissions and |
| 14 | * limitations under the License. |
| 15 | */ |
| 16 | |
| 17 | #include <stdint.h> |
| 18 | |
| 19 | #include <gtest/gtest.h> |
| 20 | |
Christopher Ferris | d226a51 | 2017-07-14 10:37:19 -0700 | [diff] [blame] | 21 | #include <unwindstack/Elf.h> |
| 22 | #include <unwindstack/ElfInterface.h> |
| 23 | #include <unwindstack/MapInfo.h> |
| 24 | #include <unwindstack/Regs.h> |
Christopher Ferris | 723cf9b | 2017-01-19 20:08:48 -0800 | [diff] [blame] | 25 | |
Christopher Ferris | a019665 | 2017-07-18 16:09:20 -0700 | [diff] [blame^] | 26 | #include "Machine.h" |
| 27 | |
Christopher Ferris | 3958f80 | 2017-02-01 15:44:40 -0800 | [diff] [blame] | 28 | #include "MemoryFake.h" |
Christopher Ferris | 723cf9b | 2017-01-19 20:08:48 -0800 | [diff] [blame] | 29 | |
Christopher Ferris | d226a51 | 2017-07-14 10:37:19 -0700 | [diff] [blame] | 30 | namespace unwindstack { |
| 31 | |
Christopher Ferris | 3958f80 | 2017-02-01 15:44:40 -0800 | [diff] [blame] | 32 | class ElfFake : public Elf { |
| 33 | public: |
| 34 | ElfFake(Memory* memory) : Elf(memory) { valid_ = true; } |
| 35 | virtual ~ElfFake() = default; |
Christopher Ferris | 723cf9b | 2017-01-19 20:08:48 -0800 | [diff] [blame] | 36 | |
Christopher Ferris | 3958f80 | 2017-02-01 15:44:40 -0800 | [diff] [blame] | 37 | void set_elf_interface(ElfInterface* interface) { interface_.reset(interface); } |
| 38 | }; |
Christopher Ferris | 723cf9b | 2017-01-19 20:08:48 -0800 | [diff] [blame] | 39 | |
Christopher Ferris | 3958f80 | 2017-02-01 15:44:40 -0800 | [diff] [blame] | 40 | class ElfInterfaceFake : public ElfInterface { |
| 41 | public: |
| 42 | ElfInterfaceFake(Memory* memory) : ElfInterface(memory) {} |
| 43 | virtual ~ElfInterfaceFake() = default; |
| 44 | |
| 45 | void set_load_bias(uint64_t load_bias) { load_bias_ = load_bias; } |
| 46 | |
| 47 | bool Init() override { return false; } |
| 48 | void InitHeaders() override {} |
| 49 | bool GetSoname(std::string*) override { return false; } |
| 50 | bool GetFunctionName(uint64_t, std::string*, uint64_t*) override { return false; } |
| 51 | bool Step(uint64_t, Regs*, Memory*) override { return false; } |
| 52 | }; |
| 53 | |
| 54 | template <typename TypeParam> |
Christopher Ferris | 7b8e467 | 2017-06-01 17:55:25 -0700 | [diff] [blame] | 55 | class RegsTestImpl : public RegsImpl<TypeParam> { |
Christopher Ferris | 3958f80 | 2017-02-01 15:44:40 -0800 | [diff] [blame] | 56 | public: |
Christopher Ferris | 7b8e467 | 2017-06-01 17:55:25 -0700 | [diff] [blame] | 57 | RegsTestImpl(uint16_t total_regs, uint16_t regs_sp) |
| 58 | : RegsImpl<TypeParam>(total_regs, regs_sp, Regs::Location(Regs::LOCATION_UNKNOWN, 0)) {} |
| 59 | RegsTestImpl(uint16_t total_regs, uint16_t regs_sp, Regs::Location return_loc) |
| 60 | : RegsImpl<TypeParam>(total_regs, regs_sp, return_loc) {} |
| 61 | virtual ~RegsTestImpl() = default; |
Christopher Ferris | 3958f80 | 2017-02-01 15:44:40 -0800 | [diff] [blame] | 62 | |
Christopher Ferris | 2a25c4a | 2017-07-07 16:35:48 -0700 | [diff] [blame] | 63 | uint64_t GetAdjustedPc(uint64_t, Elf*) override { return 0; } |
| 64 | void SetFromRaw() override {} |
Christopher Ferris | a019665 | 2017-07-18 16:09:20 -0700 | [diff] [blame^] | 65 | bool StepIfSignalHandler(Memory*) override { return false; } |
Christopher Ferris | 3958f80 | 2017-02-01 15:44:40 -0800 | [diff] [blame] | 66 | }; |
| 67 | |
| 68 | class RegsTest : public ::testing::Test { |
| 69 | protected: |
| 70 | void SetUp() override { |
| 71 | memory_ = new MemoryFake; |
| 72 | elf_.reset(new ElfFake(memory_)); |
| 73 | elf_interface_ = new ElfInterfaceFake(elf_->memory()); |
| 74 | elf_->set_elf_interface(elf_interface_); |
Christopher Ferris | 723cf9b | 2017-01-19 20:08:48 -0800 | [diff] [blame] | 75 | } |
| 76 | |
Christopher Ferris | 3958f80 | 2017-02-01 15:44:40 -0800 | [diff] [blame] | 77 | template <typename AddressType> |
Christopher Ferris | a019665 | 2017-07-18 16:09:20 -0700 | [diff] [blame^] | 78 | void RegsReturnAddressRegister(); |
| 79 | |
| 80 | void ArmStepIfSignalHandlerNonRt(uint32_t pc_data); |
| 81 | void ArmStepIfSignalHandlerRt(uint32_t pc_data); |
Christopher Ferris | 723cf9b | 2017-01-19 20:08:48 -0800 | [diff] [blame] | 82 | |
Christopher Ferris | 3958f80 | 2017-02-01 15:44:40 -0800 | [diff] [blame] | 83 | ElfInterfaceFake* elf_interface_; |
| 84 | MemoryFake* memory_; |
| 85 | std::unique_ptr<ElfFake> elf_; |
| 86 | }; |
| 87 | |
| 88 | TEST_F(RegsTest, regs32) { |
Christopher Ferris | 7b8e467 | 2017-06-01 17:55:25 -0700 | [diff] [blame] | 89 | RegsTestImpl<uint32_t> regs32(50, 10); |
Christopher Ferris | 3958f80 | 2017-02-01 15:44:40 -0800 | [diff] [blame] | 90 | ASSERT_EQ(50U, regs32.total_regs()); |
| 91 | ASSERT_EQ(10U, regs32.sp_reg()); |
| 92 | |
| 93 | uint32_t* raw = reinterpret_cast<uint32_t*>(regs32.RawData()); |
| 94 | for (size_t i = 0; i < 50; i++) { |
| 95 | raw[i] = 0xf0000000 + i; |
| 96 | } |
| 97 | regs32.set_pc(0xf0120340); |
| 98 | regs32.set_sp(0xa0ab0cd0); |
| 99 | |
| 100 | for (size_t i = 0; i < 50; i++) { |
| 101 | ASSERT_EQ(0xf0000000U + i, regs32[i]) << "Failed comparing register " << i; |
| 102 | } |
| 103 | |
| 104 | ASSERT_EQ(0xf0120340U, regs32.pc()); |
| 105 | ASSERT_EQ(0xa0ab0cd0U, regs32.sp()); |
| 106 | |
| 107 | regs32[32] = 10; |
| 108 | ASSERT_EQ(10U, regs32[32]); |
Christopher Ferris | 723cf9b | 2017-01-19 20:08:48 -0800 | [diff] [blame] | 109 | } |
| 110 | |
| 111 | TEST_F(RegsTest, regs64) { |
Christopher Ferris | 7b8e467 | 2017-06-01 17:55:25 -0700 | [diff] [blame] | 112 | RegsTestImpl<uint64_t> regs64(30, 12); |
Christopher Ferris | 723cf9b | 2017-01-19 20:08:48 -0800 | [diff] [blame] | 113 | ASSERT_EQ(30U, regs64.total_regs()); |
Christopher Ferris | 3958f80 | 2017-02-01 15:44:40 -0800 | [diff] [blame] | 114 | ASSERT_EQ(12U, regs64.sp_reg()); |
Christopher Ferris | 723cf9b | 2017-01-19 20:08:48 -0800 | [diff] [blame] | 115 | |
Christopher Ferris | 3958f80 | 2017-02-01 15:44:40 -0800 | [diff] [blame] | 116 | uint64_t* raw = reinterpret_cast<uint64_t*>(regs64.RawData()); |
Christopher Ferris | 723cf9b | 2017-01-19 20:08:48 -0800 | [diff] [blame] | 117 | for (size_t i = 0; i < 30; i++) { |
| 118 | raw[i] = 0xf123456780000000UL + i; |
| 119 | } |
Christopher Ferris | 3958f80 | 2017-02-01 15:44:40 -0800 | [diff] [blame] | 120 | regs64.set_pc(0xf123456780102030UL); |
| 121 | regs64.set_sp(0xa123456780a0b0c0UL); |
Christopher Ferris | 723cf9b | 2017-01-19 20:08:48 -0800 | [diff] [blame] | 122 | |
Christopher Ferris | 3958f80 | 2017-02-01 15:44:40 -0800 | [diff] [blame] | 123 | for (size_t i = 0; i < 30; i++) { |
| 124 | ASSERT_EQ(0xf123456780000000U + i, regs64[i]) << "Failed reading register " << i; |
| 125 | } |
Christopher Ferris | 723cf9b | 2017-01-19 20:08:48 -0800 | [diff] [blame] | 126 | |
Christopher Ferris | 3958f80 | 2017-02-01 15:44:40 -0800 | [diff] [blame] | 127 | ASSERT_EQ(0xf123456780102030UL, regs64.pc()); |
| 128 | ASSERT_EQ(0xa123456780a0b0c0UL, regs64.sp()); |
| 129 | |
Christopher Ferris | 723cf9b | 2017-01-19 20:08:48 -0800 | [diff] [blame] | 130 | regs64[8] = 10; |
| 131 | ASSERT_EQ(10U, regs64[8]); |
Christopher Ferris | 3958f80 | 2017-02-01 15:44:40 -0800 | [diff] [blame] | 132 | } |
Christopher Ferris | 723cf9b | 2017-01-19 20:08:48 -0800 | [diff] [blame] | 133 | |
Christopher Ferris | 3958f80 | 2017-02-01 15:44:40 -0800 | [diff] [blame] | 134 | template <typename AddressType> |
Christopher Ferris | a019665 | 2017-07-18 16:09:20 -0700 | [diff] [blame^] | 135 | void RegsTest::RegsReturnAddressRegister() { |
Christopher Ferris | 7b8e467 | 2017-06-01 17:55:25 -0700 | [diff] [blame] | 136 | RegsTestImpl<AddressType> regs(20, 10, Regs::Location(Regs::LOCATION_REGISTER, 5)); |
Christopher Ferris | 3958f80 | 2017-02-01 15:44:40 -0800 | [diff] [blame] | 137 | |
| 138 | regs[5] = 0x12345; |
| 139 | uint64_t value; |
| 140 | ASSERT_TRUE(regs.GetReturnAddressFromDefault(memory_, &value)); |
| 141 | ASSERT_EQ(0x12345U, value); |
| 142 | } |
| 143 | |
| 144 | TEST_F(RegsTest, regs32_return_address_register) { |
Christopher Ferris | a019665 | 2017-07-18 16:09:20 -0700 | [diff] [blame^] | 145 | RegsReturnAddressRegister<uint32_t>(); |
Christopher Ferris | 3958f80 | 2017-02-01 15:44:40 -0800 | [diff] [blame] | 146 | } |
| 147 | |
| 148 | TEST_F(RegsTest, regs64_return_address_register) { |
Christopher Ferris | a019665 | 2017-07-18 16:09:20 -0700 | [diff] [blame^] | 149 | RegsReturnAddressRegister<uint64_t>(); |
Christopher Ferris | 3958f80 | 2017-02-01 15:44:40 -0800 | [diff] [blame] | 150 | } |
| 151 | |
| 152 | TEST_F(RegsTest, regs32_return_address_sp_offset) { |
Christopher Ferris | 7b8e467 | 2017-06-01 17:55:25 -0700 | [diff] [blame] | 153 | RegsTestImpl<uint32_t> regs(20, 10, Regs::Location(Regs::LOCATION_SP_OFFSET, -2)); |
Christopher Ferris | 3958f80 | 2017-02-01 15:44:40 -0800 | [diff] [blame] | 154 | |
| 155 | regs.set_sp(0x2002); |
| 156 | memory_->SetData32(0x2000, 0x12345678); |
| 157 | uint64_t value; |
| 158 | ASSERT_TRUE(regs.GetReturnAddressFromDefault(memory_, &value)); |
| 159 | ASSERT_EQ(0x12345678U, value); |
| 160 | } |
| 161 | |
| 162 | TEST_F(RegsTest, regs64_return_address_sp_offset) { |
Christopher Ferris | 7b8e467 | 2017-06-01 17:55:25 -0700 | [diff] [blame] | 163 | RegsTestImpl<uint64_t> regs(20, 10, Regs::Location(Regs::LOCATION_SP_OFFSET, -8)); |
Christopher Ferris | 3958f80 | 2017-02-01 15:44:40 -0800 | [diff] [blame] | 164 | |
| 165 | regs.set_sp(0x2008); |
| 166 | memory_->SetData64(0x2000, 0x12345678aabbccddULL); |
| 167 | uint64_t value; |
| 168 | ASSERT_TRUE(regs.GetReturnAddressFromDefault(memory_, &value)); |
| 169 | ASSERT_EQ(0x12345678aabbccddULL, value); |
| 170 | } |
| 171 | |
| 172 | TEST_F(RegsTest, rel_pc) { |
| 173 | RegsArm64 arm64; |
| 174 | ASSERT_EQ(0xcU, arm64.GetAdjustedPc(0x10, elf_.get())); |
| 175 | ASSERT_EQ(0x0U, arm64.GetAdjustedPc(0x4, elf_.get())); |
| 176 | ASSERT_EQ(0x3U, arm64.GetAdjustedPc(0x3, elf_.get())); |
| 177 | ASSERT_EQ(0x2U, arm64.GetAdjustedPc(0x2, elf_.get())); |
| 178 | ASSERT_EQ(0x1U, arm64.GetAdjustedPc(0x1, elf_.get())); |
| 179 | ASSERT_EQ(0x0U, arm64.GetAdjustedPc(0x0, elf_.get())); |
| 180 | |
| 181 | RegsX86 x86; |
| 182 | ASSERT_EQ(0xffU, x86.GetAdjustedPc(0x100, elf_.get())); |
| 183 | ASSERT_EQ(0x1U, x86.GetAdjustedPc(0x2, elf_.get())); |
| 184 | ASSERT_EQ(0x0U, x86.GetAdjustedPc(0x1, elf_.get())); |
| 185 | ASSERT_EQ(0x0U, x86.GetAdjustedPc(0x0, elf_.get())); |
| 186 | |
| 187 | RegsX86_64 x86_64; |
| 188 | ASSERT_EQ(0xffU, x86_64.GetAdjustedPc(0x100, elf_.get())); |
| 189 | ASSERT_EQ(0x1U, x86_64.GetAdjustedPc(0x2, elf_.get())); |
| 190 | ASSERT_EQ(0x0U, x86_64.GetAdjustedPc(0x1, elf_.get())); |
| 191 | ASSERT_EQ(0x0U, x86_64.GetAdjustedPc(0x0, elf_.get())); |
| 192 | } |
| 193 | |
| 194 | TEST_F(RegsTest, rel_pc_arm) { |
| 195 | RegsArm arm; |
| 196 | |
| 197 | // Check fence posts. |
| 198 | elf_interface_->set_load_bias(0); |
| 199 | ASSERT_EQ(3U, arm.GetAdjustedPc(0x5, elf_.get())); |
| 200 | ASSERT_EQ(4U, arm.GetAdjustedPc(0x4, elf_.get())); |
| 201 | ASSERT_EQ(3U, arm.GetAdjustedPc(0x3, elf_.get())); |
| 202 | ASSERT_EQ(2U, arm.GetAdjustedPc(0x2, elf_.get())); |
| 203 | ASSERT_EQ(1U, arm.GetAdjustedPc(0x1, elf_.get())); |
| 204 | ASSERT_EQ(0U, arm.GetAdjustedPc(0x0, elf_.get())); |
| 205 | |
| 206 | elf_interface_->set_load_bias(0x100); |
| 207 | ASSERT_EQ(0xffU, arm.GetAdjustedPc(0xff, elf_.get())); |
| 208 | ASSERT_EQ(0x103U, arm.GetAdjustedPc(0x105, elf_.get())); |
| 209 | ASSERT_EQ(0x104U, arm.GetAdjustedPc(0x104, elf_.get())); |
| 210 | ASSERT_EQ(0x103U, arm.GetAdjustedPc(0x103, elf_.get())); |
| 211 | ASSERT_EQ(0x102U, arm.GetAdjustedPc(0x102, elf_.get())); |
| 212 | ASSERT_EQ(0x101U, arm.GetAdjustedPc(0x101, elf_.get())); |
| 213 | ASSERT_EQ(0x100U, arm.GetAdjustedPc(0x100, elf_.get())); |
| 214 | |
| 215 | // Check thumb instructions handling. |
| 216 | elf_interface_->set_load_bias(0); |
| 217 | memory_->SetData32(0x2000, 0); |
| 218 | ASSERT_EQ(0x2003U, arm.GetAdjustedPc(0x2005, elf_.get())); |
| 219 | memory_->SetData32(0x2000, 0xe000f000); |
| 220 | ASSERT_EQ(0x2001U, arm.GetAdjustedPc(0x2005, elf_.get())); |
| 221 | |
| 222 | elf_interface_->set_load_bias(0x400); |
| 223 | memory_->SetData32(0x2100, 0); |
| 224 | ASSERT_EQ(0x2503U, arm.GetAdjustedPc(0x2505, elf_.get())); |
| 225 | memory_->SetData32(0x2100, 0xf111f111); |
| 226 | ASSERT_EQ(0x2501U, arm.GetAdjustedPc(0x2505, elf_.get())); |
| 227 | } |
| 228 | |
| 229 | TEST_F(RegsTest, elf_invalid) { |
| 230 | Elf invalid_elf(new MemoryFake); |
| 231 | RegsArm regs_arm; |
| 232 | RegsArm64 regs_arm64; |
| 233 | RegsX86 regs_x86; |
| 234 | RegsX86_64 regs_x86_64; |
| 235 | MapInfo map_info{.start = 0x1000, .end = 0x2000}; |
| 236 | |
| 237 | regs_arm.set_pc(0x1500); |
Christopher Ferris | d226a51 | 2017-07-14 10:37:19 -0700 | [diff] [blame] | 238 | ASSERT_EQ(0x500U, invalid_elf.GetRelPc(regs_arm.pc(), &map_info)); |
Christopher Ferris | 3958f80 | 2017-02-01 15:44:40 -0800 | [diff] [blame] | 239 | ASSERT_EQ(0x500U, regs_arm.GetAdjustedPc(0x500U, &invalid_elf)); |
| 240 | |
| 241 | regs_arm64.set_pc(0x1600); |
Christopher Ferris | d226a51 | 2017-07-14 10:37:19 -0700 | [diff] [blame] | 242 | ASSERT_EQ(0x600U, invalid_elf.GetRelPc(regs_arm64.pc(), &map_info)); |
Christopher Ferris | 3958f80 | 2017-02-01 15:44:40 -0800 | [diff] [blame] | 243 | ASSERT_EQ(0x600U, regs_arm64.GetAdjustedPc(0x600U, &invalid_elf)); |
| 244 | |
| 245 | regs_x86.set_pc(0x1700); |
Christopher Ferris | d226a51 | 2017-07-14 10:37:19 -0700 | [diff] [blame] | 246 | ASSERT_EQ(0x700U, invalid_elf.GetRelPc(regs_x86.pc(), &map_info)); |
Christopher Ferris | 3958f80 | 2017-02-01 15:44:40 -0800 | [diff] [blame] | 247 | ASSERT_EQ(0x700U, regs_x86.GetAdjustedPc(0x700U, &invalid_elf)); |
| 248 | |
| 249 | regs_x86_64.set_pc(0x1800); |
Christopher Ferris | d226a51 | 2017-07-14 10:37:19 -0700 | [diff] [blame] | 250 | ASSERT_EQ(0x800U, invalid_elf.GetRelPc(regs_x86_64.pc(), &map_info)); |
Christopher Ferris | 3958f80 | 2017-02-01 15:44:40 -0800 | [diff] [blame] | 251 | ASSERT_EQ(0x800U, regs_x86_64.GetAdjustedPc(0x800U, &invalid_elf)); |
Christopher Ferris | 723cf9b | 2017-01-19 20:08:48 -0800 | [diff] [blame] | 252 | } |
Christopher Ferris | 2a25c4a | 2017-07-07 16:35:48 -0700 | [diff] [blame] | 253 | |
| 254 | TEST_F(RegsTest, arm_set_from_raw) { |
| 255 | RegsArm arm; |
| 256 | uint32_t* regs = reinterpret_cast<uint32_t*>(arm.RawData()); |
| 257 | regs[13] = 0x100; |
| 258 | regs[15] = 0x200; |
| 259 | arm.SetFromRaw(); |
| 260 | EXPECT_EQ(0x100U, arm.sp()); |
| 261 | EXPECT_EQ(0x200U, arm.pc()); |
| 262 | } |
| 263 | |
| 264 | TEST_F(RegsTest, arm64_set_from_raw) { |
| 265 | RegsArm64 arm64; |
| 266 | uint64_t* regs = reinterpret_cast<uint64_t*>(arm64.RawData()); |
| 267 | regs[31] = 0xb100000000ULL; |
| 268 | regs[32] = 0xc200000000ULL; |
| 269 | arm64.SetFromRaw(); |
| 270 | EXPECT_EQ(0xb100000000U, arm64.sp()); |
| 271 | EXPECT_EQ(0xc200000000U, arm64.pc()); |
| 272 | } |
| 273 | |
| 274 | TEST_F(RegsTest, x86_set_from_raw) { |
| 275 | RegsX86 x86; |
| 276 | uint32_t* regs = reinterpret_cast<uint32_t*>(x86.RawData()); |
| 277 | regs[4] = 0x23450000; |
| 278 | regs[8] = 0xabcd0000; |
| 279 | x86.SetFromRaw(); |
| 280 | EXPECT_EQ(0x23450000U, x86.sp()); |
| 281 | EXPECT_EQ(0xabcd0000U, x86.pc()); |
| 282 | } |
| 283 | |
| 284 | TEST_F(RegsTest, x86_64_set_from_raw) { |
| 285 | RegsX86_64 x86_64; |
| 286 | uint64_t* regs = reinterpret_cast<uint64_t*>(x86_64.RawData()); |
| 287 | regs[7] = 0x1200000000ULL; |
| 288 | regs[16] = 0x4900000000ULL; |
| 289 | x86_64.SetFromRaw(); |
| 290 | EXPECT_EQ(0x1200000000U, x86_64.sp()); |
| 291 | EXPECT_EQ(0x4900000000U, x86_64.pc()); |
| 292 | } |
Christopher Ferris | d226a51 | 2017-07-14 10:37:19 -0700 | [diff] [blame] | 293 | |
Christopher Ferris | a019665 | 2017-07-18 16:09:20 -0700 | [diff] [blame^] | 294 | void RegsTest::ArmStepIfSignalHandlerNonRt(uint32_t pc_data) { |
| 295 | uint64_t addr = 0x1000; |
| 296 | RegsArm regs; |
| 297 | regs[ARM_REG_PC] = 0x5000; |
| 298 | regs[ARM_REG_SP] = addr; |
| 299 | regs.SetFromRaw(); |
| 300 | |
| 301 | memory_->SetData32(0x5000, pc_data); |
| 302 | |
| 303 | for (uint64_t index = 0; index <= 30; index++) { |
| 304 | memory_->SetData32(addr + index * 4, index * 0x10); |
| 305 | } |
| 306 | |
| 307 | ASSERT_TRUE(regs.StepIfSignalHandler(memory_)); |
| 308 | EXPECT_EQ(0x100U, regs[ARM_REG_SP]); |
| 309 | EXPECT_EQ(0x120U, regs[ARM_REG_PC]); |
| 310 | EXPECT_EQ(0x100U, regs.sp()); |
| 311 | EXPECT_EQ(0x120U, regs.pc()); |
| 312 | } |
| 313 | |
| 314 | TEST_F(RegsTest, arm_step_if_signal_handler_non_rt) { |
| 315 | // Form 1 |
| 316 | ArmStepIfSignalHandlerNonRt(0xe3a07077); |
| 317 | |
| 318 | // Form 2 |
| 319 | ArmStepIfSignalHandlerNonRt(0xef900077); |
| 320 | |
| 321 | // Form 3 |
| 322 | ArmStepIfSignalHandlerNonRt(0xdf002777); |
| 323 | } |
| 324 | |
| 325 | void RegsTest::ArmStepIfSignalHandlerRt(uint32_t pc_data) { |
| 326 | uint64_t addr = 0x1000; |
| 327 | RegsArm regs; |
| 328 | regs[ARM_REG_PC] = 0x5000; |
| 329 | regs[ARM_REG_SP] = addr; |
| 330 | regs.SetFromRaw(); |
| 331 | |
| 332 | memory_->SetData32(0x5000, pc_data); |
| 333 | |
| 334 | for (uint64_t index = 0; index <= 100; index++) { |
| 335 | memory_->SetData32(addr + index * 4, index * 0x10); |
| 336 | } |
| 337 | |
| 338 | ASSERT_TRUE(regs.StepIfSignalHandler(memory_)); |
| 339 | EXPECT_EQ(0x350U, regs[ARM_REG_SP]); |
| 340 | EXPECT_EQ(0x370U, regs[ARM_REG_PC]); |
| 341 | EXPECT_EQ(0x350U, regs.sp()); |
| 342 | EXPECT_EQ(0x370U, regs.pc()); |
| 343 | } |
| 344 | |
| 345 | TEST_F(RegsTest, arm_step_if_signal_handler_rt) { |
| 346 | // Form 1 |
| 347 | ArmStepIfSignalHandlerRt(0xe3a070ad); |
| 348 | |
| 349 | // Form 2 |
| 350 | ArmStepIfSignalHandlerRt(0xef9000ad); |
| 351 | |
| 352 | // Form 3 |
| 353 | ArmStepIfSignalHandlerRt(0xdf0027ad); |
| 354 | } |
| 355 | |
| 356 | TEST_F(RegsTest, arm64_step_if_signal_handler) { |
| 357 | uint64_t addr = 0x1000; |
| 358 | RegsArm64 regs; |
| 359 | regs[ARM64_REG_PC] = 0x8000; |
| 360 | regs[ARM64_REG_SP] = addr; |
| 361 | regs.SetFromRaw(); |
| 362 | |
| 363 | memory_->SetData64(0x8000, 0xd4000001d2801168ULL); |
| 364 | |
| 365 | for (uint64_t index = 0; index <= 100; index++) { |
| 366 | memory_->SetData64(addr + index * 8, index * 0x10); |
| 367 | } |
| 368 | |
| 369 | ASSERT_TRUE(regs.StepIfSignalHandler(memory_)); |
| 370 | EXPECT_EQ(0x460U, regs[ARM64_REG_SP]); |
| 371 | EXPECT_EQ(0x470U, regs[ARM64_REG_PC]); |
| 372 | EXPECT_EQ(0x460U, regs.sp()); |
| 373 | EXPECT_EQ(0x470U, regs.pc()); |
| 374 | } |
| 375 | |
| 376 | TEST_F(RegsTest, x86_step_if_signal_handler_no_siginfo) { |
| 377 | uint64_t addr = 0xa00; |
| 378 | RegsX86 regs; |
| 379 | regs[X86_REG_EIP] = 0x4100; |
| 380 | regs[X86_REG_ESP] = addr; |
| 381 | regs.SetFromRaw(); |
| 382 | |
| 383 | memory_->SetData64(0x4100, 0x80cd00000077b858ULL); |
| 384 | for (uint64_t index = 0; index <= 25; index++) { |
| 385 | memory_->SetData32(addr + index * 4, index * 0x10); |
| 386 | } |
| 387 | |
| 388 | ASSERT_TRUE(regs.StepIfSignalHandler(memory_)); |
| 389 | EXPECT_EQ(0x70U, regs[X86_REG_EBP]); |
| 390 | EXPECT_EQ(0x80U, regs[X86_REG_ESP]); |
| 391 | EXPECT_EQ(0x90U, regs[X86_REG_EBX]); |
| 392 | EXPECT_EQ(0xa0U, regs[X86_REG_EDX]); |
| 393 | EXPECT_EQ(0xb0U, regs[X86_REG_ECX]); |
| 394 | EXPECT_EQ(0xc0U, regs[X86_REG_EAX]); |
| 395 | EXPECT_EQ(0xf0U, regs[X86_REG_EIP]); |
| 396 | EXPECT_EQ(0x80U, regs.sp()); |
| 397 | EXPECT_EQ(0xf0U, regs.pc()); |
| 398 | } |
| 399 | |
| 400 | TEST_F(RegsTest, x86_step_if_signal_handler_siginfo) { |
| 401 | uint64_t addr = 0xa00; |
| 402 | RegsX86 regs; |
| 403 | regs[X86_REG_EIP] = 0x4100; |
| 404 | regs[X86_REG_ESP] = addr; |
| 405 | regs.SetFromRaw(); |
| 406 | |
| 407 | memory_->SetData64(0x4100, 0x0080cd000000adb8ULL); |
| 408 | addr += 8; |
| 409 | // Pointer to ucontext data. |
| 410 | memory_->SetData32(addr, 0x8100); |
| 411 | |
| 412 | addr = 0x8100; |
| 413 | for (uint64_t index = 0; index <= 30; index++) { |
| 414 | memory_->SetData32(addr + index * 4, index * 0x10); |
| 415 | } |
| 416 | |
| 417 | ASSERT_TRUE(regs.StepIfSignalHandler(memory_)); |
| 418 | EXPECT_EQ(0xb0U, regs[X86_REG_EBP]); |
| 419 | EXPECT_EQ(0xc0U, regs[X86_REG_ESP]); |
| 420 | EXPECT_EQ(0xd0U, regs[X86_REG_EBX]); |
| 421 | EXPECT_EQ(0xe0U, regs[X86_REG_EDX]); |
| 422 | EXPECT_EQ(0xf0U, regs[X86_REG_ECX]); |
| 423 | EXPECT_EQ(0x100U, regs[X86_REG_EAX]); |
| 424 | EXPECT_EQ(0x130U, regs[X86_REG_EIP]); |
| 425 | EXPECT_EQ(0xc0U, regs.sp()); |
| 426 | EXPECT_EQ(0x130U, regs.pc()); |
| 427 | } |
| 428 | |
| 429 | TEST_F(RegsTest, x86_64_step_if_signal_handler) { |
| 430 | uint64_t addr = 0x500; |
| 431 | RegsX86_64 regs; |
| 432 | regs[X86_64_REG_RIP] = 0x7000; |
| 433 | regs[X86_64_REG_RSP] = addr; |
| 434 | regs.SetFromRaw(); |
| 435 | |
| 436 | memory_->SetData64(0x7000, 0x0f0000000fc0c748); |
| 437 | memory_->SetData16(0x7008, 0x0f05); |
| 438 | |
| 439 | for (uint64_t index = 0; index <= 30; index++) { |
| 440 | memory_->SetData64(addr + index * 8, index * 0x10); |
| 441 | } |
| 442 | |
| 443 | ASSERT_TRUE(regs.StepIfSignalHandler(memory_)); |
| 444 | EXPECT_EQ(0x140U, regs[X86_64_REG_RSP]); |
| 445 | EXPECT_EQ(0x150U, regs[X86_64_REG_RIP]); |
| 446 | EXPECT_EQ(0x140U, regs.sp()); |
| 447 | EXPECT_EQ(0x150U, regs.pc()); |
| 448 | } |
| 449 | |
Christopher Ferris | d226a51 | 2017-07-14 10:37:19 -0700 | [diff] [blame] | 450 | } // namespace unwindstack |