Shin-ichiro KAWASAKI | c6af911 | 2009-08-04 19:14:22 +0900 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2007 The Android Open Source Project |
| 3 | * |
| 4 | * Licensed under the Apache License, Version 2.0 (the "License"); |
| 5 | * you may not use this file except in compliance with the License. |
| 6 | * You may obtain a copy of the License at |
| 7 | * |
| 8 | * http://www.apache.org/licenses/LICENSE-2.0 |
| 9 | * |
| 10 | * Unless required by applicable law or agreed to in writing, software |
| 11 | * distributed under the License is distributed on an "AS IS" BASIS, |
| 12 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
| 13 | * See the License for the specific language governing permissions and |
| 14 | * limitations under the License. |
| 15 | */ |
| 16 | |
| 17 | #include <cutils/atomic.h> |
| 18 | #ifdef HAVE_WIN32_THREADS |
| 19 | #include <windows.h> |
| 20 | #else |
| 21 | #include <sched.h> |
| 22 | #endif |
| 23 | |
| 24 | /* |
| 25 | * Note : |
| 26 | * |
| 27 | * (1) SuperH does not have CMPXCHG. It has only TAS for atomic |
| 28 | * operations. It does not seem a good idea to implement CMPXCHG, |
| 29 | * with TAS. So, we choose to implemnt these operations with |
| 30 | * posix mutexes. Please be sure that this might cause performance |
| 31 | * problem for Android-SH. Using LL/SC instructions supported in SH-X3, |
| 32 | * best performnace would be realized. |
| 33 | * |
| 34 | * (2) Mutex initialization problem happens, which is commented for |
| 35 | * ARM implementation, in this file above. |
| 36 | * We follow the fact that the initializer for mutex is a simple zero |
| 37 | * value. |
| 38 | */ |
| 39 | |
| 40 | #include <pthread.h> |
| 41 | |
| 42 | #define SWAP_LOCK_COUNT 32U |
| 43 | static pthread_mutex_t _swap_locks[SWAP_LOCK_COUNT]; |
| 44 | |
| 45 | #define SWAP_LOCK(addr) \ |
| 46 | &_swap_locks[((unsigned)(void*)(addr) >> 3U) % SWAP_LOCK_COUNT] |
| 47 | |
| 48 | |
| 49 | void android_atomic_write(int32_t value, volatile int32_t* addr) { |
| 50 | int32_t oldValue; |
| 51 | do { |
| 52 | oldValue = *addr; |
| 53 | } while (android_atomic_cmpxchg(oldValue, value, addr)); |
| 54 | } |
| 55 | |
| 56 | int32_t android_atomic_inc(volatile int32_t* addr) { |
| 57 | int32_t oldValue; |
| 58 | do { |
| 59 | oldValue = *addr; |
| 60 | } while (android_atomic_cmpxchg(oldValue, oldValue+1, addr)); |
| 61 | return oldValue; |
| 62 | } |
| 63 | |
| 64 | int32_t android_atomic_dec(volatile int32_t* addr) { |
| 65 | int32_t oldValue; |
| 66 | do { |
| 67 | oldValue = *addr; |
| 68 | } while (android_atomic_cmpxchg(oldValue, oldValue-1, addr)); |
| 69 | return oldValue; |
| 70 | } |
| 71 | |
| 72 | int32_t android_atomic_add(int32_t value, volatile int32_t* addr) { |
| 73 | int32_t oldValue; |
| 74 | do { |
| 75 | oldValue = *addr; |
| 76 | } while (android_atomic_cmpxchg(oldValue, oldValue+value, addr)); |
| 77 | return oldValue; |
| 78 | } |
| 79 | |
| 80 | int32_t android_atomic_and(int32_t value, volatile int32_t* addr) { |
| 81 | int32_t oldValue; |
| 82 | do { |
| 83 | oldValue = *addr; |
| 84 | } while (android_atomic_cmpxchg(oldValue, oldValue&value, addr)); |
| 85 | return oldValue; |
| 86 | } |
| 87 | |
| 88 | int32_t android_atomic_or(int32_t value, volatile int32_t* addr) { |
| 89 | int32_t oldValue; |
| 90 | do { |
| 91 | oldValue = *addr; |
| 92 | } while (android_atomic_cmpxchg(oldValue, oldValue|value, addr)); |
| 93 | return oldValue; |
| 94 | } |
| 95 | |
| 96 | int32_t android_atomic_swap(int32_t value, volatile int32_t* addr) { |
| 97 | int32_t oldValue; |
| 98 | do { |
| 99 | oldValue = *addr; |
| 100 | } while (android_atomic_cmpxchg(oldValue, value, addr)); |
| 101 | return oldValue; |
| 102 | } |
| 103 | |
| 104 | int android_atomic_cmpxchg(int32_t oldvalue, int32_t newvalue, |
| 105 | volatile int32_t* addr) { |
| 106 | int result; |
| 107 | pthread_mutex_t* lock = SWAP_LOCK(addr); |
| 108 | |
| 109 | pthread_mutex_lock(lock); |
| 110 | |
| 111 | if (*addr == oldvalue) { |
| 112 | *addr = newvalue; |
| 113 | result = 0; |
| 114 | } else { |
| 115 | result = 1; |
| 116 | } |
| 117 | pthread_mutex_unlock(lock); |
| 118 | return result; |
| 119 | } |
| 120 | |
| 121 | int64_t android_quasiatomic_swap_64(int64_t value, volatile int64_t* addr) { |
| 122 | int64_t oldValue; |
| 123 | pthread_mutex_t* lock = SWAP_LOCK(addr); |
| 124 | |
| 125 | pthread_mutex_lock(lock); |
| 126 | |
| 127 | oldValue = *addr; |
| 128 | *addr = value; |
| 129 | |
| 130 | pthread_mutex_unlock(lock); |
| 131 | return oldValue; |
| 132 | } |
| 133 | |
| 134 | int android_quasiatomic_cmpxchg_64(int64_t oldvalue, int64_t newvalue, |
| 135 | volatile int64_t* addr) { |
| 136 | int result; |
| 137 | pthread_mutex_t* lock = SWAP_LOCK(addr); |
| 138 | |
| 139 | pthread_mutex_lock(lock); |
| 140 | |
| 141 | if (*addr == oldvalue) { |
| 142 | *addr = newvalue; |
| 143 | result = 0; |
| 144 | } else { |
| 145 | result = 1; |
| 146 | } |
| 147 | pthread_mutex_unlock(lock); |
| 148 | return result; |
| 149 | } |
| 150 | |
| 151 | int64_t android_quasiatomic_read_64(volatile int64_t* addr) { |
| 152 | int64_t result; |
| 153 | pthread_mutex_t* lock = SWAP_LOCK(addr); |
| 154 | |
| 155 | pthread_mutex_lock(lock); |
| 156 | result = *addr; |
| 157 | pthread_mutex_unlock(lock); |
| 158 | return result; |
| 159 | } |