Christopher Ferris | eb4a6db | 2017-07-19 12:37:45 -0700 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2017 The Android Open Source Project |
| 3 | * |
| 4 | * Licensed under the Apache License, Version 2.0 (the "License"); |
| 5 | * you may not use this file except in compliance with the License. |
| 6 | * You may obtain a copy of the License at |
| 7 | * |
| 8 | * http://www.apache.org/licenses/LICENSE-2.0 |
| 9 | * |
| 10 | * Unless required by applicable law or agreed to in writing, software |
| 11 | * distributed under the License is distributed on an "AS IS" BASIS, |
| 12 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
| 13 | * See the License for the specific language governing permissions and |
| 14 | * limitations under the License. |
| 15 | */ |
| 16 | |
| 17 | #include <stdint.h> |
| 18 | |
| 19 | #include <gtest/gtest.h> |
| 20 | |
| 21 | #include <unwindstack/Elf.h> |
Christopher Ferris | d06001d | 2017-11-30 18:56:01 -0800 | [diff] [blame] | 22 | #include <unwindstack/RegsArm.h> |
| 23 | #include <unwindstack/RegsArm64.h> |
| 24 | #include <unwindstack/RegsX86.h> |
| 25 | #include <unwindstack/RegsX86_64.h> |
Christopher Ferris | eb4a6db | 2017-07-19 12:37:45 -0700 | [diff] [blame] | 26 | |
Christopher Ferris | d06001d | 2017-11-30 18:56:01 -0800 | [diff] [blame] | 27 | #include "MachineArm.h" |
| 28 | #include "MachineArm64.h" |
| 29 | #include "MachineX86.h" |
| 30 | #include "MachineX86_64.h" |
Christopher Ferris | eb4a6db | 2017-07-19 12:37:45 -0700 | [diff] [blame] | 31 | |
| 32 | #include "MemoryFake.h" |
| 33 | |
| 34 | namespace unwindstack { |
| 35 | |
| 36 | class RegsStepIfSignalHandlerTest : public ::testing::Test { |
| 37 | protected: |
| 38 | void SetUp() override { |
| 39 | elf_memory_ = new MemoryFake; |
| 40 | elf_.reset(new Elf(elf_memory_)); |
| 41 | } |
| 42 | |
| 43 | void ArmStepIfSignalHandlerNonRt(uint32_t pc_data); |
| 44 | void ArmStepIfSignalHandlerRt(uint32_t pc_data); |
| 45 | |
| 46 | MemoryFake* elf_memory_; |
| 47 | MemoryFake process_memory_; |
| 48 | std::unique_ptr<Elf> elf_; |
| 49 | }; |
| 50 | |
| 51 | void RegsStepIfSignalHandlerTest::ArmStepIfSignalHandlerNonRt(uint32_t pc_data) { |
| 52 | uint64_t addr = 0x1000; |
| 53 | RegsArm regs; |
| 54 | regs[ARM_REG_PC] = 0x5000; |
| 55 | regs[ARM_REG_SP] = addr; |
| 56 | regs.SetFromRaw(); |
| 57 | |
| 58 | elf_memory_->SetData32(0x5000, pc_data); |
| 59 | |
| 60 | for (uint64_t index = 0; index <= 30; index++) { |
| 61 | process_memory_.SetData32(addr + index * 4, index * 0x10); |
| 62 | } |
| 63 | |
| 64 | ASSERT_TRUE(regs.StepIfSignalHandler(0x5000, elf_.get(), &process_memory_)); |
| 65 | EXPECT_EQ(0x100U, regs[ARM_REG_SP]); |
| 66 | EXPECT_EQ(0x120U, regs[ARM_REG_PC]); |
| 67 | EXPECT_EQ(0x100U, regs.sp()); |
| 68 | EXPECT_EQ(0x120U, regs.pc()); |
| 69 | } |
| 70 | |
| 71 | TEST_F(RegsStepIfSignalHandlerTest, arm_step_if_signal_handler_non_rt) { |
| 72 | // Form 1 |
| 73 | ArmStepIfSignalHandlerNonRt(0xe3a07077); |
| 74 | |
| 75 | // Form 2 |
| 76 | ArmStepIfSignalHandlerNonRt(0xef900077); |
| 77 | |
| 78 | // Form 3 |
| 79 | ArmStepIfSignalHandlerNonRt(0xdf002777); |
| 80 | } |
| 81 | |
| 82 | void RegsStepIfSignalHandlerTest::ArmStepIfSignalHandlerRt(uint32_t pc_data) { |
| 83 | uint64_t addr = 0x1000; |
| 84 | RegsArm regs; |
| 85 | regs[ARM_REG_PC] = 0x5000; |
| 86 | regs[ARM_REG_SP] = addr; |
| 87 | regs.SetFromRaw(); |
| 88 | |
| 89 | elf_memory_->SetData32(0x5000, pc_data); |
| 90 | |
| 91 | for (uint64_t index = 0; index <= 100; index++) { |
| 92 | process_memory_.SetData32(addr + index * 4, index * 0x10); |
| 93 | } |
| 94 | |
| 95 | ASSERT_TRUE(regs.StepIfSignalHandler(0x5000, elf_.get(), &process_memory_)); |
| 96 | EXPECT_EQ(0x350U, regs[ARM_REG_SP]); |
| 97 | EXPECT_EQ(0x370U, regs[ARM_REG_PC]); |
| 98 | EXPECT_EQ(0x350U, regs.sp()); |
| 99 | EXPECT_EQ(0x370U, regs.pc()); |
| 100 | } |
| 101 | |
| 102 | TEST_F(RegsStepIfSignalHandlerTest, arm_step_if_signal_handler_rt) { |
| 103 | // Form 1 |
| 104 | ArmStepIfSignalHandlerRt(0xe3a070ad); |
| 105 | |
| 106 | // Form 2 |
| 107 | ArmStepIfSignalHandlerRt(0xef9000ad); |
| 108 | |
| 109 | // Form 3 |
| 110 | ArmStepIfSignalHandlerRt(0xdf0027ad); |
| 111 | } |
| 112 | |
| 113 | TEST_F(RegsStepIfSignalHandlerTest, arm64_step_if_signal_handler) { |
| 114 | uint64_t addr = 0x1000; |
| 115 | RegsArm64 regs; |
| 116 | regs[ARM64_REG_PC] = 0x8000; |
| 117 | regs[ARM64_REG_SP] = addr; |
| 118 | regs.SetFromRaw(); |
| 119 | |
| 120 | elf_memory_->SetData64(0x8000, 0xd4000001d2801168ULL); |
| 121 | |
| 122 | for (uint64_t index = 0; index <= 100; index++) { |
| 123 | process_memory_.SetData64(addr + index * 8, index * 0x10); |
| 124 | } |
| 125 | |
| 126 | ASSERT_TRUE(regs.StepIfSignalHandler(0x8000, elf_.get(), &process_memory_)); |
| 127 | EXPECT_EQ(0x460U, regs[ARM64_REG_SP]); |
| 128 | EXPECT_EQ(0x470U, regs[ARM64_REG_PC]); |
| 129 | EXPECT_EQ(0x460U, regs.sp()); |
| 130 | EXPECT_EQ(0x470U, regs.pc()); |
| 131 | } |
| 132 | |
| 133 | TEST_F(RegsStepIfSignalHandlerTest, x86_step_if_signal_handler_no_siginfo) { |
| 134 | uint64_t addr = 0xa00; |
| 135 | RegsX86 regs; |
| 136 | regs[X86_REG_EIP] = 0x4100; |
| 137 | regs[X86_REG_ESP] = addr; |
| 138 | regs.SetFromRaw(); |
| 139 | |
| 140 | elf_memory_->SetData64(0x4100, 0x80cd00000077b858ULL); |
| 141 | for (uint64_t index = 0; index <= 25; index++) { |
| 142 | process_memory_.SetData32(addr + index * 4, index * 0x10); |
| 143 | } |
| 144 | |
| 145 | ASSERT_TRUE(regs.StepIfSignalHandler(0x4100, elf_.get(), &process_memory_)); |
| 146 | EXPECT_EQ(0x70U, regs[X86_REG_EBP]); |
| 147 | EXPECT_EQ(0x80U, regs[X86_REG_ESP]); |
| 148 | EXPECT_EQ(0x90U, regs[X86_REG_EBX]); |
| 149 | EXPECT_EQ(0xa0U, regs[X86_REG_EDX]); |
| 150 | EXPECT_EQ(0xb0U, regs[X86_REG_ECX]); |
| 151 | EXPECT_EQ(0xc0U, regs[X86_REG_EAX]); |
| 152 | EXPECT_EQ(0xf0U, regs[X86_REG_EIP]); |
| 153 | EXPECT_EQ(0x80U, regs.sp()); |
| 154 | EXPECT_EQ(0xf0U, regs.pc()); |
| 155 | } |
| 156 | |
| 157 | TEST_F(RegsStepIfSignalHandlerTest, x86_step_if_signal_handler_siginfo) { |
| 158 | uint64_t addr = 0xa00; |
| 159 | RegsX86 regs; |
| 160 | regs[X86_REG_EIP] = 0x4100; |
| 161 | regs[X86_REG_ESP] = addr; |
| 162 | regs.SetFromRaw(); |
| 163 | |
| 164 | elf_memory_->SetData64(0x4100, 0x0080cd000000adb8ULL); |
| 165 | addr += 8; |
| 166 | // Pointer to ucontext data. |
| 167 | process_memory_.SetData32(addr, 0x8100); |
| 168 | |
| 169 | addr = 0x8100; |
| 170 | for (uint64_t index = 0; index <= 30; index++) { |
| 171 | process_memory_.SetData32(addr + index * 4, index * 0x10); |
| 172 | } |
| 173 | |
| 174 | ASSERT_TRUE(regs.StepIfSignalHandler(0x4100, elf_.get(), &process_memory_)); |
| 175 | EXPECT_EQ(0xb0U, regs[X86_REG_EBP]); |
| 176 | EXPECT_EQ(0xc0U, regs[X86_REG_ESP]); |
| 177 | EXPECT_EQ(0xd0U, regs[X86_REG_EBX]); |
| 178 | EXPECT_EQ(0xe0U, regs[X86_REG_EDX]); |
| 179 | EXPECT_EQ(0xf0U, regs[X86_REG_ECX]); |
| 180 | EXPECT_EQ(0x100U, regs[X86_REG_EAX]); |
| 181 | EXPECT_EQ(0x130U, regs[X86_REG_EIP]); |
| 182 | EXPECT_EQ(0xc0U, regs.sp()); |
| 183 | EXPECT_EQ(0x130U, regs.pc()); |
| 184 | } |
| 185 | |
| 186 | TEST_F(RegsStepIfSignalHandlerTest, x86_64_step_if_signal_handler) { |
| 187 | uint64_t addr = 0x500; |
| 188 | RegsX86_64 regs; |
| 189 | regs[X86_64_REG_RIP] = 0x7000; |
| 190 | regs[X86_64_REG_RSP] = addr; |
| 191 | regs.SetFromRaw(); |
| 192 | |
| 193 | elf_memory_->SetData64(0x7000, 0x0f0000000fc0c748); |
| 194 | elf_memory_->SetData16(0x7008, 0x0f05); |
| 195 | |
| 196 | for (uint64_t index = 0; index <= 30; index++) { |
| 197 | process_memory_.SetData64(addr + index * 8, index * 0x10); |
| 198 | } |
| 199 | |
| 200 | ASSERT_TRUE(regs.StepIfSignalHandler(0x7000, elf_.get(), &process_memory_)); |
| 201 | EXPECT_EQ(0x140U, regs[X86_64_REG_RSP]); |
| 202 | EXPECT_EQ(0x150U, regs[X86_64_REG_RIP]); |
| 203 | EXPECT_EQ(0x140U, regs.sp()); |
| 204 | EXPECT_EQ(0x150U, regs.pc()); |
| 205 | } |
| 206 | |
| 207 | } // namespace unwindstack |