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Pierre-Clément Tosia0934c12022-11-25 20:54:11 +00001// Copyright 2022, The Android Open Source Project
2//
3// Licensed under the Apache License, Version 2.0 (the "License");
4// you may not use this file except in compliance with the License.
5// You may obtain a copy of the License at
6//
7// http://www.apache.org/licenses/LICENSE-2.0
8//
9// Unless required by applicable law or agreed to in writing, software
10// distributed under the License is distributed on an "AS IS" BASIS,
11// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
12// See the License for the specific language governing permissions and
13// limitations under the License.
14
15//! Low-level allocation and tracking of main memory.
16
Pierre-Clément Tosi462bdf42024-10-30 17:46:23 +000017use crate::entry::RebootReason;
18use crate::fdt;
Alice Wang4be4dd02023-06-07 07:50:40 +000019use crate::helpers::PVMFW_PAGE_SIZE;
Alice Wanga3931aa2023-07-05 12:52:09 +000020use aarch64_paging::paging::VirtualAddress;
Pierre-Clément Tosiad1fc752023-05-31 16:56:56 +000021use aarch64_paging::MapError;
Pierre-Clément Tosi462bdf42024-10-30 17:46:23 +000022use core::num::NonZeroUsize;
Alice Wanga3931aa2023-07-05 12:52:09 +000023use core::ops::Range;
Pierre-Clément Tosia0934c12022-11-25 20:54:11 +000024use core::result;
Pierre-Clément Tosi462bdf42024-10-30 17:46:23 +000025use core::slice;
26use log::debug;
Alice Wang93ee98a2023-06-08 08:20:39 +000027use log::error;
Pierre-Clément Tosi462bdf42024-10-30 17:46:23 +000028use log::info;
29use log::warn;
Pierre-Clément Tosi3d4c5c32023-05-31 16:57:06 +000030use vmbase::{
Pierre-Clément Tosi462bdf42024-10-30 17:46:23 +000031 layout::{self, crosvm},
Pierre-Clément Tosic26e2202024-11-01 23:12:23 +000032 memory::{init_shared_pool, map_data, map_rodata, resize_available_memory, PageTable},
Pierre-Clément Tosi3d4c5c32023-05-31 16:57:06 +000033};
Pierre-Clément Tosia0934c12022-11-25 20:54:11 +000034
Pierre-Clément Tosiad1fc752023-05-31 16:56:56 +000035/// Region allocated for the stack.
Alice Wanga3931aa2023-07-05 12:52:09 +000036pub fn stack_range() -> Range<VirtualAddress> {
Pierre-Clément Tosi9ddfab52024-04-24 23:03:46 +010037 const STACK_PAGES: usize = 12;
Pierre-Clément Tosiad1fc752023-05-31 16:56:56 +000038
39 layout::stack_range(STACK_PAGES * PVMFW_PAGE_SIZE)
40}
41
42pub fn init_page_table() -> result::Result<PageTable, MapError> {
Alice Wangee5b1802023-06-07 07:41:54 +000043 let mut page_table = PageTable::default();
Pierre-Clément Tosiad1fc752023-05-31 16:56:56 +000044
45 // Stack and scratch ranges are explicitly zeroed and flushed before jumping to payload,
46 // so dirty state management can be omitted.
Pierre-Clément Tosi0b02a2b2024-11-28 22:48:27 +000047 page_table.map_data(&layout::data_bss_range().into())?;
48 page_table.map_data(&layout::eh_stack_range().into())?;
Alice Wanga3931aa2023-07-05 12:52:09 +000049 page_table.map_data(&stack_range().into())?;
50 page_table.map_code(&layout::text_range().into())?;
51 page_table.map_rodata(&layout::rodata_range().into())?;
Pierre-Clément Tosi38a36212024-06-06 11:30:39 +010052 if let Err(e) = page_table.map_device(&layout::console_uart_page().into()) {
Alice Wang807fa592023-06-02 09:54:43 +000053 error!("Failed to remap the UART as a dynamic page table entry: {e}");
54 return Err(e);
55 }
Pierre-Clément Tosiad1fc752023-05-31 16:56:56 +000056 Ok(page_table)
57}
Pierre-Clément Tosi462bdf42024-10-30 17:46:23 +000058
59pub(crate) struct MemorySlices<'a> {
60 pub fdt: &'a mut libfdt::Fdt,
61 pub kernel: &'a [u8],
62 pub ramdisk: Option<&'a [u8]>,
63}
64
65impl<'a> MemorySlices<'a> {
66 pub fn new(
67 fdt: usize,
68 kernel: usize,
69 kernel_size: usize,
70 vm_dtbo: Option<&mut [u8]>,
71 vm_ref_dt: Option<&[u8]>,
72 ) -> Result<Self, RebootReason> {
73 let fdt_size = NonZeroUsize::new(crosvm::FDT_MAX_SIZE).unwrap();
74 // TODO - Only map the FDT as read-only, until we modify it right before jump_to_payload()
75 // e.g. by generating a DTBO for a template DT in main() and, on return, re-map DT as RW,
76 // overwrite with the template DT and apply the DTBO.
Pierre-Clément Tosic26e2202024-11-01 23:12:23 +000077 map_data(fdt, fdt_size).map_err(|e| {
Pierre-Clément Tosi462bdf42024-10-30 17:46:23 +000078 error!("Failed to allocate the FDT range: {e}");
79 RebootReason::InternalError
80 })?;
81
Pierre-Clément Tosic26e2202024-11-01 23:12:23 +000082 // SAFETY: map_data validated the range to be in main memory, mapped, and not overlap.
83 let fdt = unsafe { slice::from_raw_parts_mut(fdt as *mut u8, fdt_size.into()) };
Pierre-Clément Tosi462bdf42024-10-30 17:46:23 +000084
85 let info = fdt::sanitize_device_tree(fdt, vm_dtbo, vm_ref_dt)?;
86 let fdt = libfdt::Fdt::from_mut_slice(fdt).map_err(|e| {
87 error!("Failed to load sanitized FDT: {e}");
88 RebootReason::InvalidFdt
89 })?;
90 debug!("Fdt passed validation!");
91
92 let memory_range = info.memory_range;
93 debug!("Resizing MemoryTracker to range {memory_range:#x?}");
Pierre-Clément Tosic26e2202024-11-01 23:12:23 +000094 resize_available_memory(&memory_range).map_err(|e| {
Pierre-Clément Tosi462bdf42024-10-30 17:46:23 +000095 error!("Failed to use memory range value from DT: {memory_range:#x?}: {e}");
96 RebootReason::InvalidFdt
97 })?;
98
Pierre-Clément Tosic26e2202024-11-01 23:12:23 +000099 init_shared_pool(info.swiotlb_info.fixed_range()).map_err(|e| {
100 error!("Failed to initialize shared pool: {e}");
101 RebootReason::InternalError
102 })?;
Pierre-Clément Tosi462bdf42024-10-30 17:46:23 +0000103
Pierre-Clément Tosic26e2202024-11-01 23:12:23 +0000104 let (kernel_start, kernel_size) = if let Some(r) = info.kernel_range {
105 let size = r.len().try_into().map_err(|_| {
106 error!("Invalid kernel size: {:#x}", r.len());
Pierre-Clément Tosi462bdf42024-10-30 17:46:23 +0000107 RebootReason::InternalError
Pierre-Clément Tosic26e2202024-11-01 23:12:23 +0000108 })?;
109 (r.start, size)
Pierre-Clément Tosi462bdf42024-10-30 17:46:23 +0000110 } else if cfg!(feature = "legacy") {
111 warn!("Failed to find the kernel range in the DT; falling back to legacy ABI");
Pierre-Clément Tosic26e2202024-11-01 23:12:23 +0000112 let size = NonZeroUsize::new(kernel_size).ok_or_else(|| {
Pierre-Clément Tosi462bdf42024-10-30 17:46:23 +0000113 error!("Invalid kernel size: {kernel_size:#x}");
114 RebootReason::InvalidPayload
115 })?;
Pierre-Clément Tosic26e2202024-11-01 23:12:23 +0000116 (kernel, size)
Pierre-Clément Tosi462bdf42024-10-30 17:46:23 +0000117 } else {
118 error!("Failed to locate the kernel from the DT");
119 return Err(RebootReason::InvalidPayload);
120 };
121
Pierre-Clément Tosic26e2202024-11-01 23:12:23 +0000122 map_rodata(kernel_start, kernel_size).map_err(|e| {
123 error!("Failed to map kernel range: {e}");
124 RebootReason::InternalError
125 })?;
126
127 let kernel = kernel_start as *const u8;
128 // SAFETY: map_rodata validated the range to be in main memory, mapped, and not overlap.
129 let kernel = unsafe { slice::from_raw_parts(kernel, kernel_size.into()) };
Pierre-Clément Tosi462bdf42024-10-30 17:46:23 +0000130
131 let ramdisk = if let Some(r) = info.initrd_range {
132 debug!("Located ramdisk at {r:?}");
Pierre-Clément Tosic26e2202024-11-01 23:12:23 +0000133 let ramdisk_size = r.len().try_into().map_err(|_| {
134 error!("Invalid ramdisk size: {:#x}", r.len());
135 RebootReason::InvalidRamdisk
136 })?;
137 map_rodata(r.start, ramdisk_size).map_err(|e| {
Pierre-Clément Tosi462bdf42024-10-30 17:46:23 +0000138 error!("Failed to obtain the initrd range: {e}");
139 RebootReason::InvalidRamdisk
140 })?;
141
Pierre-Clément Tosic26e2202024-11-01 23:12:23 +0000142 // SAFETY: map_rodata validated the range to be in main memory, mapped, and not
143 // overlap.
Pierre-Clément Tosi462bdf42024-10-30 17:46:23 +0000144 Some(unsafe { slice::from_raw_parts(r.start as *const u8, r.len()) })
145 } else {
146 info!("Couldn't locate the ramdisk from the device tree");
147 None
148 };
149
150 Ok(Self { fdt, kernel, ramdisk })
151 }
152}