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Pierre-Clément Tosi5bbfca52022-10-21 12:14:35 +01001// Copyright 2022, The Android Open Source Project
2//
3// Licensed under the Apache License, Version 2.0 (the "License");
4// you may not use this file except in compliance with the License.
5// You may obtain a copy of the License at
6//
7// http://www.apache.org/licenses/LICENSE-2.0
8//
9// Unless required by applicable law or agreed to in writing, software
10// distributed under the License is distributed on an "AS IS" BASIS,
11// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
12// See the License for the specific language governing permissions and
13// limitations under the License.
14
15//! Low-level entry and exit points of pvmfw.
16
Pierre-Clément Tosi20b60962022-10-17 13:35:27 +010017use crate::config;
Pierre-Clément Tosi41748ed2023-03-31 18:20:40 +010018use crate::crypto;
Pierre-Clément Tosia0934c12022-11-25 20:54:11 +000019use crate::fdt;
Pierre-Clément Tosifc531152022-10-20 12:22:23 +010020use crate::heap;
Alice Wang93ee98a2023-06-08 08:20:39 +000021use crate::memory;
Pierre-Clément Tosia59103d2023-02-02 14:46:55 +000022use crate::rand;
Pierre-Clément Tosi645e90e2022-10-21 13:27:19 +010023use core::arch::asm;
Jakob Vukalovic4c1edbe2023-04-17 19:10:57 +010024use core::mem::{drop, size_of};
Pierre-Clément Tosia0934c12022-11-25 20:54:11 +000025use core::num::NonZeroUsize;
Pierre-Clément Tosi97f52492023-04-04 15:52:17 +010026use core::ops::Range;
Pierre-Clément Tosi5bbfca52022-10-21 12:14:35 +010027use core::slice;
Srivatsa Vaddagiri37713ec2023-04-20 04:04:08 -070028use hyp::{get_hypervisor, HypervisorCap};
Pierre-Clément Tosie8726e42022-10-17 13:35:27 +010029use log::debug;
30use log::error;
Pierre-Clément Tosia0934c12022-11-25 20:54:11 +000031use log::info;
Pierre-Clément Tosi20b60962022-10-17 13:35:27 +010032use log::warn;
Pierre-Clément Tosie8726e42022-10-17 13:35:27 +010033use log::LevelFilter;
Alice Wang4be4dd02023-06-07 07:50:40 +000034use vmbase::util::RangeExt as _;
Alice Wangeacb7382023-06-05 12:53:54 +000035use vmbase::{
Alice Wang4c70d142023-06-06 11:52:33 +000036 console,
37 layout::{self, crosvm},
38 logger, main,
Alice Wang93ee98a2023-06-08 08:20:39 +000039 memory::{min_dcache_line_size, MemoryTracker, MEMORY, SIZE_2MB, SIZE_4KB},
Alice Wangeacb7382023-06-05 12:53:54 +000040 power::reboot,
41};
Jakob Vukalovic44b1ce32023-04-17 19:10:10 +010042use zeroize::Zeroize;
Pierre-Clément Tosi5bbfca52022-10-21 12:14:35 +010043
44#[derive(Debug, Clone)]
Andrew Walbran19690632022-12-07 16:41:30 +000045pub enum RebootReason {
Pierre-Clément Tosie8726e42022-10-17 13:35:27 +010046 /// A malformed BCC was received.
47 InvalidBcc,
Pierre-Clément Tosi20b60962022-10-17 13:35:27 +010048 /// An invalid configuration was appended to pvmfw.
49 InvalidConfig,
Pierre-Clément Tosi5bbfca52022-10-21 12:14:35 +010050 /// An unexpected internal error happened.
51 InternalError,
Pierre-Clément Tosia0934c12022-11-25 20:54:11 +000052 /// The provided FDT was invalid.
53 InvalidFdt,
54 /// The provided payload was invalid.
55 InvalidPayload,
56 /// The provided ramdisk was invalid.
57 InvalidRamdisk,
Alice Wang28cbcf12022-12-01 07:58:28 +000058 /// Failed to verify the payload.
59 PayloadVerificationError,
Pierre-Clément Tosi4f4f5eb2022-12-08 14:31:42 +000060 /// DICE layering process failed.
61 SecretDerivationError,
Pierre-Clément Tosi5bbfca52022-10-21 12:14:35 +010062}
63
64main!(start);
65
66/// Entry point for pVM firmware.
67pub fn start(fdt_address: u64, payload_start: u64, payload_size: u64, _arg3: u64) {
68 // Limitations in this function:
69 // - can't access non-pvmfw memory (only statically-mapped memory)
70 // - can't access MMIO (therefore, no logging)
71
Pierre-Clément Tosif03089c2023-05-15 17:33:39 +000072 // SAFETY - This function should and will only be called once, here.
73 unsafe { heap::init() };
74
Pierre-Clément Tosi5bbfca52022-10-21 12:14:35 +010075 match main_wrapper(fdt_address as usize, payload_start as usize, payload_size as usize) {
Pierre-Clément Tosi97f52492023-04-04 15:52:17 +010076 Ok((entry, bcc)) => jump_to_payload(fdt_address, entry.try_into().unwrap(), bcc),
Pierre-Clément Tosid836b5b2022-12-05 10:49:38 +000077 Err(_) => reboot(), // TODO(b/220071963) propagate the reason back to the host.
Pierre-Clément Tosi5bbfca52022-10-21 12:14:35 +010078 }
79
80 // if we reach this point and return, vmbase::entry::rust_entry() will call power::shutdown().
81}
82
Pierre-Clément Tosia0934c12022-11-25 20:54:11 +000083struct MemorySlices<'a> {
84 fdt: &'a mut libfdt::Fdt,
85 kernel: &'a [u8],
86 ramdisk: Option<&'a [u8]>,
87}
88
89impl<'a> MemorySlices<'a> {
Jakob Vukalovic44b1ce32023-04-17 19:10:10 +010090 fn new(fdt: usize, kernel: usize, kernel_size: usize) -> Result<Self, RebootReason> {
Pierre-Clément Tosia0934c12022-11-25 20:54:11 +000091 // SAFETY - SIZE_2MB is non-zero.
Alice Wangeacb7382023-06-05 12:53:54 +000092 const FDT_SIZE: NonZeroUsize = unsafe { NonZeroUsize::new_unchecked(SIZE_2MB) };
Pierre-Clément Tosia0934c12022-11-25 20:54:11 +000093 // TODO - Only map the FDT as read-only, until we modify it right before jump_to_payload()
94 // e.g. by generating a DTBO for a template DT in main() and, on return, re-map DT as RW,
95 // overwrite with the template DT and apply the DTBO.
Jakob Vukalovic44b1ce32023-04-17 19:10:10 +010096 let range = MEMORY.lock().as_mut().unwrap().alloc_mut(fdt, FDT_SIZE).map_err(|e| {
Pierre-Clément Tosia0934c12022-11-25 20:54:11 +000097 error!("Failed to allocate the FDT range: {e}");
98 RebootReason::InternalError
99 })?;
100
101 // SAFETY - The tracker validated the range to be in main memory, mapped, and not overlap.
102 let fdt = unsafe { slice::from_raw_parts_mut(range.start as *mut u8, range.len()) };
103 let fdt = libfdt::Fdt::from_mut_slice(fdt).map_err(|e| {
104 error!("Failed to spawn the FDT wrapper: {e}");
105 RebootReason::InvalidFdt
106 })?;
107
Jiyong Park6a8789a2023-03-21 14:50:59 +0900108 let info = fdt::sanitize_device_tree(fdt)?;
Pierre-Clément Tosia0934c12022-11-25 20:54:11 +0000109 debug!("Fdt passed validation!");
110
Jiyong Park6a8789a2023-03-21 14:50:59 +0900111 let memory_range = info.memory_range;
Pierre-Clément Tosia0934c12022-11-25 20:54:11 +0000112 debug!("Resizing MemoryTracker to range {memory_range:#x?}");
Jakob Vukalovic44b1ce32023-04-17 19:10:10 +0100113 MEMORY.lock().as_mut().unwrap().shrink(&memory_range).map_err(|e| {
114 error!("Failed to use memory range value from DT: {memory_range:#x?}: {e}");
Pierre-Clément Tosia0934c12022-11-25 20:54:11 +0000115 RebootReason::InvalidFdt
116 })?;
117
Pierre-Clément Tosif19c0e62023-05-02 13:56:58 +0000118 if get_hypervisor().has_cap(HypervisorCap::DYNAMIC_MEM_SHARE) {
Jakob Vukalovic44b1ce32023-04-17 19:10:10 +0100119 MEMORY.lock().as_mut().unwrap().init_dynamic_shared_pool().map_err(|e| {
Pierre-Clément Tosif19c0e62023-05-02 13:56:58 +0000120 error!("Failed to initialize dynamically shared pool: {e}");
121 RebootReason::InternalError
122 })?;
123 } else {
Srivatsa Vaddagiri37713ec2023-04-20 04:04:08 -0700124 let range = info.swiotlb_info.fixed_range().ok_or_else(|| {
125 error!("Pre-shared pool range not specified in swiotlb node");
126 RebootReason::InvalidFdt
127 })?;
128
Jakob Vukalovic44b1ce32023-04-17 19:10:10 +0100129 MEMORY.lock().as_mut().unwrap().init_static_shared_pool(range).map_err(|e| {
Srivatsa Vaddagiri37713ec2023-04-20 04:04:08 -0700130 error!("Failed to initialize pre-shared pool {e}");
131 RebootReason::InvalidFdt
132 })?;
133 }
134
Jiyong Park6a8789a2023-03-21 14:50:59 +0900135 let kernel_range = if let Some(r) = info.kernel_range {
Jakob Vukalovic44b1ce32023-04-17 19:10:10 +0100136 MEMORY.lock().as_mut().unwrap().alloc_range(&r).map_err(|e| {
Pierre-Clément Tosic3811b82022-11-29 11:24:16 +0000137 error!("Failed to obtain the kernel range with DT range: {e}");
138 RebootReason::InternalError
139 })?
140 } else if cfg!(feature = "legacy") {
141 warn!("Failed to find the kernel range in the DT; falling back to legacy ABI");
142
143 let kernel_size = NonZeroUsize::new(kernel_size).ok_or_else(|| {
144 error!("Invalid kernel size: {kernel_size:#x}");
145 RebootReason::InvalidPayload
146 })?;
147
Jakob Vukalovic44b1ce32023-04-17 19:10:10 +0100148 MEMORY.lock().as_mut().unwrap().alloc(kernel, kernel_size).map_err(|e| {
Pierre-Clément Tosic3811b82022-11-29 11:24:16 +0000149 error!("Failed to obtain the kernel range with legacy range: {e}");
150 RebootReason::InternalError
151 })?
152 } else {
153 error!("Failed to locate the kernel from the DT");
154 return Err(RebootReason::InvalidPayload);
155 };
156
Pierre-Clément Tosia0934c12022-11-25 20:54:11 +0000157 // SAFETY - The tracker validated the range to be in main memory, mapped, and not overlap.
158 let kernel =
Pierre-Clément Tosic3811b82022-11-29 11:24:16 +0000159 unsafe { slice::from_raw_parts(kernel_range.start as *const u8, kernel_range.len()) };
Pierre-Clément Tosia0934c12022-11-25 20:54:11 +0000160
Jiyong Park6a8789a2023-03-21 14:50:59 +0900161 let ramdisk = if let Some(r) = info.initrd_range {
Pierre-Clément Tosia0934c12022-11-25 20:54:11 +0000162 debug!("Located ramdisk at {r:?}");
Jakob Vukalovic44b1ce32023-04-17 19:10:10 +0100163 let r = MEMORY.lock().as_mut().unwrap().alloc_range(&r).map_err(|e| {
Pierre-Clément Tosia0934c12022-11-25 20:54:11 +0000164 error!("Failed to obtain the initrd range: {e}");
165 RebootReason::InvalidRamdisk
166 })?;
167
168 // SAFETY - The region was validated by memory to be in main memory, mapped, and
169 // not overlap.
170 Some(unsafe { slice::from_raw_parts(r.start as *const u8, r.len()) })
171 } else {
172 info!("Couldn't locate the ramdisk from the device tree");
173 None
174 };
175
176 Ok(Self { fdt, kernel, ramdisk })
177 }
178}
179
Pierre-Clément Tosi5bbfca52022-10-21 12:14:35 +0100180/// Sets up the environment for main() and wraps its result for start().
181///
182/// Provide the abstractions necessary for start() to abort the pVM boot and for main() to run with
183/// the assumption that its environment has been properly configured.
Pierre-Clément Tosi97f52492023-04-04 15:52:17 +0100184fn main_wrapper(
185 fdt: usize,
186 payload: usize,
187 payload_size: usize,
188) -> Result<(usize, Range<usize>), RebootReason> {
Pierre-Clément Tosi5bbfca52022-10-21 12:14:35 +0100189 // Limitations in this function:
190 // - only access MMIO once (and while) it has been mapped and configured
191 // - only perform logging once the logger has been initialized
192 // - only access non-pvmfw memory once (and while) it has been mapped
Pierre-Clément Tosifc531152022-10-20 12:22:23 +0100193
Pierre-Clément Tosidbd72862022-10-21 14:31:02 +0100194 logger::init(LevelFilter::Info).map_err(|_| RebootReason::InternalError)?;
Pierre-Clément Tosi5bbfca52022-10-21 12:14:35 +0100195
Pierre-Clément Tosi072969b2022-10-19 17:32:24 +0100196 // Use debug!() to avoid printing to the UART if we failed to configure it as only local
197 // builds that have tweaked the logger::init() call will actually attempt to log the message.
198
Alice Wang90e6f162023-04-17 13:49:45 +0000199 get_hypervisor().mmio_guard_init().map_err(|e| {
Pierre-Clément Tosi072969b2022-10-19 17:32:24 +0100200 debug!("{e}");
Pierre-Clément Tosi5bbfca52022-10-21 12:14:35 +0100201 RebootReason::InternalError
202 })?;
203
Alice Wang90e6f162023-04-17 13:49:45 +0000204 get_hypervisor().mmio_guard_map(console::BASE_ADDRESS).map_err(|e| {
Pierre-Clément Tosi072969b2022-10-19 17:32:24 +0100205 debug!("Failed to configure the UART: {e}");
206 RebootReason::InternalError
207 })?;
208
Pierre-Clément Tosi41748ed2023-03-31 18:20:40 +0100209 crypto::init();
210
Alice Wang807fa592023-06-02 09:54:43 +0000211 let page_table = memory::init_page_table().map_err(|e| {
Pierre-Clément Tosia8a4a202022-11-03 14:16:46 +0000212 error!("Failed to set up the dynamic page tables: {e}");
213 RebootReason::InternalError
214 })?;
Alan Stokesc3829f12023-06-02 15:02:23 +0100215
216 // SAFETY - We only get the appended payload from here, once. The region was statically mapped,
217 // then remapped by `init_page_table()`.
218 let appended_data = unsafe { get_appended_data_slice() };
219
220 let mut appended = AppendedPayload::new(appended_data).ok_or_else(|| {
Pierre-Clément Tosi20b60962022-10-17 13:35:27 +0100221 error!("No valid configuration found");
222 RebootReason::InvalidConfig
Pierre-Clément Tosia8a4a202022-11-03 14:16:46 +0000223 })?;
224
Pierre-Clément Tosiefe780c2023-02-21 21:36:30 +0000225 let (bcc_slice, debug_policy) = appended.get_entries();
Pierre-Clément Tosie8726e42022-10-17 13:35:27 +0100226
Jakob Vukalovic4c1edbe2023-04-17 19:10:57 +0100227 // Up to this point, we were using the built-in static (from .rodata) page tables.
Alice Wang4c70d142023-06-06 11:52:33 +0000228 MEMORY.lock().replace(MemoryTracker::new(
229 page_table,
230 crosvm::MEM_START..memory::MAX_ADDR,
231 crosvm::MMIO_START..crosvm::MMIO_END,
Alice Wang5bb79502023-06-12 09:25:07 +0000232 Some(memory::appended_payload_range()),
Alice Wang4c70d142023-06-06 11:52:33 +0000233 ));
Jakob Vukalovic4c1edbe2023-04-17 19:10:57 +0100234
Jakob Vukalovic44b1ce32023-04-17 19:10:10 +0100235 let slices = MemorySlices::new(fdt, payload, payload_size)?;
Pierre-Clément Tosia0934c12022-11-25 20:54:11 +0000236
Pierre-Clément Tosia59103d2023-02-02 14:46:55 +0000237 rand::init().map_err(|e| {
238 error!("Failed to initialize rand: {e}");
239 RebootReason::InternalError
240 })?;
241
Pierre-Clément Tosi072969b2022-10-19 17:32:24 +0100242 // This wrapper allows main() to be blissfully ignorant of platform details.
Jakob Vukalovicb99905d2023-04-20 15:46:02 +0100243 let next_bcc = crate::main(slices.fdt, slices.kernel, slices.ramdisk, bcc_slice, debug_policy)?;
Pierre-Clément Tosie8726e42022-10-17 13:35:27 +0100244
Jakob Vukalovic44b1ce32023-04-17 19:10:10 +0100245 // Writable-dirty regions will be flushed when MemoryTracker is dropped.
246 bcc_slice.zeroize();
Pierre-Clément Tosi072969b2022-10-19 17:32:24 +0100247
Andrew Walbran19690632022-12-07 16:41:30 +0000248 info!("Expecting a bug making MMIO_GUARD_UNMAP return NOT_SUPPORTED on success");
Jakob Vukalovic85a00d72023-04-20 09:51:10 +0100249 MEMORY.lock().as_mut().unwrap().mmio_unmap_all().map_err(|e| {
Andrew Walbran19690632022-12-07 16:41:30 +0000250 error!("Failed to unshare MMIO ranges: {e}");
251 RebootReason::InternalError
252 })?;
Pierre-Clément Tosif19c0e62023-05-02 13:56:58 +0000253 // Call unshare_all_memory here (instead of relying on the dtor) while UART is still mapped.
254 MEMORY.lock().as_mut().unwrap().unshare_all_memory();
Alice Wang90e6f162023-04-17 13:49:45 +0000255 get_hypervisor().mmio_guard_unmap(console::BASE_ADDRESS).map_err(|e| {
Pierre-Clément Tosia99bfa62022-10-06 13:30:52 +0100256 error!("Failed to unshare the UART: {e}");
257 RebootReason::InternalError
258 })?;
Jakob Vukalovic4c1edbe2023-04-17 19:10:57 +0100259
260 // Drop MemoryTracker and deactivate page table.
261 drop(MEMORY.lock().take());
Pierre-Clément Tosia99bfa62022-10-06 13:30:52 +0100262
Pierre-Clément Tosi97f52492023-04-04 15:52:17 +0100263 Ok((slices.kernel.as_ptr() as usize, next_bcc))
Pierre-Clément Tosi5bbfca52022-10-21 12:14:35 +0100264}
Pierre-Clément Tosi645e90e2022-10-21 13:27:19 +0100265
Pierre-Clément Tosi97f52492023-04-04 15:52:17 +0100266fn jump_to_payload(fdt_address: u64, payload_start: u64, bcc: Range<usize>) -> ! {
267 const ASM_STP_ALIGN: usize = size_of::<u64>() * 2;
Pierre-Clément Tosi6c0d48b2022-11-07 11:00:32 +0000268 const SCTLR_EL1_RES1: u64 = (0b11 << 28) | (0b101 << 20) | (0b1 << 11);
Pierre-Clément Tosi645e90e2022-10-21 13:27:19 +0100269 // Stage 1 instruction access cacheability is unaffected.
Pierre-Clément Tosi6c0d48b2022-11-07 11:00:32 +0000270 const SCTLR_EL1_I: u64 = 0b1 << 12;
Pierre-Clément Tosi645e90e2022-10-21 13:27:19 +0100271 // SETEND instruction disabled at EL0 in aarch32 mode.
Pierre-Clément Tosi6c0d48b2022-11-07 11:00:32 +0000272 const SCTLR_EL1_SED: u64 = 0b1 << 8;
Pierre-Clément Tosi645e90e2022-10-21 13:27:19 +0100273 // Various IT instructions are disabled at EL0 in aarch32 mode.
Pierre-Clément Tosi6c0d48b2022-11-07 11:00:32 +0000274 const SCTLR_EL1_ITD: u64 = 0b1 << 7;
Pierre-Clément Tosi645e90e2022-10-21 13:27:19 +0100275
Pierre-Clément Tosi6c0d48b2022-11-07 11:00:32 +0000276 const SCTLR_EL1_VAL: u64 = SCTLR_EL1_RES1 | SCTLR_EL1_ITD | SCTLR_EL1_SED | SCTLR_EL1_I;
Pierre-Clément Tosi645e90e2022-10-21 13:27:19 +0100277
Pierre-Clément Tosi97f52492023-04-04 15:52:17 +0100278 let scratch = layout::scratch_range();
279
280 assert_ne!(scratch.len(), 0, "scratch memory is empty.");
281 assert_eq!(scratch.start % ASM_STP_ALIGN, 0, "scratch memory is misaligned.");
282 assert_eq!(scratch.end % ASM_STP_ALIGN, 0, "scratch memory is misaligned.");
283
284 assert!(bcc.is_within(&scratch));
285 assert_eq!(bcc.start % ASM_STP_ALIGN, 0, "Misaligned guest BCC.");
286 assert_eq!(bcc.end % ASM_STP_ALIGN, 0, "Misaligned guest BCC.");
287
Pierre-Clément Tosiad1fc752023-05-31 16:56:56 +0000288 let stack = memory::stack_range();
Pierre-Clément Tosi97f52492023-04-04 15:52:17 +0100289
290 assert_ne!(stack.len(), 0, "stack region is empty.");
291 assert_eq!(stack.start % ASM_STP_ALIGN, 0, "Misaligned stack region.");
292 assert_eq!(stack.end % ASM_STP_ALIGN, 0, "Misaligned stack region.");
293
294 // Zero all memory that could hold secrets and that can't be safely written to from Rust.
Pierre-Clément Tosi6c0d48b2022-11-07 11:00:32 +0000295 // Disable the exception vector, caches and page table and then jump to the payload at the
296 // given address, passing it the given FDT pointer.
297 //
Pierre-Clément Tosi645e90e2022-10-21 13:27:19 +0100298 // SAFETY - We're exiting pvmfw by passing the register values we need to a noreturn asm!().
299 unsafe {
300 asm!(
Pierre-Clément Tosi97f52492023-04-04 15:52:17 +0100301 "cmp {scratch}, {bcc}",
302 "b.hs 1f",
303
304 // Zero .data & .bss until BCC.
305 "0: stp xzr, xzr, [{scratch}], 16",
306 "cmp {scratch}, {bcc}",
307 "b.lo 0b",
308
309 "1:",
310 // Skip BCC.
311 "mov {scratch}, {bcc_end}",
312 "cmp {scratch}, {scratch_end}",
313 "b.hs 1f",
314
315 // Keep zeroing .data & .bss.
316 "0: stp xzr, xzr, [{scratch}], 16",
317 "cmp {scratch}, {scratch_end}",
318 "b.lo 0b",
319
320 "1:",
321 // Flush d-cache over .data & .bss (including BCC).
322 "0: dc cvau, {cache_line}",
323 "add {cache_line}, {cache_line}, {dcache_line_size}",
324 "cmp {cache_line}, {scratch_end}",
325 "b.lo 0b",
326
327 "mov {cache_line}, {stack}",
328 // Zero stack region.
329 "0: stp xzr, xzr, [{stack}], 16",
330 "cmp {stack}, {stack_end}",
331 "b.lo 0b",
332
333 // Flush d-cache over stack region.
334 "0: dc cvau, {cache_line}",
335 "add {cache_line}, {cache_line}, {dcache_line_size}",
336 "cmp {cache_line}, {stack_end}",
337 "b.lo 0b",
338
Pierre-Clément Tosi645e90e2022-10-21 13:27:19 +0100339 "msr sctlr_el1, {sctlr_el1_val}",
340 "isb",
341 "mov x1, xzr",
342 "mov x2, xzr",
343 "mov x3, xzr",
344 "mov x4, xzr",
345 "mov x5, xzr",
346 "mov x6, xzr",
347 "mov x7, xzr",
348 "mov x8, xzr",
349 "mov x9, xzr",
350 "mov x10, xzr",
351 "mov x11, xzr",
352 "mov x12, xzr",
353 "mov x13, xzr",
354 "mov x14, xzr",
355 "mov x15, xzr",
356 "mov x16, xzr",
357 "mov x17, xzr",
358 "mov x18, xzr",
359 "mov x19, xzr",
360 "mov x20, xzr",
361 "mov x21, xzr",
362 "mov x22, xzr",
363 "mov x23, xzr",
364 "mov x24, xzr",
365 "mov x25, xzr",
366 "mov x26, xzr",
367 "mov x27, xzr",
368 "mov x28, xzr",
369 "mov x29, xzr",
370 "msr ttbr0_el1, xzr",
Pierre-Clément Tosi97f52492023-04-04 15:52:17 +0100371 // Ensure that CMOs have completed before entering payload.
Pierre-Clément Tosi645e90e2022-10-21 13:27:19 +0100372 "dsb nsh",
373 "br x30",
374 sctlr_el1_val = in(reg) SCTLR_EL1_VAL,
Pierre-Clément Tosi97f52492023-04-04 15:52:17 +0100375 bcc = in(reg) u64::try_from(bcc.start).unwrap(),
376 bcc_end = in(reg) u64::try_from(bcc.end).unwrap(),
377 cache_line = in(reg) u64::try_from(scratch.start).unwrap(),
378 scratch = in(reg) u64::try_from(scratch.start).unwrap(),
379 scratch_end = in(reg) u64::try_from(scratch.end).unwrap(),
380 stack = in(reg) u64::try_from(stack.start).unwrap(),
381 stack_end = in(reg) u64::try_from(stack.end).unwrap(),
Alice Wang3fa9b802023-06-06 07:52:31 +0000382 dcache_line_size = in(reg) u64::try_from(min_dcache_line_size()).unwrap(),
Pierre-Clément Tosi645e90e2022-10-21 13:27:19 +0100383 in("x0") fdt_address,
384 in("x30") payload_start,
Pierre-Clément Tosi97f52492023-04-04 15:52:17 +0100385 options(noreturn),
Pierre-Clément Tosi645e90e2022-10-21 13:27:19 +0100386 );
387 };
388}
Pierre-Clément Tosie8726e42022-10-17 13:35:27 +0100389
Alan Stokesc3829f12023-06-02 15:02:23 +0100390/// # Safety
391///
392/// This must only be called once, since we are returning a mutable reference.
393/// The appended data region must be mapped.
Pierre-Clément Tosie8726e42022-10-17 13:35:27 +0100394unsafe fn get_appended_data_slice() -> &'static mut [u8] {
Pierre-Clément Tosiad1fc752023-05-31 16:56:56 +0000395 let range = memory::appended_payload_range();
Alan Stokesa0e42962023-04-14 17:59:50 +0100396 // SAFETY: This region is mapped and the linker script prevents it from overlapping with other
397 // objects.
Jakob Vukalovic44b1ce32023-04-17 19:10:10 +0100398 unsafe { slice::from_raw_parts_mut(range.start as *mut u8, range.len()) }
Pierre-Clément Tosie8726e42022-10-17 13:35:27 +0100399}
400
Pierre-Clément Tosi7aca7ff2022-12-12 14:04:30 +0000401enum AppendedConfigType {
402 Valid,
403 Invalid,
404 NotFound,
405}
406
Pierre-Clément Tosi20b60962022-10-17 13:35:27 +0100407enum AppendedPayload<'a> {
408 /// Configuration data.
409 Config(config::Config<'a>),
410 /// Deprecated raw BCC, as used in Android T.
411 LegacyBcc(&'a mut [u8]),
412}
Pierre-Clément Tosie8726e42022-10-17 13:35:27 +0100413
Pierre-Clément Tosi20b60962022-10-17 13:35:27 +0100414impl<'a> AppendedPayload<'a> {
Alan Stokesc3829f12023-06-02 15:02:23 +0100415 fn new(data: &'a mut [u8]) -> Option<Self> {
416 match Self::guess_config_type(data) {
Alan Stokesa0e42962023-04-14 17:59:50 +0100417 AppendedConfigType::Valid => {
Alan Stokesc3829f12023-06-02 15:02:23 +0100418 let config = config::Config::new(data);
Alan Stokesa0e42962023-04-14 17:59:50 +0100419 Some(Self::Config(config.unwrap()))
420 }
Pierre-Clément Tosi7aca7ff2022-12-12 14:04:30 +0000421 AppendedConfigType::NotFound if cfg!(feature = "legacy") => {
Alice Wangeacb7382023-06-05 12:53:54 +0000422 const BCC_SIZE: usize = SIZE_4KB;
Pierre-Clément Tosi7aca7ff2022-12-12 14:04:30 +0000423 warn!("Assuming the appended data at {:?} to be a raw BCC", data.as_ptr());
424 Some(Self::LegacyBcc(&mut data[..BCC_SIZE]))
425 }
426 _ => None,
Pierre-Clément Tosi20b60962022-10-17 13:35:27 +0100427 }
428 }
429
Alan Stokesc3829f12023-06-02 15:02:23 +0100430 fn guess_config_type(data: &mut [u8]) -> AppendedConfigType {
Pierre-Clément Tosi20b60962022-10-17 13:35:27 +0100431 // This function is necessary to prevent the borrow checker from getting confused
432 // about the ownership of data in new(); see https://users.rust-lang.org/t/78467.
433 let addr = data.as_ptr();
Alan Stokesa0e42962023-04-14 17:59:50 +0100434
Alan Stokesc3829f12023-06-02 15:02:23 +0100435 match config::Config::new(data) {
Pierre-Clément Tosi7aca7ff2022-12-12 14:04:30 +0000436 Err(config::Error::InvalidMagic) => {
437 warn!("No configuration data found at {addr:?}");
438 AppendedConfigType::NotFound
439 }
440 Err(e) => {
441 error!("Invalid configuration data at {addr:?}: {e}");
442 AppendedConfigType::Invalid
443 }
444 Ok(_) => AppendedConfigType::Valid,
445 }
Pierre-Clément Tosi20b60962022-10-17 13:35:27 +0100446 }
447
Pierre-Clément Tosiefe780c2023-02-21 21:36:30 +0000448 fn get_entries(&mut self) -> (&mut [u8], Option<&mut [u8]>) {
Pierre-Clément Tosi20b60962022-10-17 13:35:27 +0100449 match self {
Pierre-Clément Tosiefe780c2023-02-21 21:36:30 +0000450 Self::Config(ref mut cfg) => cfg.get_entries(),
451 Self::LegacyBcc(ref mut bcc) => (bcc, None),
Pierre-Clément Tosi8edf72e2022-12-06 16:02:57 +0000452 }
Pierre-Clément Tosie8726e42022-10-17 13:35:27 +0100453 }
454}