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Pierre-Clément Tosia0934c12022-11-25 20:54:11 +00001// Copyright 2022, The Android Open Source Project
2//
3// Licensed under the Apache License, Version 2.0 (the "License");
4// you may not use this file except in compliance with the License.
5// You may obtain a copy of the License at
6//
7// http://www.apache.org/licenses/LICENSE-2.0
8//
9// Unless required by applicable law or agreed to in writing, software
10// distributed under the License is distributed on an "AS IS" BASIS,
11// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
12// See the License for the specific language governing permissions and
13// limitations under the License.
14
15//! High-level FDT functions.
16
Jiyong Parkc5d2ef22023-04-11 01:23:46 +090017use crate::bootargs::BootArgsIterator;
Jiyong Park00ceff32023-03-13 05:43:23 +000018use crate::helpers::GUEST_PAGE_SIZE;
Jiyong Parkc5d2ef22023-04-11 01:23:46 +090019use crate::Box;
Jiyong Park00ceff32023-03-13 05:43:23 +000020use crate::RebootReason;
Jiyong Parke9d87e82023-03-21 19:28:40 +090021use alloc::ffi::CString;
Jiyong Parkc23426b2023-04-10 17:32:27 +090022use alloc::vec::Vec;
Jiyong Park0ee65392023-03-27 20:52:45 +090023use core::cmp::max;
24use core::cmp::min;
Pierre-Clément Tosia0934c12022-11-25 20:54:11 +000025use core::ffi::CStr;
Alice Wangabc7d632023-06-14 09:10:14 +000026use core::fmt;
Jiyong Park9c63cd12023-03-21 17:53:07 +090027use core::mem::size_of;
Pierre-Clément Tosia0934c12022-11-25 20:54:11 +000028use core::ops::Range;
Jiyong Park00ceff32023-03-13 05:43:23 +000029use fdtpci::PciMemoryFlags;
30use fdtpci::PciRangeType;
31use libfdt::AddressRange;
32use libfdt::CellIterator;
Pierre-Clément Tosi4ba79662023-02-13 11:22:41 +000033use libfdt::Fdt;
34use libfdt::FdtError;
Jiyong Park9c63cd12023-03-21 17:53:07 +090035use libfdt::FdtNode;
Jiyong Park83316122023-03-21 09:39:39 +090036use log::debug;
Jiyong Park00ceff32023-03-13 05:43:23 +000037use log::error;
Jiyong Parkc23426b2023-04-10 17:32:27 +090038use log::info;
Pierre-Clément Tosia50167b2023-05-02 13:19:29 +000039use log::warn;
Jiyong Park00ceff32023-03-13 05:43:23 +000040use tinyvec::ArrayVec;
Alice Wanga3971062023-06-13 11:48:53 +000041use vmbase::cstr;
42use vmbase::fdt::SwiotlbInfo;
Alice Wang63f4c9e2023-06-12 09:36:43 +000043use vmbase::layout::{crosvm::MEM_START, MAX_VIRT_ADDR};
Alice Wangeacb7382023-06-05 12:53:54 +000044use vmbase::memory::SIZE_4KB;
45use vmbase::util::flatten;
Alice Wang4be4dd02023-06-07 07:50:40 +000046use vmbase::util::RangeExt as _;
Pierre-Clément Tosia0934c12022-11-25 20:54:11 +000047
Alice Wangabc7d632023-06-14 09:10:14 +000048/// An enumeration of errors that can occur during the FDT validation.
49#[derive(Clone, Debug)]
50pub enum FdtValidationError {
51 /// Invalid CPU count.
52 InvalidCpuCount(usize),
53}
54
55impl fmt::Display for FdtValidationError {
56 fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result {
57 match self {
58 Self::InvalidCpuCount(num_cpus) => write!(f, "Invalid CPU count: {num_cpus}"),
59 }
60 }
61}
62
Jiyong Park6a8789a2023-03-21 14:50:59 +090063/// Extract from /config the address range containing the pre-loaded kernel. Absence of /config is
64/// not an error.
65fn read_kernel_range_from(fdt: &Fdt) -> libfdt::Result<Option<Range<usize>>> {
Jiyong Parkb87f3302023-03-21 10:03:11 +090066 let addr = cstr!("kernel-address");
67 let size = cstr!("kernel-size");
Pierre-Clément Tosic3811b82022-11-29 11:24:16 +000068
Jiyong Parkb87f3302023-03-21 10:03:11 +090069 if let Some(config) = fdt.node(cstr!("/config"))? {
Pierre-Clément Tosic3811b82022-11-29 11:24:16 +000070 if let (Some(addr), Some(size)) = (config.getprop_u32(addr)?, config.getprop_u32(size)?) {
71 let addr = addr as usize;
72 let size = size as usize;
73
74 return Ok(Some(addr..(addr + size)));
75 }
76 }
77
78 Ok(None)
79}
80
Jiyong Park6a8789a2023-03-21 14:50:59 +090081/// Extract from /chosen the address range containing the pre-loaded ramdisk. Absence is not an
82/// error as there can be initrd-less VM.
83fn read_initrd_range_from(fdt: &Fdt) -> libfdt::Result<Option<Range<usize>>> {
Jiyong Parkb87f3302023-03-21 10:03:11 +090084 let start = cstr!("linux,initrd-start");
85 let end = cstr!("linux,initrd-end");
Pierre-Clément Tosia0934c12022-11-25 20:54:11 +000086
87 if let Some(chosen) = fdt.chosen()? {
88 if let (Some(start), Some(end)) = (chosen.getprop_u32(start)?, chosen.getprop_u32(end)?) {
89 return Ok(Some((start as usize)..(end as usize)));
90 }
91 }
92
93 Ok(None)
94}
Pierre-Clément Tosidb74cb12022-12-08 13:56:25 +000095
Jiyong Park9c63cd12023-03-21 17:53:07 +090096fn patch_initrd_range(fdt: &mut Fdt, initrd_range: &Range<usize>) -> libfdt::Result<()> {
97 let start = u32::try_from(initrd_range.start).unwrap();
98 let end = u32::try_from(initrd_range.end).unwrap();
99
100 let mut node = fdt.chosen_mut()?.ok_or(FdtError::NotFound)?;
101 node.setprop(cstr!("linux,initrd-start"), &start.to_be_bytes())?;
102 node.setprop(cstr!("linux,initrd-end"), &end.to_be_bytes())?;
103 Ok(())
104}
105
Jiyong Parke9d87e82023-03-21 19:28:40 +0900106fn read_bootargs_from(fdt: &Fdt) -> libfdt::Result<Option<CString>> {
107 if let Some(chosen) = fdt.chosen()? {
108 if let Some(bootargs) = chosen.getprop_str(cstr!("bootargs"))? {
109 // We need to copy the string to heap because the original fdt will be invalidated
110 // by the templated DT
111 let copy = CString::new(bootargs.to_bytes()).map_err(|_| FdtError::BadValue)?;
112 return Ok(Some(copy));
113 }
114 }
115 Ok(None)
116}
117
118fn patch_bootargs(fdt: &mut Fdt, bootargs: &CStr) -> libfdt::Result<()> {
119 let mut node = fdt.chosen_mut()?.ok_or(FdtError::NotFound)?;
Jiyong Parkc5d2ef22023-04-11 01:23:46 +0900120 // This function is called before the verification is done. So, we just copy the bootargs to
121 // the new FDT unmodified. This will be filtered again in the modify_for_next_stage function
122 // if the VM is not debuggable.
Jiyong Parke9d87e82023-03-21 19:28:40 +0900123 node.setprop(cstr!("bootargs"), bootargs.to_bytes_with_nul())
124}
125
Jiyong Park6a8789a2023-03-21 14:50:59 +0900126/// Check if memory range is ok
127fn validate_memory_range(range: &Range<usize>) -> Result<(), RebootReason> {
128 let base = range.start;
Alice Wange243d462023-06-06 15:18:12 +0000129 if base != MEM_START {
130 error!("Memory base address {:#x} is not {:#x}", base, MEM_START);
Jiyong Park00ceff32023-03-13 05:43:23 +0000131 return Err(RebootReason::InvalidFdt);
132 }
133
Jiyong Park6a8789a2023-03-21 14:50:59 +0900134 let size = range.len();
Jiyong Park00ceff32023-03-13 05:43:23 +0000135 if size % GUEST_PAGE_SIZE != 0 {
136 error!("Memory size {:#x} is not a multiple of page size {:#x}", size, GUEST_PAGE_SIZE);
137 return Err(RebootReason::InvalidFdt);
138 }
Jiyong Park00ceff32023-03-13 05:43:23 +0000139
Jiyong Park6a8789a2023-03-21 14:50:59 +0900140 if size == 0 {
141 error!("Memory size is 0");
142 return Err(RebootReason::InvalidFdt);
143 }
144 Ok(())
Jiyong Park00ceff32023-03-13 05:43:23 +0000145}
146
Jiyong Park9c63cd12023-03-21 17:53:07 +0900147fn patch_memory_range(fdt: &mut Fdt, memory_range: &Range<usize>) -> libfdt::Result<()> {
148 let size = memory_range.len() as u64;
Jiyong Park0ee65392023-03-27 20:52:45 +0900149 fdt.node_mut(cstr!("/memory"))?
150 .ok_or(FdtError::NotFound)?
Alice Wange243d462023-06-06 15:18:12 +0000151 .setprop_inplace(cstr!("reg"), flatten(&[MEM_START.to_be_bytes(), size.to_be_bytes()]))
Jiyong Park9c63cd12023-03-21 17:53:07 +0900152}
153
Jiyong Park6a8789a2023-03-21 14:50:59 +0900154/// Read the number of CPUs from DT
155fn read_num_cpus_from(fdt: &Fdt) -> libfdt::Result<usize> {
156 Ok(fdt.compatible_nodes(cstr!("arm,arm-v8"))?.count())
157}
158
159/// Validate number of CPUs
Alice Wangabc7d632023-06-14 09:10:14 +0000160fn validate_num_cpus(num_cpus: usize) -> Result<(), FdtValidationError> {
161 if num_cpus == 0 || DeviceTreeInfo::gic_patched_size(num_cpus).is_none() {
162 Err(FdtValidationError::InvalidCpuCount(num_cpus))
163 } else {
164 Ok(())
Jiyong Park6a8789a2023-03-21 14:50:59 +0900165 }
Jiyong Park9c63cd12023-03-21 17:53:07 +0900166}
167
168/// Patch DT by keeping `num_cpus` number of arm,arm-v8 compatible nodes, and pruning the rest.
169fn patch_num_cpus(fdt: &mut Fdt, num_cpus: usize) -> libfdt::Result<()> {
170 let cpu = cstr!("arm,arm-v8");
171 let mut next = fdt.root_mut()?.next_compatible(cpu)?;
172 for _ in 0..num_cpus {
173 next = if let Some(current) = next {
174 current.next_compatible(cpu)?
175 } else {
176 return Err(FdtError::NoSpace);
177 };
178 }
179 while let Some(current) = next {
180 next = current.delete_and_next_compatible(cpu)?;
181 }
Jiyong Park6a8789a2023-03-21 14:50:59 +0900182 Ok(())
Jiyong Park00ceff32023-03-13 05:43:23 +0000183}
184
185#[derive(Debug)]
Jiyong Park00ceff32023-03-13 05:43:23 +0000186struct PciInfo {
Jiyong Park6a8789a2023-03-21 14:50:59 +0900187 ranges: [PciAddrRange; 2],
188 irq_masks: ArrayVec<[PciIrqMask; PciInfo::MAX_IRQS]>,
189 irq_maps: ArrayVec<[PciIrqMap; PciInfo::MAX_IRQS]>,
Jiyong Park00ceff32023-03-13 05:43:23 +0000190}
191
Jiyong Park6a8789a2023-03-21 14:50:59 +0900192impl PciInfo {
193 const IRQ_MASK_CELLS: usize = 4;
194 const IRQ_MAP_CELLS: usize = 10;
195 const MAX_IRQS: usize = 8;
Jiyong Park00ceff32023-03-13 05:43:23 +0000196}
197
Jiyong Park6a8789a2023-03-21 14:50:59 +0900198type PciAddrRange = AddressRange<(u32, u64), u64, u64>;
199type PciIrqMask = [u32; PciInfo::IRQ_MASK_CELLS];
200type PciIrqMap = [u32; PciInfo::IRQ_MAP_CELLS];
Jiyong Park00ceff32023-03-13 05:43:23 +0000201
202/// Iterator that takes N cells as a chunk
203struct CellChunkIterator<'a, const N: usize> {
204 cells: CellIterator<'a>,
205}
206
207impl<'a, const N: usize> CellChunkIterator<'a, N> {
208 fn new(cells: CellIterator<'a>) -> Self {
209 Self { cells }
210 }
211}
212
213impl<'a, const N: usize> Iterator for CellChunkIterator<'a, N> {
214 type Item = [u32; N];
215 fn next(&mut self) -> Option<Self::Item> {
216 let mut ret: Self::Item = [0; N];
217 for i in ret.iter_mut() {
218 *i = self.cells.next()?;
219 }
220 Some(ret)
221 }
222}
223
Jiyong Park6a8789a2023-03-21 14:50:59 +0900224/// Read pci host controller ranges, irq maps, and irq map masks from DT
225fn read_pci_info_from(fdt: &Fdt) -> libfdt::Result<PciInfo> {
226 let node =
227 fdt.compatible_nodes(cstr!("pci-host-cam-generic"))?.next().ok_or(FdtError::NotFound)?;
228
229 let mut ranges = node.ranges::<(u32, u64), u64, u64>()?.ok_or(FdtError::NotFound)?;
230 let range0 = ranges.next().ok_or(FdtError::NotFound)?;
231 let range1 = ranges.next().ok_or(FdtError::NotFound)?;
232
233 let irq_masks = node.getprop_cells(cstr!("interrupt-map-mask"))?.ok_or(FdtError::NotFound)?;
234 let irq_masks = CellChunkIterator::<{ PciInfo::IRQ_MASK_CELLS }>::new(irq_masks);
235 let irq_masks: ArrayVec<[PciIrqMask; PciInfo::MAX_IRQS]> =
236 irq_masks.take(PciInfo::MAX_IRQS).collect();
237
238 let irq_maps = node.getprop_cells(cstr!("interrupt-map"))?.ok_or(FdtError::NotFound)?;
239 let irq_maps = CellChunkIterator::<{ PciInfo::IRQ_MAP_CELLS }>::new(irq_maps);
240 let irq_maps: ArrayVec<[PciIrqMap; PciInfo::MAX_IRQS]> =
241 irq_maps.take(PciInfo::MAX_IRQS).collect();
242
243 Ok(PciInfo { ranges: [range0, range1], irq_masks, irq_maps })
244}
245
Jiyong Park0ee65392023-03-27 20:52:45 +0900246fn validate_pci_info(pci_info: &PciInfo, memory_range: &Range<usize>) -> Result<(), RebootReason> {
Jiyong Park6a8789a2023-03-21 14:50:59 +0900247 for range in pci_info.ranges.iter() {
Jiyong Park0ee65392023-03-27 20:52:45 +0900248 validate_pci_addr_range(range, memory_range)?;
Jiyong Park6a8789a2023-03-21 14:50:59 +0900249 }
250 for irq_mask in pci_info.irq_masks.iter() {
251 validate_pci_irq_mask(irq_mask)?;
252 }
253 for (idx, irq_map) in pci_info.irq_maps.iter().enumerate() {
254 validate_pci_irq_map(irq_map, idx)?;
255 }
256 Ok(())
257}
258
Jiyong Park0ee65392023-03-27 20:52:45 +0900259fn validate_pci_addr_range(
260 range: &PciAddrRange,
261 memory_range: &Range<usize>,
262) -> Result<(), RebootReason> {
Jiyong Park6a8789a2023-03-21 14:50:59 +0900263 let mem_flags = PciMemoryFlags(range.addr.0);
264 let range_type = mem_flags.range_type();
265 let prefetchable = mem_flags.prefetchable();
266 let bus_addr = range.addr.1;
267 let cpu_addr = range.parent_addr;
268 let size = range.size;
269
270 if range_type != PciRangeType::Memory64 {
271 error!("Invalid range type {:?} for bus address {:#x} in PCI node", range_type, bus_addr);
272 return Err(RebootReason::InvalidFdt);
273 }
274 if prefetchable {
275 error!("PCI bus address {:#x} in PCI node is prefetchable", bus_addr);
276 return Err(RebootReason::InvalidFdt);
277 }
278 // Enforce ID bus-to-cpu mappings, as used by crosvm.
279 if bus_addr != cpu_addr {
280 error!("PCI bus address: {:#x} is different from CPU address: {:#x}", bus_addr, cpu_addr);
281 return Err(RebootReason::InvalidFdt);
282 }
283
Jiyong Park0ee65392023-03-27 20:52:45 +0900284 let Some(bus_end) = bus_addr.checked_add(size) else {
285 error!("PCI address range size {:#x} overflows", size);
286 return Err(RebootReason::InvalidFdt);
287 };
Alice Wang63f4c9e2023-06-12 09:36:43 +0000288 if bus_end > MAX_VIRT_ADDR.try_into().unwrap() {
Jiyong Park0ee65392023-03-27 20:52:45 +0900289 error!("PCI address end {:#x} is outside of translatable range", bus_end);
290 return Err(RebootReason::InvalidFdt);
291 }
292
293 let memory_start = memory_range.start.try_into().unwrap();
294 let memory_end = memory_range.end.try_into().unwrap();
295
296 if max(bus_addr, memory_start) < min(bus_end, memory_end) {
297 error!(
298 "PCI address range {:#x}-{:#x} overlaps with main memory range {:#x}-{:#x}",
299 bus_addr, bus_end, memory_start, memory_end
300 );
Jiyong Park6a8789a2023-03-21 14:50:59 +0900301 return Err(RebootReason::InvalidFdt);
302 }
303
304 Ok(())
305}
306
307fn validate_pci_irq_mask(irq_mask: &PciIrqMask) -> Result<(), RebootReason> {
Jiyong Park00ceff32023-03-13 05:43:23 +0000308 const IRQ_MASK_ADDR_HI: u32 = 0xf800;
309 const IRQ_MASK_ADDR_ME: u32 = 0x0;
310 const IRQ_MASK_ADDR_LO: u32 = 0x0;
311 const IRQ_MASK_ANY_IRQ: u32 = 0x7;
Jiyong Park6a8789a2023-03-21 14:50:59 +0900312 const EXPECTED: PciIrqMask =
Jiyong Park00ceff32023-03-13 05:43:23 +0000313 [IRQ_MASK_ADDR_HI, IRQ_MASK_ADDR_ME, IRQ_MASK_ADDR_LO, IRQ_MASK_ANY_IRQ];
Jiyong Park6a8789a2023-03-21 14:50:59 +0900314 if *irq_mask != EXPECTED {
315 error!("Invalid PCI irq mask {:#?}", irq_mask);
316 return Err(RebootReason::InvalidFdt);
Jiyong Park00ceff32023-03-13 05:43:23 +0000317 }
Jiyong Park6a8789a2023-03-21 14:50:59 +0900318 Ok(())
Jiyong Park00ceff32023-03-13 05:43:23 +0000319}
320
Jiyong Park6a8789a2023-03-21 14:50:59 +0900321fn validate_pci_irq_map(irq_map: &PciIrqMap, idx: usize) -> Result<(), RebootReason> {
Jiyong Park00ceff32023-03-13 05:43:23 +0000322 const PCI_DEVICE_IDX: usize = 11;
323 const PCI_IRQ_ADDR_ME: u32 = 0;
324 const PCI_IRQ_ADDR_LO: u32 = 0;
325 const PCI_IRQ_INTC: u32 = 1;
326 const AARCH64_IRQ_BASE: u32 = 4; // from external/crosvm/aarch64/src/lib.rs
327 const GIC_SPI: u32 = 0;
328 const IRQ_TYPE_LEVEL_HIGH: u32 = 4;
329
Jiyong Park6a8789a2023-03-21 14:50:59 +0900330 let pci_addr = (irq_map[0], irq_map[1], irq_map[2]);
331 let pci_irq_number = irq_map[3];
332 let _controller_phandle = irq_map[4]; // skipped.
333 let gic_addr = (irq_map[5], irq_map[6]); // address-cells is <2> for GIC
334 // interrupt-cells is <3> for GIC
335 let gic_peripheral_interrupt_type = irq_map[7];
336 let gic_irq_number = irq_map[8];
337 let gic_irq_type = irq_map[9];
Jiyong Park00ceff32023-03-13 05:43:23 +0000338
Jiyong Park6a8789a2023-03-21 14:50:59 +0900339 let phys_hi: u32 = (0x1 << PCI_DEVICE_IDX) * (idx + 1) as u32;
340 let expected_pci_addr = (phys_hi, PCI_IRQ_ADDR_ME, PCI_IRQ_ADDR_LO);
Jiyong Park00ceff32023-03-13 05:43:23 +0000341
Jiyong Park6a8789a2023-03-21 14:50:59 +0900342 if pci_addr != expected_pci_addr {
343 error!("PCI device address {:#x} {:#x} {:#x} in interrupt-map is different from expected address \
344 {:#x} {:#x} {:#x}",
345 pci_addr.0, pci_addr.1, pci_addr.2, expected_pci_addr.0, expected_pci_addr.1, expected_pci_addr.2);
346 return Err(RebootReason::InvalidFdt);
347 }
Jiyong Park00ceff32023-03-13 05:43:23 +0000348
Jiyong Park6a8789a2023-03-21 14:50:59 +0900349 if pci_irq_number != PCI_IRQ_INTC {
350 error!(
351 "PCI INT# {:#x} in interrupt-map is different from expected value {:#x}",
352 pci_irq_number, PCI_IRQ_INTC
353 );
354 return Err(RebootReason::InvalidFdt);
355 }
Jiyong Park00ceff32023-03-13 05:43:23 +0000356
Jiyong Park6a8789a2023-03-21 14:50:59 +0900357 if gic_addr != (0, 0) {
358 error!(
359 "GIC address {:#x} {:#x} in interrupt-map is different from expected address \
360 {:#x} {:#x}",
361 gic_addr.0, gic_addr.1, 0, 0
362 );
363 return Err(RebootReason::InvalidFdt);
364 }
365
366 if gic_peripheral_interrupt_type != GIC_SPI {
367 error!("GIC peripheral interrupt type {:#x} in interrupt-map is different from expected value \
368 {:#x}", gic_peripheral_interrupt_type, GIC_SPI);
369 return Err(RebootReason::InvalidFdt);
370 }
371
372 let irq_nr: u32 = AARCH64_IRQ_BASE + (idx as u32);
373 if gic_irq_number != irq_nr {
374 error!(
375 "GIC irq number {:#x} in interrupt-map is unexpected. Expected {:#x}",
376 gic_irq_number, irq_nr
377 );
378 return Err(RebootReason::InvalidFdt);
379 }
380
381 if gic_irq_type != IRQ_TYPE_LEVEL_HIGH {
382 error!(
383 "IRQ type in {:#x} is invalid. Must be LEVEL_HIGH {:#x}",
384 gic_irq_type, IRQ_TYPE_LEVEL_HIGH
385 );
386 return Err(RebootReason::InvalidFdt);
Jiyong Park00ceff32023-03-13 05:43:23 +0000387 }
388 Ok(())
389}
390
Jiyong Park9c63cd12023-03-21 17:53:07 +0900391fn patch_pci_info(fdt: &mut Fdt, pci_info: &PciInfo) -> libfdt::Result<()> {
392 let mut node = fdt
393 .root_mut()?
394 .next_compatible(cstr!("pci-host-cam-generic"))?
395 .ok_or(FdtError::NotFound)?;
396
397 let irq_masks_size = pci_info.irq_masks.len() * size_of::<PciIrqMask>();
398 node.trimprop(cstr!("interrupt-map-mask"), irq_masks_size)?;
399
400 let irq_maps_size = pci_info.irq_maps.len() * size_of::<PciIrqMap>();
401 node.trimprop(cstr!("interrupt-map"), irq_maps_size)?;
402
403 node.setprop_inplace(
404 cstr!("ranges"),
405 flatten(&[pci_info.ranges[0].to_cells(), pci_info.ranges[1].to_cells()]),
406 )
407}
408
Jiyong Park00ceff32023-03-13 05:43:23 +0000409#[derive(Default, Debug)]
Jiyong Park6a8789a2023-03-21 14:50:59 +0900410struct SerialInfo {
411 addrs: ArrayVec<[u64; Self::MAX_SERIALS]>,
Jiyong Park00ceff32023-03-13 05:43:23 +0000412}
413
414impl SerialInfo {
Jiyong Park6a8789a2023-03-21 14:50:59 +0900415 const MAX_SERIALS: usize = 4;
Jiyong Park00ceff32023-03-13 05:43:23 +0000416}
417
Jiyong Park6a8789a2023-03-21 14:50:59 +0900418fn read_serial_info_from(fdt: &Fdt) -> libfdt::Result<SerialInfo> {
419 let mut addrs: ArrayVec<[u64; SerialInfo::MAX_SERIALS]> = Default::default();
420 for node in fdt.compatible_nodes(cstr!("ns16550a"))?.take(SerialInfo::MAX_SERIALS) {
421 let reg = node.reg()?.ok_or(FdtError::NotFound)?.next().ok_or(FdtError::NotFound)?;
422 addrs.push(reg.addr);
Jiyong Park00ceff32023-03-13 05:43:23 +0000423 }
Jiyong Park6a8789a2023-03-21 14:50:59 +0900424 Ok(SerialInfo { addrs })
Jiyong Park00ceff32023-03-13 05:43:23 +0000425}
426
Jiyong Park9c63cd12023-03-21 17:53:07 +0900427/// Patch the DT by deleting the ns16550a compatible nodes whose address are unknown
428fn patch_serial_info(fdt: &mut Fdt, serial_info: &SerialInfo) -> libfdt::Result<()> {
429 let name = cstr!("ns16550a");
430 let mut next = fdt.root_mut()?.next_compatible(name);
431 while let Some(current) = next? {
432 let reg = FdtNode::from_mut(&current)
433 .reg()?
434 .ok_or(FdtError::NotFound)?
435 .next()
436 .ok_or(FdtError::NotFound)?;
437 next = if !serial_info.addrs.contains(&reg.addr) {
438 current.delete_and_next_compatible(name)
439 } else {
440 current.next_compatible(name)
441 }
442 }
443 Ok(())
444}
445
Srivatsa Vaddagiri2df297f2023-04-12 03:11:05 -0700446fn validate_swiotlb_info(
447 swiotlb_info: &SwiotlbInfo,
448 memory: &Range<usize>,
449) -> Result<(), RebootReason> {
Jiyong Park6a8789a2023-03-21 14:50:59 +0900450 let size = swiotlb_info.size;
451 let align = swiotlb_info.align;
Jiyong Park00ceff32023-03-13 05:43:23 +0000452
Srivatsa Vaddagiri2df297f2023-04-12 03:11:05 -0700453 if size == 0 || (size % GUEST_PAGE_SIZE) != 0 {
Jiyong Park00ceff32023-03-13 05:43:23 +0000454 error!("Invalid swiotlb size {:#x}", size);
455 return Err(RebootReason::InvalidFdt);
456 }
457
Pierre-Clément Tosibe3a97b2023-05-19 14:56:23 +0000458 if let Some(align) = align.filter(|&a| a % GUEST_PAGE_SIZE != 0) {
Jiyong Park00ceff32023-03-13 05:43:23 +0000459 error!("Invalid swiotlb alignment {:#x}", align);
460 return Err(RebootReason::InvalidFdt);
461 }
Srivatsa Vaddagiri2df297f2023-04-12 03:11:05 -0700462
Alice Wang9cfbfd62023-06-14 11:19:03 +0000463 if let Some(addr) = swiotlb_info.addr {
464 if addr.checked_add(size).is_none() {
465 error!("Invalid swiotlb range: addr:{addr:#x} size:{size:#x}");
466 return Err(RebootReason::InvalidFdt);
467 }
468 }
Srivatsa Vaddagiri2df297f2023-04-12 03:11:05 -0700469 if let Some(range) = swiotlb_info.fixed_range() {
470 if !range.is_within(memory) {
471 error!("swiotlb range {range:#x?} not part of memory range {memory:#x?}");
472 return Err(RebootReason::InvalidFdt);
473 }
474 }
475
Jiyong Park6a8789a2023-03-21 14:50:59 +0900476 Ok(())
Jiyong Park00ceff32023-03-13 05:43:23 +0000477}
478
Jiyong Park9c63cd12023-03-21 17:53:07 +0900479fn patch_swiotlb_info(fdt: &mut Fdt, swiotlb_info: &SwiotlbInfo) -> libfdt::Result<()> {
480 let mut node =
481 fdt.root_mut()?.next_compatible(cstr!("restricted-dma-pool"))?.ok_or(FdtError::NotFound)?;
Srivatsa Vaddagiri2df297f2023-04-12 03:11:05 -0700482
483 if let Some(range) = swiotlb_info.fixed_range() {
Pierre-Clément Tosic27c4272023-05-19 15:46:26 +0000484 node.setprop_addrrange_inplace(
Srivatsa Vaddagiri2df297f2023-04-12 03:11:05 -0700485 cstr!("reg"),
486 range.start.try_into().unwrap(),
487 range.len().try_into().unwrap(),
488 )?;
Pierre-Clément Tosibe3a97b2023-05-19 14:56:23 +0000489 node.nop_property(cstr!("size"))?;
490 node.nop_property(cstr!("alignment"))?;
Srivatsa Vaddagiri2df297f2023-04-12 03:11:05 -0700491 } else {
Pierre-Clément Tosic27c4272023-05-19 15:46:26 +0000492 node.nop_property(cstr!("reg"))?;
Srivatsa Vaddagiri2df297f2023-04-12 03:11:05 -0700493 node.setprop_inplace(cstr!("size"), &swiotlb_info.size.to_be_bytes())?;
Pierre-Clément Tosibe3a97b2023-05-19 14:56:23 +0000494 node.setprop_inplace(cstr!("alignment"), &swiotlb_info.align.unwrap().to_be_bytes())?;
Srivatsa Vaddagiri2df297f2023-04-12 03:11:05 -0700495 }
496
Jiyong Park9c63cd12023-03-21 17:53:07 +0900497 Ok(())
498}
499
500fn patch_gic(fdt: &mut Fdt, num_cpus: usize) -> libfdt::Result<()> {
501 let node = fdt.compatible_nodes(cstr!("arm,gic-v3"))?.next().ok_or(FdtError::NotFound)?;
502 let mut ranges = node.reg()?.ok_or(FdtError::NotFound)?;
503 let range0 = ranges.next().ok_or(FdtError::NotFound)?;
504 let mut range1 = ranges.next().ok_or(FdtError::NotFound)?;
505
506 let addr = range0.addr;
Alice Wangabc7d632023-06-14 09:10:14 +0000507 // `validate_num_cpus()` checked that this wouldn't panic
508 let size = u64::try_from(DeviceTreeInfo::gic_patched_size(num_cpus).unwrap()).unwrap();
Jiyong Park9c63cd12023-03-21 17:53:07 +0900509
510 // range1 is just below range0
511 range1.addr = addr - size;
512 range1.size = Some(size);
513
514 let range0 = range0.to_cells();
515 let range1 = range1.to_cells();
516 let value = [
517 range0.0, // addr
518 range0.1.unwrap(), //size
519 range1.0, // addr
520 range1.1.unwrap(), //size
521 ];
522
523 let mut node =
524 fdt.root_mut()?.next_compatible(cstr!("arm,gic-v3"))?.ok_or(FdtError::NotFound)?;
525 node.setprop_inplace(cstr!("reg"), flatten(&value))
526}
527
528fn patch_timer(fdt: &mut Fdt, num_cpus: usize) -> libfdt::Result<()> {
529 const NUM_INTERRUPTS: usize = 4;
530 const CELLS_PER_INTERRUPT: usize = 3;
531 let node = fdt.compatible_nodes(cstr!("arm,armv8-timer"))?.next().ok_or(FdtError::NotFound)?;
532 let interrupts = node.getprop_cells(cstr!("interrupts"))?.ok_or(FdtError::NotFound)?;
533 let mut value: ArrayVec<[u32; NUM_INTERRUPTS * CELLS_PER_INTERRUPT]> =
534 interrupts.take(NUM_INTERRUPTS * CELLS_PER_INTERRUPT).collect();
535
536 let num_cpus: u32 = num_cpus.try_into().unwrap();
537 let cpu_mask: u32 = (((0x1 << num_cpus) - 1) & 0xff) << 8;
538 for v in value.iter_mut().skip(2).step_by(CELLS_PER_INTERRUPT) {
539 *v |= cpu_mask;
540 }
541 for v in value.iter_mut() {
542 *v = v.to_be();
543 }
544
545 // SAFETY - array size is the same
546 let value = unsafe {
547 core::mem::transmute::<
548 [u32; NUM_INTERRUPTS * CELLS_PER_INTERRUPT],
549 [u8; NUM_INTERRUPTS * CELLS_PER_INTERRUPT * size_of::<u32>()],
550 >(value.into_inner())
551 };
552
553 let mut node =
554 fdt.root_mut()?.next_compatible(cstr!("arm,armv8-timer"))?.ok_or(FdtError::NotFound)?;
555 node.setprop_inplace(cstr!("interrupts"), value.as_slice())
556}
557
Jiyong Park00ceff32023-03-13 05:43:23 +0000558#[derive(Debug)]
Jiyong Park6a8789a2023-03-21 14:50:59 +0900559pub struct DeviceTreeInfo {
560 pub kernel_range: Option<Range<usize>>,
561 pub initrd_range: Option<Range<usize>>,
562 pub memory_range: Range<usize>,
Jiyong Parke9d87e82023-03-21 19:28:40 +0900563 bootargs: Option<CString>,
Jiyong Park6a8789a2023-03-21 14:50:59 +0900564 num_cpus: usize,
Jiyong Park00ceff32023-03-13 05:43:23 +0000565 pci_info: PciInfo,
566 serial_info: SerialInfo,
Srivatsa Vaddagiri37713ec2023-04-20 04:04:08 -0700567 pub swiotlb_info: SwiotlbInfo,
Jiyong Park00ceff32023-03-13 05:43:23 +0000568}
569
570impl DeviceTreeInfo {
Alice Wangabc7d632023-06-14 09:10:14 +0000571 fn gic_patched_size(num_cpus: usize) -> Option<usize> {
572 const GIC_REDIST_SIZE_PER_CPU: usize = 32 * SIZE_4KB;
573
574 GIC_REDIST_SIZE_PER_CPU.checked_mul(num_cpus)
575 }
Jiyong Park00ceff32023-03-13 05:43:23 +0000576}
577
Jiyong Park9c63cd12023-03-21 17:53:07 +0900578pub fn sanitize_device_tree(fdt: &mut Fdt) -> Result<DeviceTreeInfo, RebootReason> {
Jiyong Park83316122023-03-21 09:39:39 +0900579 let info = parse_device_tree(fdt)?;
580 debug!("Device tree info: {:?}", info);
581
Jiyong Parke9d87e82023-03-21 19:28:40 +0900582 fdt.copy_from_slice(pvmfw_fdt_template::RAW).map_err(|e| {
583 error!("Failed to instantiate FDT from the template DT: {e}");
584 RebootReason::InvalidFdt
585 })?;
586
Jiyong Park9c63cd12023-03-21 17:53:07 +0900587 patch_device_tree(fdt, &info)?;
Jiyong Park6a8789a2023-03-21 14:50:59 +0900588 Ok(info)
Jiyong Park83316122023-03-21 09:39:39 +0900589}
590
591fn parse_device_tree(fdt: &libfdt::Fdt) -> Result<DeviceTreeInfo, RebootReason> {
Jiyong Park6a8789a2023-03-21 14:50:59 +0900592 let kernel_range = read_kernel_range_from(fdt).map_err(|e| {
593 error!("Failed to read kernel range from DT: {e}");
594 RebootReason::InvalidFdt
595 })?;
596
597 let initrd_range = read_initrd_range_from(fdt).map_err(|e| {
598 error!("Failed to read initrd range from DT: {e}");
599 RebootReason::InvalidFdt
600 })?;
601
Alice Wang2422bdc2023-06-12 08:37:55 +0000602 let memory_range = fdt.first_memory_range().map_err(|e| {
Jiyong Park6a8789a2023-03-21 14:50:59 +0900603 error!("Failed to read memory range from DT: {e}");
604 RebootReason::InvalidFdt
605 })?;
606 validate_memory_range(&memory_range)?;
607
Jiyong Parke9d87e82023-03-21 19:28:40 +0900608 let bootargs = read_bootargs_from(fdt).map_err(|e| {
609 error!("Failed to read bootargs from DT: {e}");
610 RebootReason::InvalidFdt
611 })?;
612
Jiyong Park6a8789a2023-03-21 14:50:59 +0900613 let num_cpus = read_num_cpus_from(fdt).map_err(|e| {
614 error!("Failed to read num cpus from DT: {e}");
615 RebootReason::InvalidFdt
616 })?;
Alice Wangabc7d632023-06-14 09:10:14 +0000617 validate_num_cpus(num_cpus).map_err(|e| {
618 error!("Failed to validate num cpus from DT: {e}");
619 RebootReason::InvalidFdt
620 })?;
Jiyong Park6a8789a2023-03-21 14:50:59 +0900621
622 let pci_info = read_pci_info_from(fdt).map_err(|e| {
623 error!("Failed to read pci info from DT: {e}");
624 RebootReason::InvalidFdt
625 })?;
Jiyong Park0ee65392023-03-27 20:52:45 +0900626 validate_pci_info(&pci_info, &memory_range)?;
Jiyong Park6a8789a2023-03-21 14:50:59 +0900627
628 let serial_info = read_serial_info_from(fdt).map_err(|e| {
629 error!("Failed to read serial info from DT: {e}");
630 RebootReason::InvalidFdt
631 })?;
632
Alice Wang9cfbfd62023-06-14 11:19:03 +0000633 let swiotlb_info = SwiotlbInfo::new_from_fdt(fdt).map_err(|e| {
Jiyong Park6a8789a2023-03-21 14:50:59 +0900634 error!("Failed to read swiotlb info from DT: {e}");
635 RebootReason::InvalidFdt
636 })?;
Srivatsa Vaddagiri2df297f2023-04-12 03:11:05 -0700637 validate_swiotlb_info(&swiotlb_info, &memory_range)?;
Jiyong Park6a8789a2023-03-21 14:50:59 +0900638
Jiyong Park00ceff32023-03-13 05:43:23 +0000639 Ok(DeviceTreeInfo {
Jiyong Park6a8789a2023-03-21 14:50:59 +0900640 kernel_range,
641 initrd_range,
642 memory_range,
Jiyong Parke9d87e82023-03-21 19:28:40 +0900643 bootargs,
Jiyong Park6a8789a2023-03-21 14:50:59 +0900644 num_cpus,
645 pci_info,
646 serial_info,
647 swiotlb_info,
Jiyong Park00ceff32023-03-13 05:43:23 +0000648 })
649}
650
Jiyong Park9c63cd12023-03-21 17:53:07 +0900651fn patch_device_tree(fdt: &mut Fdt, info: &DeviceTreeInfo) -> Result<(), RebootReason> {
Jiyong Parke9d87e82023-03-21 19:28:40 +0900652 fdt.unpack().map_err(|e| {
653 error!("Failed to unpack DT for patching: {e}");
654 RebootReason::InvalidFdt
655 })?;
656
Jiyong Park9c63cd12023-03-21 17:53:07 +0900657 if let Some(initrd_range) = &info.initrd_range {
658 patch_initrd_range(fdt, initrd_range).map_err(|e| {
659 error!("Failed to patch initrd range to DT: {e}");
660 RebootReason::InvalidFdt
661 })?;
662 }
663 patch_memory_range(fdt, &info.memory_range).map_err(|e| {
664 error!("Failed to patch memory range to DT: {e}");
665 RebootReason::InvalidFdt
666 })?;
Jiyong Parke9d87e82023-03-21 19:28:40 +0900667 if let Some(bootargs) = &info.bootargs {
668 patch_bootargs(fdt, bootargs.as_c_str()).map_err(|e| {
669 error!("Failed to patch bootargs to DT: {e}");
670 RebootReason::InvalidFdt
671 })?;
672 }
Jiyong Park9c63cd12023-03-21 17:53:07 +0900673 patch_num_cpus(fdt, info.num_cpus).map_err(|e| {
674 error!("Failed to patch cpus to DT: {e}");
675 RebootReason::InvalidFdt
676 })?;
677 patch_pci_info(fdt, &info.pci_info).map_err(|e| {
678 error!("Failed to patch pci info to DT: {e}");
679 RebootReason::InvalidFdt
680 })?;
681 patch_serial_info(fdt, &info.serial_info).map_err(|e| {
682 error!("Failed to patch serial info to DT: {e}");
683 RebootReason::InvalidFdt
684 })?;
685 patch_swiotlb_info(fdt, &info.swiotlb_info).map_err(|e| {
686 error!("Failed to patch swiotlb info to DT: {e}");
687 RebootReason::InvalidFdt
688 })?;
689 patch_gic(fdt, info.num_cpus).map_err(|e| {
690 error!("Failed to patch gic info to DT: {e}");
691 RebootReason::InvalidFdt
692 })?;
693 patch_timer(fdt, info.num_cpus).map_err(|e| {
694 error!("Failed to patch timer info to DT: {e}");
695 RebootReason::InvalidFdt
696 })?;
Jiyong Parke9d87e82023-03-21 19:28:40 +0900697
698 fdt.pack().map_err(|e| {
699 error!("Failed to pack DT after patching: {e}");
700 RebootReason::InvalidFdt
701 })?;
702
Jiyong Park9c63cd12023-03-21 17:53:07 +0900703 Ok(())
704}
705
Pierre-Clément Tosi4ba79662023-02-13 11:22:41 +0000706/// Modifies the input DT according to the fields of the configuration.
707pub fn modify_for_next_stage(
708 fdt: &mut Fdt,
709 bcc: &[u8],
710 new_instance: bool,
711 strict_boot: bool,
Jiyong Parkc23426b2023-04-10 17:32:27 +0900712 debug_policy: Option<&mut [u8]>,
Jiyong Parkc5d2ef22023-04-11 01:23:46 +0900713 debuggable: bool,
Pierre-Clément Tosi4ba79662023-02-13 11:22:41 +0000714) -> libfdt::Result<()> {
Pierre-Clément Tosieb887ac2023-05-02 13:33:37 +0000715 if let Some(debug_policy) = debug_policy {
716 let backup = Vec::from(fdt.as_slice());
717 fdt.unpack()?;
718 let backup_fdt = Fdt::from_slice(backup.as_slice()).unwrap();
719 if apply_debug_policy(fdt, backup_fdt, debug_policy)? {
720 info!("Debug policy applied.");
721 } else {
722 // apply_debug_policy restored fdt to backup_fdt so unpack it again.
723 fdt.unpack()?;
724 }
725 } else {
726 info!("No debug policy found.");
727 fdt.unpack()?;
728 }
Pierre-Clément Tosidb74cb12022-12-08 13:56:25 +0000729
Jiyong Parke9d87e82023-03-21 19:28:40 +0900730 patch_dice_node(fdt, bcc.as_ptr() as usize, bcc.len())?;
Pierre-Clément Tosi4ba79662023-02-13 11:22:41 +0000731
Jiyong Parkb87f3302023-03-21 10:03:11 +0900732 set_or_clear_chosen_flag(fdt, cstr!("avf,strict-boot"), strict_boot)?;
733 set_or_clear_chosen_flag(fdt, cstr!("avf,new-instance"), new_instance)?;
Pierre-Clément Tosi4ba79662023-02-13 11:22:41 +0000734
Jiyong Park32f37ef2023-05-17 16:15:58 +0900735 if !debuggable {
Jiyong Parkc5d2ef22023-04-11 01:23:46 +0900736 if let Some(bootargs) = read_bootargs_from(fdt)? {
737 filter_out_dangerous_bootargs(fdt, &bootargs)?;
738 }
739 }
740
Pierre-Clément Tosi4ba79662023-02-13 11:22:41 +0000741 fdt.pack()?;
742
743 Ok(())
744}
745
Jiyong Parke9d87e82023-03-21 19:28:40 +0900746/// Patch the "google,open-dice"-compatible reserved-memory node to point to the bcc range
747fn patch_dice_node(fdt: &mut Fdt, addr: usize, size: usize) -> libfdt::Result<()> {
Pierre-Clément Tosidb74cb12022-12-08 13:56:25 +0000748 // We reject DTs with missing reserved-memory node as validation should have checked that the
749 // "swiotlb" subnode (compatible = "restricted-dma-pool") was present.
Jiyong Parke9d87e82023-03-21 19:28:40 +0900750 let node = fdt.node_mut(cstr!("/reserved-memory"))?.ok_or(libfdt::FdtError::NotFound)?;
Pierre-Clément Tosidb74cb12022-12-08 13:56:25 +0000751
Jiyong Parke9d87e82023-03-21 19:28:40 +0900752 let mut node = node.next_compatible(cstr!("google,open-dice"))?.ok_or(FdtError::NotFound)?;
Pierre-Clément Tosidb74cb12022-12-08 13:56:25 +0000753
Jiyong Parke9d87e82023-03-21 19:28:40 +0900754 let addr: u64 = addr.try_into().unwrap();
755 let size: u64 = size.try_into().unwrap();
756 node.setprop_inplace(cstr!("reg"), flatten(&[addr.to_be_bytes(), size.to_be_bytes()]))
Pierre-Clément Tosi4ba79662023-02-13 11:22:41 +0000757}
758
759fn set_or_clear_chosen_flag(fdt: &mut Fdt, flag: &CStr, value: bool) -> libfdt::Result<()> {
760 // TODO(b/249054080): Refactor to not panic if the DT doesn't contain a /chosen node.
761 let mut chosen = fdt.chosen_mut()?.unwrap();
762 if value {
763 chosen.setprop_empty(flag)?;
764 } else {
765 match chosen.delprop(flag) {
766 Ok(()) | Err(FdtError::NotFound) => (),
767 Err(e) => return Err(e),
768 }
769 }
Pierre-Clément Tosidb74cb12022-12-08 13:56:25 +0000770
771 Ok(())
772}
Jiyong Parkc23426b2023-04-10 17:32:27 +0900773
Pierre-Clément Tosia50167b2023-05-02 13:19:29 +0000774/// Apply the debug policy overlay to the guest DT.
775///
776/// Returns Ok(true) on success, Ok(false) on recovered failure and Err(_) on corruption of the DT.
Pierre-Clément Tosieb887ac2023-05-02 13:33:37 +0000777fn apply_debug_policy(
778 fdt: &mut Fdt,
779 backup_fdt: &Fdt,
780 debug_policy: &[u8],
781) -> libfdt::Result<bool> {
Pierre-Clément Tosia50167b2023-05-02 13:19:29 +0000782 let mut debug_policy = Vec::from(debug_policy);
783 let overlay = match Fdt::from_mut_slice(debug_policy.as_mut_slice()) {
Jiyong Parkc23426b2023-04-10 17:32:27 +0900784 Ok(overlay) => overlay,
785 Err(e) => {
Pierre-Clément Tosia50167b2023-05-02 13:19:29 +0000786 warn!("Corrupted debug policy found: {e}. Not applying.");
787 return Ok(false);
Jiyong Parkc23426b2023-04-10 17:32:27 +0900788 }
789 };
Jiyong Parkc23426b2023-04-10 17:32:27 +0900790
Pierre-Clément Tosia50167b2023-05-02 13:19:29 +0000791 // SAFETY - on failure, the corrupted DT is restored using the backup.
Jiyong Parkc23426b2023-04-10 17:32:27 +0900792 if let Err(e) = unsafe { fdt.apply_overlay(overlay) } {
Pierre-Clément Tosia50167b2023-05-02 13:19:29 +0000793 warn!("Failed to apply debug policy: {e}. Recovering...");
Jiyong Parkc23426b2023-04-10 17:32:27 +0900794 fdt.copy_from_slice(backup_fdt.as_slice())?;
Jiyong Parkc23426b2023-04-10 17:32:27 +0900795 // A successful restoration is considered success because an invalid debug policy
796 // shouldn't DOS the pvmfw
Pierre-Clément Tosia50167b2023-05-02 13:19:29 +0000797 Ok(false)
798 } else {
799 Ok(true)
Jiyong Parkc23426b2023-04-10 17:32:27 +0900800 }
Jiyong Parkc23426b2023-04-10 17:32:27 +0900801}
Jiyong Parkc5d2ef22023-04-11 01:23:46 +0900802
803fn read_common_debug_policy(fdt: &Fdt, debug_feature_name: &CStr) -> libfdt::Result<bool> {
804 if let Some(node) = fdt.node(cstr!("/avf/guest/common"))? {
805 if let Some(value) = node.getprop_u32(debug_feature_name)? {
806 return Ok(value == 1);
807 }
808 }
809 Ok(false) // if the policy doesn't exist or not 1, don't enable the debug feature
810}
811
812fn filter_out_dangerous_bootargs(fdt: &mut Fdt, bootargs: &CStr) -> libfdt::Result<()> {
813 let has_crashkernel = read_common_debug_policy(fdt, cstr!("ramdump"))?;
814 let has_console = read_common_debug_policy(fdt, cstr!("log"))?;
815
816 let accepted: &[(&str, Box<dyn Fn(Option<&str>) -> bool>)] = &[
817 ("panic", Box::new(|v| if let Some(v) = v { v == "=-1" } else { false })),
818 ("crashkernel", Box::new(|_| has_crashkernel)),
819 ("console", Box::new(|_| has_console)),
820 ];
821
822 // parse and filter out unwanted
823 let mut filtered = Vec::new();
824 for arg in BootArgsIterator::new(bootargs).map_err(|e| {
825 info!("Invalid bootarg: {e}");
826 FdtError::BadValue
827 })? {
828 match accepted.iter().find(|&t| t.0 == arg.name()) {
829 Some((_, pred)) if pred(arg.value()) => filtered.push(arg),
830 _ => debug!("Rejected bootarg {}", arg.as_ref()),
831 }
832 }
833
834 // flatten into a new C-string
835 let mut new_bootargs = Vec::new();
836 for (i, arg) in filtered.iter().enumerate() {
837 if i != 0 {
838 new_bootargs.push(b' '); // separator
839 }
840 new_bootargs.extend_from_slice(arg.as_ref().as_bytes());
841 }
842 new_bootargs.push(b'\0');
843
844 let mut node = fdt.chosen_mut()?.ok_or(FdtError::NotFound)?;
845 node.setprop(cstr!("bootargs"), new_bootargs.as_slice())
846}