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Alice Wangf47b2342023-06-02 11:51:57 +00001// Copyright 2023, The Android Open Source Project
2//
3// Licensed under the Apache License, Version 2.0 (the "License");
4// you may not use this file except in compliance with the License.
5// You may obtain a copy of the License at
6//
7// http://www.apache.org/licenses/LICENSE-2.0
8//
9// Unless required by applicable law or agreed to in writing, software
10// distributed under the License is distributed on an "AS IS" BASIS,
11// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
12// See the License for the specific language governing permissions and
13// limitations under the License.
14
15//! Utility functions for memory management.
16
Alice Wang3fa9b802023-06-06 07:52:31 +000017use crate::read_sysreg;
Alice Wangeacb7382023-06-05 12:53:54 +000018use crate::util::unchecked_align_down;
Alice Wang3fa9b802023-06-06 07:52:31 +000019use core::arch::asm;
Alice Wangf47b2342023-06-02 11:51:57 +000020use core::ptr::NonNull;
Alice Wang3fa9b802023-06-06 07:52:31 +000021use zeroize::Zeroize;
Alice Wangf47b2342023-06-02 11:51:57 +000022
Alice Wangeacb7382023-06-05 12:53:54 +000023/// The size of a 4KB memory in bytes.
24pub const SIZE_4KB: usize = 4 << 10;
25/// The size of a 2MB memory in bytes.
26pub const SIZE_2MB: usize = 2 << 20;
27/// The size of a 4MB memory in bytes.
28pub const SIZE_4MB: usize = 4 << 20;
29
Alice Wang3fa9b802023-06-06 07:52:31 +000030/// Reads the number of words in the smallest cache line of all the data caches and unified caches.
31#[inline]
32pub fn min_dcache_line_size() -> usize {
33 const DMINLINE_SHIFT: usize = 16;
34 const DMINLINE_MASK: usize = 0xf;
35 let ctr_el0 = read_sysreg!("ctr_el0");
36
37 // DminLine: log2 of the number of words in the smallest cache line of all the data caches.
38 let dminline = (ctr_el0 >> DMINLINE_SHIFT) & DMINLINE_MASK;
39
40 1 << dminline
41}
42
43/// Flush `size` bytes of data cache by virtual address.
44#[inline]
45pub(super) fn flush_region(start: usize, size: usize) {
46 let line_size = min_dcache_line_size();
47 let end = start + size;
48 let start = unchecked_align_down(start, line_size);
49
50 for line in (start..end).step_by(line_size) {
51 // SAFETY - Clearing cache lines shouldn't have Rust-visible side effects.
52 unsafe {
53 asm!(
54 "dc cvau, {x}",
55 x = in(reg) line,
56 options(nomem, nostack, preserves_flags),
57 )
58 }
59 }
60}
61
62/// Flushes the slice to the point of unification.
63#[inline]
64pub fn flush(reg: &[u8]) {
65 flush_region(reg.as_ptr() as usize, reg.len())
66}
67
68/// Overwrites the slice with zeroes, to the point of unification.
69#[inline]
70pub fn flushed_zeroize(reg: &mut [u8]) {
71 reg.zeroize();
72 flush(reg)
73}
74
Alice Wangeacb7382023-06-05 12:53:54 +000075/// Computes the address of the 4KiB page containing a given address.
76pub const fn page_4kb_of(addr: usize) -> usize {
77 unchecked_align_down(addr, SIZE_4KB)
78}
79
Alice Wangf47b2342023-06-02 11:51:57 +000080/// Returns the intermediate physical address corresponding to the given virtual address.
81///
82/// As we use identity mapping for everything, this is just a cast, but it's useful to use it to be
83/// explicit about where we are converting from virtual to physical address.
84pub fn virt_to_phys(vaddr: NonNull<u8>) -> usize {
85 vaddr.as_ptr() as _
86}
87
88/// Returns a pointer for the virtual address corresponding to the given non-zero intermediate
89/// physical address.
90///
91/// Panics if `paddr` is 0.
92pub fn phys_to_virt(paddr: usize) -> NonNull<u8> {
93 NonNull::new(paddr as _).unwrap()
94}