| DRC | 246c3d9 | 2009-06-25 20:38:31 +0000 | [diff] [blame] | 1 | ; |
| 2 | ; jsimdcpu.asm - SIMD instruction support check |
| 3 | ; |
| 4 | ; Copyright 2009 Pierre Ossman <ossman@cendio.se> for Cendio AB |
| 5 | ; Copyright 2009 D. R. Commander |
| 6 | ; |
| 7 | ; Based on |
| 8 | ; x86 SIMD extension for IJG JPEG library |
| 9 | ; Copyright (C) 1999-2006, MIYASAKA Masaru. |
| 10 | ; For conditions of distribution and use, see copyright notice in jsimdext.inc |
| 11 | ; |
| 12 | ; This file should be assembled with NASM (Netwide Assembler), |
| 13 | ; can *not* be assembled with Microsoft's MASM or any compatible |
| 14 | ; assembler (including Borland's Turbo Assembler). |
| 15 | ; NASM is available from http://nasm.sourceforge.net/ or |
| 16 | ; http://sourceforge.net/project/showfiles.php?group_id=6208 |
| 17 | ; |
| 18 | ; [TAB8] |
| 19 | |
| 20 | %include "jsimdext.inc" |
| 21 | |
| 22 | ; -------------------------------------------------------------------------- |
| 23 | SECTION SEG_TEXT |
| 24 | BITS 64 |
| 25 | ; |
| 26 | ; Check if the CPU supports SIMD instructions |
| 27 | ; |
| 28 | ; GLOBAL(unsigned int) |
| 29 | ; jpeg_simd_cpu_support (void) |
| 30 | ; |
| 31 | |
| 32 | align 16 |
| 33 | global EXTN(jpeg_simd_cpu_support) |
| 34 | |
| 35 | EXTN(jpeg_simd_cpu_support): |
| 36 | push rbx |
| 37 | |
| 38 | xor rdi,rdi ; simd support flag |
| 39 | |
| 40 | pushfq |
| 41 | pop rax |
| 42 | mov rdx,rax |
| 43 | xor rax, 1<<21 ; flip ID bit in EFLAGS |
| 44 | push rax |
| 45 | popfq |
| 46 | pushfq |
| 47 | pop rax |
| 48 | xor rax,rdx |
| 49 | jz short .return ; CPUID is not supported |
| 50 | |
| 51 | ; Check for MMX instruction support |
| 52 | xor rax,rax |
| 53 | cpuid |
| 54 | test rax,rax |
| 55 | jz short .return |
| 56 | |
| 57 | xor rax,rax |
| 58 | inc rax |
| 59 | cpuid |
| 60 | mov rax,rdx ; rax = Standard feature flags |
| 61 | |
| 62 | test rax, 1<<23 ; bit23:MMX |
| 63 | jz short .no_mmx |
| 64 | or rdi, byte JSIMD_MMX |
| 65 | .no_mmx: |
| 66 | test rax, 1<<25 ; bit25:SSE |
| 67 | jz short .no_sse |
| 68 | or rdi, byte JSIMD_SSE |
| 69 | .no_sse: |
| 70 | test rax, 1<<26 ; bit26:SSE2 |
| 71 | jz short .no_sse2 |
| 72 | or rdi, byte JSIMD_SSE2 |
| 73 | .no_sse2: |
| 74 | |
| 75 | ; Check for 3DNow! instruction support |
| 76 | mov eax, 0x80000000 |
| 77 | cpuid |
| 78 | cmp eax, 0x80000000 |
| 79 | jbe short .return |
| 80 | |
| 81 | mov rax, 0x80000001 |
| 82 | cpuid |
| 83 | mov rax,rdx ; eax = Extended feature flags |
| 84 | |
| 85 | test eax, 1<<31 ; bit31:3DNow!(vendor independent) |
| 86 | jz short .no_3dnow |
| 87 | or edi, byte JSIMD_3DNOW |
| 88 | .no_3dnow: |
| 89 | |
| 90 | .return: |
| 91 | mov rax,rdi |
| 92 | |
| 93 | pop rbx |
| 94 | ret |
| 95 | |