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gerrit.omnirom.org / android_bionic / e54c49050368cda50aa98af653e80f660467e246 / . / libc / kernel / uapi / linux / i2c.h
blob: a812a7a8db4cdd47f191a7777651cb3271641c03 [file] [log] [blame]
Ben Cheng655a7c02013-10-16 16:09:24 -0700[diff] [blame]1/****************************************************************************
2 ****************************************************************************
3 ***
4 *** This header was automatically generated from a Linux kernel header
5 *** of the same name, to make information necessary for userspace to
6 *** call into the kernel available to libc. It contains only constants,
7 *** structures, and macros generated from the original header, and thus,
8 *** contains no copyrightable information.
9 ***
10 *** To edit the content of this header, modify the corresponding
11 *** source file (e.g. under external/kernel-headers/original/) then
12 *** run bionic/libc/kernel/tools/update_all.py
13 ***
14 *** Any manual change here will be lost the next time this script will
15 *** be run. You've been warned!
16 ***
17 ****************************************************************************
18 ****************************************************************************/
19#ifndef _UAPI_LINUX_I2C_H
20#define _UAPI_LINUX_I2C_H
21#include <linux/types.h>
22struct i2c_msg {
23/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
Tao Baod7db5942015-01-28 10:07:51 -0800[diff] [blame]24 __u16 addr;
25 __u16 flags;
Ben Cheng655a7c02013-10-16 16:09:24 -0700[diff] [blame]26#define I2C_M_RD 0x0001
Christopher Ferris106b3a82016-08-24 12:15:38 -0700[diff] [blame]27#define I2C_M_TEN 0x0010
Ben Cheng655a7c02013-10-16 16:09:24 -0700[diff] [blame]28/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
Ben Cheng655a7c02013-10-16 16:09:24 -0700[diff] [blame]29#define I2C_M_RECV_LEN 0x0400
Christopher Ferris106b3a82016-08-24 12:15:38 -0700[diff] [blame]30#define I2C_M_NO_RD_ACK 0x0800
31#define I2C_M_IGNORE_NAK 0x1000
32#define I2C_M_REV_DIR_ADDR 0x2000
33/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
34#define I2C_M_NOSTART 0x4000
35#define I2C_M_STOP 0x8000
Tao Baod7db5942015-01-28 10:07:51 -0800[diff] [blame]36 __u16 len;
37 __u8 * buf;
Ben Cheng655a7c02013-10-16 16:09:24 -0700[diff] [blame]38/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
39};
40#define I2C_FUNC_I2C 0x00000001
41#define I2C_FUNC_10BIT_ADDR 0x00000002
42#define I2C_FUNC_PROTOCOL_MANGLING 0x00000004
43/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
44#define I2C_FUNC_SMBUS_PEC 0x00000008
45#define I2C_FUNC_NOSTART 0x00000010
Christopher Ferris05d08e92016-02-04 13:16:38 -0800[diff] [blame]46#define I2C_FUNC_SLAVE 0x00000020
Ben Cheng655a7c02013-10-16 16:09:24 -0700[diff] [blame]47#define I2C_FUNC_SMBUS_BLOCK_PROC_CALL 0x00008000
Ben Cheng655a7c02013-10-16 16:09:24 -0700[diff] [blame]48/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
Christopher Ferris05d08e92016-02-04 13:16:38 -0800[diff] [blame]49#define I2C_FUNC_SMBUS_QUICK 0x00010000
Ben Cheng655a7c02013-10-16 16:09:24 -0700[diff] [blame]50#define I2C_FUNC_SMBUS_READ_BYTE 0x00020000
51#define I2C_FUNC_SMBUS_WRITE_BYTE 0x00040000
52#define I2C_FUNC_SMBUS_READ_BYTE_DATA 0x00080000
Ben Cheng655a7c02013-10-16 16:09:24 -0700[diff] [blame]53/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
Christopher Ferris05d08e92016-02-04 13:16:38 -0800[diff] [blame]54#define I2C_FUNC_SMBUS_WRITE_BYTE_DATA 0x00100000
Ben Cheng655a7c02013-10-16 16:09:24 -0700[diff] [blame]55#define I2C_FUNC_SMBUS_READ_WORD_DATA 0x00200000
56#define I2C_FUNC_SMBUS_WRITE_WORD_DATA 0x00400000
57#define I2C_FUNC_SMBUS_PROC_CALL 0x00800000
Ben Cheng655a7c02013-10-16 16:09:24 -0700[diff] [blame]58/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
Christopher Ferris05d08e92016-02-04 13:16:38 -0800[diff] [blame]59#define I2C_FUNC_SMBUS_READ_BLOCK_DATA 0x01000000
Ben Cheng655a7c02013-10-16 16:09:24 -0700[diff] [blame]60#define I2C_FUNC_SMBUS_WRITE_BLOCK_DATA 0x02000000
61#define I2C_FUNC_SMBUS_READ_I2C_BLOCK 0x04000000
62#define I2C_FUNC_SMBUS_WRITE_I2C_BLOCK 0x08000000
Ben Cheng655a7c02013-10-16 16:09:24 -0700[diff] [blame]63/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
Christopher Ferris05d08e92016-02-04 13:16:38 -0800[diff] [blame]64#define I2C_FUNC_SMBUS_BYTE (I2C_FUNC_SMBUS_READ_BYTE | I2C_FUNC_SMBUS_WRITE_BYTE)
Tao Baod7db5942015-01-28 10:07:51 -0800[diff] [blame]65#define I2C_FUNC_SMBUS_BYTE_DATA (I2C_FUNC_SMBUS_READ_BYTE_DATA | I2C_FUNC_SMBUS_WRITE_BYTE_DATA)
66#define I2C_FUNC_SMBUS_WORD_DATA (I2C_FUNC_SMBUS_READ_WORD_DATA | I2C_FUNC_SMBUS_WRITE_WORD_DATA)
67#define I2C_FUNC_SMBUS_BLOCK_DATA (I2C_FUNC_SMBUS_READ_BLOCK_DATA | I2C_FUNC_SMBUS_WRITE_BLOCK_DATA)
Ben Cheng655a7c02013-10-16 16:09:24 -0700[diff] [blame]68/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
Christopher Ferris05d08e92016-02-04 13:16:38 -0800[diff] [blame]69#define I2C_FUNC_SMBUS_I2C_BLOCK (I2C_FUNC_SMBUS_READ_I2C_BLOCK | I2C_FUNC_SMBUS_WRITE_I2C_BLOCK)
Tao Baod7db5942015-01-28 10:07:51 -0800[diff] [blame]70#define I2C_FUNC_SMBUS_EMUL (I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE | I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA | I2C_FUNC_SMBUS_PROC_CALL | I2C_FUNC_SMBUS_WRITE_BLOCK_DATA | I2C_FUNC_SMBUS_I2C_BLOCK | I2C_FUNC_SMBUS_PEC)
Ben Cheng655a7c02013-10-16 16:09:24 -0700[diff] [blame]71#define I2C_SMBUS_BLOCK_MAX 32
72union i2c_smbus_data {
Ben Cheng655a7c02013-10-16 16:09:24 -0700[diff] [blame]73/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
Christopher Ferris05d08e92016-02-04 13:16:38 -0800[diff] [blame]74 __u8 byte;
Tao Baod7db5942015-01-28 10:07:51 -0800[diff] [blame]75 __u16 word;
76 __u8 block[I2C_SMBUS_BLOCK_MAX + 2];
Ben Cheng655a7c02013-10-16 16:09:24 -0700[diff] [blame]77};
Ben Cheng655a7c02013-10-16 16:09:24 -0700[diff] [blame]78/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
Christopher Ferris05d08e92016-02-04 13:16:38 -0800[diff] [blame]79#define I2C_SMBUS_READ 1
Ben Cheng655a7c02013-10-16 16:09:24 -0700[diff] [blame]80#define I2C_SMBUS_WRITE 0
81#define I2C_SMBUS_QUICK 0
82#define I2C_SMBUS_BYTE 1
Ben Cheng655a7c02013-10-16 16:09:24 -0700[diff] [blame]83/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
Christopher Ferris05d08e92016-02-04 13:16:38 -0800[diff] [blame]84#define I2C_SMBUS_BYTE_DATA 2
Ben Cheng655a7c02013-10-16 16:09:24 -0700[diff] [blame]85#define I2C_SMBUS_WORD_DATA 3
86#define I2C_SMBUS_PROC_CALL 4
87#define I2C_SMBUS_BLOCK_DATA 5
Ben Cheng655a7c02013-10-16 16:09:24 -0700[diff] [blame]88/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
Christopher Ferris05d08e92016-02-04 13:16:38 -0800[diff] [blame]89#define I2C_SMBUS_I2C_BLOCK_BROKEN 6
Ben Cheng655a7c02013-10-16 16:09:24 -0700[diff] [blame]90#define I2C_SMBUS_BLOCK_PROC_CALL 7
91#define I2C_SMBUS_I2C_BLOCK_DATA 8
92#endif
Christopher Ferris05d08e92016-02-04 13:16:38 -0800[diff] [blame]93/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */