Elliott Hughes | 180edef | 2023-11-02 00:08:05 +0000 | [diff] [blame] | 1 | /* |
| 2 | * This file is auto-generated. Modifications will be lost. |
| 3 | * |
| 4 | * See https://android.googlesource.com/platform/bionic/+/master/libc/kernel/ |
| 5 | * for more information. |
| 6 | */ |
Christopher Ferris | 05d08e9 | 2016-02-04 13:16:38 -0800 | [diff] [blame] | 7 | #ifndef _LINUX__HFI1_USER_H |
| 8 | #define _LINUX__HFI1_USER_H |
| 9 | #include <linux/types.h> |
Christopher Ferris | 525ce91 | 2017-07-26 13:12:53 -0700 | [diff] [blame] | 10 | #include <rdma/rdma_user_ioctl.h> |
Christopher Ferris | 106b3a8 | 2016-08-24 12:15:38 -0700 | [diff] [blame] | 11 | #define HFI1_USER_SWMAJOR 6 |
Christopher Ferris | 48af7cb | 2017-02-21 12:35:09 -0800 | [diff] [blame] | 12 | #define HFI1_USER_SWMINOR 3 |
Christopher Ferris | 106b3a8 | 2016-08-24 12:15:38 -0700 | [diff] [blame] | 13 | #define HFI1_SWMAJOR_SHIFT 16 |
Christopher Ferris | 05d08e9 | 2016-02-04 13:16:38 -0800 | [diff] [blame] | 14 | #define HFI1_CAP_DMA_RTAIL (1UL << 0) |
| 15 | #define HFI1_CAP_SDMA (1UL << 1) |
Christopher Ferris | 106b3a8 | 2016-08-24 12:15:38 -0700 | [diff] [blame] | 16 | #define HFI1_CAP_SDMA_AHG (1UL << 2) |
Christopher Ferris | 05d08e9 | 2016-02-04 13:16:38 -0800 | [diff] [blame] | 17 | #define HFI1_CAP_EXTENDED_PSN (1UL << 3) |
| 18 | #define HFI1_CAP_HDRSUPP (1UL << 4) |
Christopher Ferris | d842e43 | 2019-03-07 10:21:59 -0800 | [diff] [blame] | 19 | #define HFI1_CAP_TID_RDMA (1UL << 5) |
Christopher Ferris | 05d08e9 | 2016-02-04 13:16:38 -0800 | [diff] [blame] | 20 | #define HFI1_CAP_USE_SDMA_HEAD (1UL << 6) |
Christopher Ferris | 106b3a8 | 2016-08-24 12:15:38 -0700 | [diff] [blame] | 21 | #define HFI1_CAP_MULTI_PKT_EGR (1UL << 7) |
Christopher Ferris | 05d08e9 | 2016-02-04 13:16:38 -0800 | [diff] [blame] | 22 | #define HFI1_CAP_NODROP_RHQ_FULL (1UL << 8) |
| 23 | #define HFI1_CAP_NODROP_EGR_FULL (1UL << 9) |
| 24 | #define HFI1_CAP_TID_UNMAP (1UL << 10) |
Christopher Ferris | 106b3a8 | 2016-08-24 12:15:38 -0700 | [diff] [blame] | 25 | #define HFI1_CAP_PRINT_UNIMPL (1UL << 11) |
Christopher Ferris | 05d08e9 | 2016-02-04 13:16:38 -0800 | [diff] [blame] | 26 | #define HFI1_CAP_ALLOW_PERM_JKEY (1UL << 12) |
| 27 | #define HFI1_CAP_NO_INTEGRITY (1UL << 13) |
| 28 | #define HFI1_CAP_PKEY_CHECK (1UL << 14) |
Christopher Ferris | 106b3a8 | 2016-08-24 12:15:38 -0700 | [diff] [blame] | 29 | #define HFI1_CAP_STATIC_RATE_CTRL (1UL << 15) |
Christopher Ferris | d842e43 | 2019-03-07 10:21:59 -0800 | [diff] [blame] | 30 | #define HFI1_CAP_OPFN (1UL << 16) |
Christopher Ferris | 05d08e9 | 2016-02-04 13:16:38 -0800 | [diff] [blame] | 31 | #define HFI1_CAP_SDMA_HEAD_CHECK (1UL << 17) |
| 32 | #define HFI1_CAP_EARLY_CREDIT_RETURN (1UL << 18) |
Christopher Ferris | 8177cdf | 2020-08-03 11:53:55 -0700 | [diff] [blame] | 33 | #define HFI1_CAP_AIP (1UL << 19) |
Christopher Ferris | 05d08e9 | 2016-02-04 13:16:38 -0800 | [diff] [blame] | 34 | #define HFI1_RCVHDR_ENTSIZE_2 (1UL << 0) |
| 35 | #define HFI1_RCVHDR_ENTSIZE_16 (1UL << 1) |
Christopher Ferris | 05d08e9 | 2016-02-04 13:16:38 -0800 | [diff] [blame] | 36 | #define HFI1_RCVDHR_ENTSIZE_32 (1UL << 2) |
Christopher Ferris | 05d08e9 | 2016-02-04 13:16:38 -0800 | [diff] [blame] | 37 | #define _HFI1_EVENT_FROZEN_BIT 0 |
| 38 | #define _HFI1_EVENT_LINKDOWN_BIT 1 |
| 39 | #define _HFI1_EVENT_LID_CHANGE_BIT 2 |
| 40 | #define _HFI1_EVENT_LMC_CHANGE_BIT 3 |
Christopher Ferris | 05d08e9 | 2016-02-04 13:16:38 -0800 | [diff] [blame] | 41 | #define _HFI1_EVENT_SL2VL_CHANGE_BIT 4 |
Christopher Ferris | 106b3a8 | 2016-08-24 12:15:38 -0700 | [diff] [blame] | 42 | #define _HFI1_EVENT_TID_MMU_NOTIFY_BIT 5 |
| 43 | #define _HFI1_MAX_EVENT_BIT _HFI1_EVENT_TID_MMU_NOTIFY_BIT |
Christopher Ferris | 05d08e9 | 2016-02-04 13:16:38 -0800 | [diff] [blame] | 44 | #define HFI1_EVENT_FROZEN (1UL << _HFI1_EVENT_FROZEN_BIT) |
Christopher Ferris | 106b3a8 | 2016-08-24 12:15:38 -0700 | [diff] [blame] | 45 | #define HFI1_EVENT_LINKDOWN (1UL << _HFI1_EVENT_LINKDOWN_BIT) |
Christopher Ferris | 106b3a8 | 2016-08-24 12:15:38 -0700 | [diff] [blame] | 46 | #define HFI1_EVENT_LID_CHANGE (1UL << _HFI1_EVENT_LID_CHANGE_BIT) |
| 47 | #define HFI1_EVENT_LMC_CHANGE (1UL << _HFI1_EVENT_LMC_CHANGE_BIT) |
| 48 | #define HFI1_EVENT_SL2VL_CHANGE (1UL << _HFI1_EVENT_SL2VL_CHANGE_BIT) |
| 49 | #define HFI1_EVENT_TID_MMU_NOTIFY (1UL << _HFI1_EVENT_TID_MMU_NOTIFY_BIT) |
Christopher Ferris | 05d08e9 | 2016-02-04 13:16:38 -0800 | [diff] [blame] | 50 | #define HFI1_STATUS_INITTED 0x1 |
Christopher Ferris | 05d08e9 | 2016-02-04 13:16:38 -0800 | [diff] [blame] | 51 | #define HFI1_STATUS_CHIP_PRESENT 0x20 |
| 52 | #define HFI1_STATUS_IB_READY 0x40 |
| 53 | #define HFI1_STATUS_IB_CONF 0x80 |
Christopher Ferris | 106b3a8 | 2016-08-24 12:15:38 -0700 | [diff] [blame] | 54 | #define HFI1_STATUS_HWERROR 0x200 |
Christopher Ferris | 05d08e9 | 2016-02-04 13:16:38 -0800 | [diff] [blame] | 55 | #define HFI1_MAX_SHARED_CTXTS 8 |
| 56 | #define HFI1_POLL_TYPE_ANYRCV 0x0 |
| 57 | #define HFI1_POLL_TYPE_URGENT 0x1 |
Christopher Ferris | 05d08e9 | 2016-02-04 13:16:38 -0800 | [diff] [blame] | 58 | enum hfi1_sdma_comp_state { |
| 59 | FREE = 0, |
| 60 | QUEUED, |
| 61 | COMPLETE, |
Christopher Ferris | 05d08e9 | 2016-02-04 13:16:38 -0800 | [diff] [blame] | 62 | ERROR |
| 63 | }; |
| 64 | struct hfi1_sdma_comp_entry { |
| 65 | __u32 status; |
Christopher Ferris | 05d08e9 | 2016-02-04 13:16:38 -0800 | [diff] [blame] | 66 | __u32 errcode; |
| 67 | }; |
| 68 | struct hfi1_status { |
Christopher Ferris | 76a1d45 | 2018-06-27 14:12:29 -0700 | [diff] [blame] | 69 | __aligned_u64 dev; |
| 70 | __aligned_u64 port; |
Christopher Ferris | 7447a1c | 2022-10-04 18:24:44 -0700 | [diff] [blame] | 71 | char freezemsg[]; |
Christopher Ferris | 05d08e9 | 2016-02-04 13:16:38 -0800 | [diff] [blame] | 72 | }; |
Christopher Ferris | 05d08e9 | 2016-02-04 13:16:38 -0800 | [diff] [blame] | 73 | enum sdma_req_opcode { |
Christopher Ferris | 05d08e9 | 2016-02-04 13:16:38 -0800 | [diff] [blame] | 74 | EXPECTED = 0, |
| 75 | EAGER |
| 76 | }; |
| 77 | #define HFI1_SDMA_REQ_VERSION_MASK 0xF |
Christopher Ferris | 05d08e9 | 2016-02-04 13:16:38 -0800 | [diff] [blame] | 78 | #define HFI1_SDMA_REQ_VERSION_SHIFT 0x0 |
| 79 | #define HFI1_SDMA_REQ_OPCODE_MASK 0xF |
| 80 | #define HFI1_SDMA_REQ_OPCODE_SHIFT 0x4 |
| 81 | #define HFI1_SDMA_REQ_IOVCNT_MASK 0xFF |
Christopher Ferris | 05d08e9 | 2016-02-04 13:16:38 -0800 | [diff] [blame] | 82 | #define HFI1_SDMA_REQ_IOVCNT_SHIFT 0x8 |
| 83 | struct sdma_req_info { |
| 84 | __u16 ctrl; |
| 85 | __u16 npkts; |
Christopher Ferris | 05d08e9 | 2016-02-04 13:16:38 -0800 | [diff] [blame] | 86 | __u16 fragsize; |
| 87 | __u16 comp_idx; |
Christopher Ferris | 76a1d45 | 2018-06-27 14:12:29 -0700 | [diff] [blame] | 88 | } __attribute__((__packed__)); |
Christopher Ferris | 05d08e9 | 2016-02-04 13:16:38 -0800 | [diff] [blame] | 89 | struct hfi1_kdeth_header { |
Christopher Ferris | 05d08e9 | 2016-02-04 13:16:38 -0800 | [diff] [blame] | 90 | __le32 ver_tid_offset; |
| 91 | __le16 jkey; |
| 92 | __le16 hcrc; |
| 93 | __le32 swdata[7]; |
Christopher Ferris | 76a1d45 | 2018-06-27 14:12:29 -0700 | [diff] [blame] | 94 | } __attribute__((__packed__)); |
Christopher Ferris | 05d08e9 | 2016-02-04 13:16:38 -0800 | [diff] [blame] | 95 | struct hfi1_pkt_header { |
| 96 | __le16 pbc[4]; |
| 97 | __be16 lrh[4]; |
Christopher Ferris | 05d08e9 | 2016-02-04 13:16:38 -0800 | [diff] [blame] | 98 | __be32 bth[3]; |
| 99 | struct hfi1_kdeth_header kdeth; |
Christopher Ferris | 76a1d45 | 2018-06-27 14:12:29 -0700 | [diff] [blame] | 100 | } __attribute__((__packed__)); |
Christopher Ferris | 05d08e9 | 2016-02-04 13:16:38 -0800 | [diff] [blame] | 101 | enum hfi1_ureg { |
Christopher Ferris | 05d08e9 | 2016-02-04 13:16:38 -0800 | [diff] [blame] | 102 | ur_rcvhdrtail = 0, |
| 103 | ur_rcvhdrhead = 1, |
| 104 | ur_rcvegrindextail = 2, |
| 105 | ur_rcvegrindexhead = 3, |
Christopher Ferris | 05d08e9 | 2016-02-04 13:16:38 -0800 | [diff] [blame] | 106 | ur_rcvegroffsettail = 4, |
| 107 | ur_maxreg, |
| 108 | ur_rcvtidflowtable = 256 |
| 109 | }; |
Christopher Ferris | 05d08e9 | 2016-02-04 13:16:38 -0800 | [diff] [blame] | 110 | #endif |