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Raghu Gandham405b8022012-07-25 18:16:42 -07001/* $OpenBSD: asm.h,v 1.7 2004/10/20 12:49:15 pefo Exp $ */
2
3/*
4 * Copyright (c) 2001-2002 Opsycon AB (www.opsycon.se / www.opsycon.com)
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
16 * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
17 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
19 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 * SUCH DAMAGE.
26 *
27 */
Elliott Hughesd4ca2312017-10-11 22:27:45 -070028
29#pragma once
Raghu Gandham405b8022012-07-25 18:16:42 -070030
Dimitry Ivanove6ee9602016-10-27 02:32:47 -070031#define __bionic_asm_align 16
Raghu Gandham405b8022012-07-25 18:16:42 -070032
Elliott Hughes851e68a2014-02-19 16:53:20 -080033#undef __bionic_asm_custom_entry
34#undef __bionic_asm_custom_end
35#define __bionic_asm_custom_entry(f) .ent f
36#define __bionic_asm_custom_end(f) .end f
37
Raghu Gandham405b8022012-07-25 18:16:42 -070038#define _MIPS_ISA_MIPS1 1 /* R2000/R3000 */
39#define _MIPS_ISA_MIPS2 2 /* R4000/R6000 */
40#define _MIPS_ISA_MIPS3 3 /* R4000 */
41#define _MIPS_ISA_MIPS4 4 /* TFP (R1x000) */
Raghu Gandham405b8022012-07-25 18:16:42 -070042#define _MIPS_ISA_MIPS5 5
43#define _MIPS_ISA_MIPS32 6
44#define _MIPS_ISA_MIPS64 7
Raghu Gandham405b8022012-07-25 18:16:42 -070045
46#if !defined(ABICALLS) && !defined(_NO_ABICALLS)
47#define ABICALLS .abicalls
48#endif
49
50#if defined(ABICALLS) && !defined(_KERNEL)
51 ABICALLS
52#endif
53
Raghu Gandham405b8022012-07-25 18:16:42 -070054/*
55 * Define how to access unaligned data word
56 */
Raghu Gandham405b8022012-07-25 18:16:42 -070057#define LWLO lwl
58#define LWHI lwr
59#define SWLO swl
60#define SWHI swr
61#define LDLO ldl
62#define LDHI ldr
63#define SDLO sdl
64#define SDHI sdr
Raghu Gandham405b8022012-07-25 18:16:42 -070065
66/*
67 * Define programming environment for ABI.
68 */
69#if defined(ABICALLS) && !defined(_KERNEL) && !defined(_STANDALONE)
70
Raghu Gandham405b8022012-07-25 18:16:42 -070071#if (_MIPS_SIM == _ABIO32) || (_MIPS_SIM == _ABI32)
72#define NARGSAVE 4
73
74#define SETUP_GP \
75 .set noreorder; \
Elliott Hughesd4ca2312017-10-11 22:27:45 -070076 .cpload $t9; \
Raghu Gandham405b8022012-07-25 18:16:42 -070077 .set reorder;
78
79#define SAVE_GP(x) \
80 .cprestore x
81
82#define SETUP_GP64(gpoff, name)
83#define RESTORE_GP64
84#endif
85
86#if (_MIPS_SIM == _ABI64) || (_MIPS_SIM == _ABIN32)
87#define NARGSAVE 0
88
89#define SETUP_GP
90#define SAVE_GP(x)
91#define SETUP_GP64(gpoff, name) \
Elliott Hughesd4ca2312017-10-11 22:27:45 -070092 .cpsetup $t9, gpoff, name
Raghu Gandham405b8022012-07-25 18:16:42 -070093#define RESTORE_GP64 \
94 .cpreturn
95#endif
96
97#define MKFSIZ(narg,locals) (((narg+locals)*REGSZ+31)&(~31))
98
99#else /* defined(ABICALLS) && !defined(_KERNEL) */
100
101#define NARGSAVE 4
102#define SETUP_GP
103#define SAVE_GP(x)
104
105#define ALIGNSZ 16 /* Stack layout alignment */
106#define FRAMESZ(sz) (((sz) + (ALIGNSZ-1)) & ~(ALIGNSZ-1))
107
108#endif
109
110/*
111 * Basic register operations based on selected ISA
112 */
113#if (_MIPS_ISA == _MIPS_ISA_MIPS1 || _MIPS_ISA == _MIPS_ISA_MIPS2 || _MIPS_ISA == _MIPS_ISA_MIPS32)
114#define REGSZ 4 /* 32 bit mode register size */
115#define LOGREGSZ 2 /* log rsize */
116#define REG_S sw
117#define REG_L lw
118#define CF_SZ 24 /* Call frame size */
119#define CF_ARGSZ 16 /* Call frame arg size */
120#define CF_RA_OFFS 20 /* Call ra save offset */
121#endif
122
Elliott Hughes851e68a2014-02-19 16:53:20 -0800123#if (_MIPS_ISA == _MIPS_ISA_MIPS3 || _MIPS_ISA == _MIPS_ISA_MIPS4 || _MIPS_ISA == _MIPS_ISA_MIPS64)
Raghu Gandham405b8022012-07-25 18:16:42 -0700124#define REGSZ 8 /* 64 bit mode register size */
125#define LOGREGSZ 3 /* log rsize */
126#define REG_S sd
127#define REG_L ld
128#define CF_SZ 48 /* Call frame size (multiple of ALIGNSZ) */
129#define CF_ARGSZ 32 /* Call frame arg size */
130#define CF_RA_OFFS 40 /* Call ra save offset */
131#endif
132
133#define REGSZ_FP 8 /* 64 bit FP register size */
134
135#ifndef __LP64__
136#define PTR_L lw
137#define PTR_S sw
138#define PTR_SUB sub
139#define PTR_ADD add
140#define PTR_SUBU subu
141#define PTR_ADDU addu
142#define LI li
143#define LA la
144#define PTR_SLL sll
145#define PTR_SRL srl
146#define PTR_VAL .word
147#else
148#define PTR_L ld
149#define PTR_S sd
150#define PTR_ADD dadd
151#define PTR_SUB dsub
152#define PTR_SUBU dsubu
153#define PTR_ADDU daddu
154#define LI dli
155#define LA dla
156#define PTR_SLL dsll
157#define PTR_SRL dsrl
158#define PTR_VAL .dword
159#endif
160
161/*
Raghu Gandham405b8022012-07-25 18:16:42 -0700162 * LEAF(x, fsize)
163 *
164 * Declare a leaf routine.
165 */
166#define LEAF(x, fsize) \
167 .align 3; \
168 .globl x; \
169 .ent x, 0; \
170x: ; \
Elliott Hughes851e68a2014-02-19 16:53:20 -0800171 .cfi_startproc; \
Elliott Hughesd4ca2312017-10-11 22:27:45 -0700172 .frame $sp, fsize, $ra; \
Raghu Gandham405b8022012-07-25 18:16:42 -0700173 SETUP_GP \
Raghu Gandham405b8022012-07-25 18:16:42 -0700174
175/*
176 * NON_LEAF(x)
177 *
178 * Declare a non-leaf routine (a routine that makes other C calls).
179 */
180#define NON_LEAF(x, fsize, retpc) \
181 .align 3; \
182 .globl x; \
183 .ent x, 0; \
184x: ; \
Elliott Hughes851e68a2014-02-19 16:53:20 -0800185 .cfi_startproc; \
Elliott Hughesd4ca2312017-10-11 22:27:45 -0700186 .frame $sp, fsize, retpc; \
Raghu Gandham405b8022012-07-25 18:16:42 -0700187 SETUP_GP \