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gerrit.omnirom.org / android_bionic / b851c4c5bf1af45af585555d4151b17b9ccf4ef0 / . / libc / kernel / uapi / linux / virtio_snd.h
blob: e4ec8cda122430c63355317adc287d025300a87c [file] [log] [blame]
Elliott Hughes180edef2023-11-02 00:08:05 +0000[diff] [blame]1/*
2 * This file is auto-generated. Modifications will be lost.
3 *
4 * See https://android.googlesource.com/platform/bionic/+/master/libc/kernel/
5 * for more information.
6 */
Christopher Ferrisfcc3b4f2021-07-01 01:30:21 +0000[diff] [blame]7#ifndef VIRTIO_SND_IF_H
8#define VIRTIO_SND_IF_H
9#include <linux/virtio_types.h>
10struct virtio_snd_config {
11 __le32 jacks;
12 __le32 streams;
13 __le32 chmaps;
14};
15enum {
16 VIRTIO_SND_VQ_CONTROL = 0,
17 VIRTIO_SND_VQ_EVENT,
18 VIRTIO_SND_VQ_TX,
19 VIRTIO_SND_VQ_RX,
20 VIRTIO_SND_VQ_MAX
21};
22enum {
23 VIRTIO_SND_D_OUTPUT = 0,
24 VIRTIO_SND_D_INPUT
25};
26enum {
27 VIRTIO_SND_R_JACK_INFO = 1,
28 VIRTIO_SND_R_JACK_REMAP,
29 VIRTIO_SND_R_PCM_INFO = 0x0100,
30 VIRTIO_SND_R_PCM_SET_PARAMS,
31 VIRTIO_SND_R_PCM_PREPARE,
32 VIRTIO_SND_R_PCM_RELEASE,
33 VIRTIO_SND_R_PCM_START,
34 VIRTIO_SND_R_PCM_STOP,
35 VIRTIO_SND_R_CHMAP_INFO = 0x0200,
36 VIRTIO_SND_EVT_JACK_CONNECTED = 0x1000,
37 VIRTIO_SND_EVT_JACK_DISCONNECTED,
38 VIRTIO_SND_EVT_PCM_PERIOD_ELAPSED = 0x1100,
39 VIRTIO_SND_EVT_PCM_XRUN,
40 VIRTIO_SND_S_OK = 0x8000,
41 VIRTIO_SND_S_BAD_MSG,
42 VIRTIO_SND_S_NOT_SUPP,
43 VIRTIO_SND_S_IO_ERR
44};
45struct virtio_snd_hdr {
46 __le32 code;
47};
48struct virtio_snd_event {
49 struct virtio_snd_hdr hdr;
50 __le32 data;
51};
52struct virtio_snd_query_info {
53 struct virtio_snd_hdr hdr;
54 __le32 start_id;
55 __le32 count;
56 __le32 size;
57};
58struct virtio_snd_info {
59 __le32 hda_fn_nid;
60};
61struct virtio_snd_jack_hdr {
62 struct virtio_snd_hdr hdr;
63 __le32 jack_id;
64};
65enum {
66 VIRTIO_SND_JACK_F_REMAP = 0
67};
68struct virtio_snd_jack_info {
69 struct virtio_snd_info hdr;
70 __le32 features;
71 __le32 hda_reg_defconf;
72 __le32 hda_reg_caps;
73 __u8 connected;
74 __u8 padding[7];
75};
76struct virtio_snd_jack_remap {
77 struct virtio_snd_jack_hdr hdr;
78 __le32 association;
79 __le32 sequence;
80};
81struct virtio_snd_pcm_hdr {
82 struct virtio_snd_hdr hdr;
83 __le32 stream_id;
84};
85enum {
86 VIRTIO_SND_PCM_F_SHMEM_HOST = 0,
87 VIRTIO_SND_PCM_F_SHMEM_GUEST,
88 VIRTIO_SND_PCM_F_MSG_POLLING,
89 VIRTIO_SND_PCM_F_EVT_SHMEM_PERIODS,
90 VIRTIO_SND_PCM_F_EVT_XRUNS
91};
92enum {
93 VIRTIO_SND_PCM_FMT_IMA_ADPCM = 0,
94 VIRTIO_SND_PCM_FMT_MU_LAW,
95 VIRTIO_SND_PCM_FMT_A_LAW,
96 VIRTIO_SND_PCM_FMT_S8,
97 VIRTIO_SND_PCM_FMT_U8,
98 VIRTIO_SND_PCM_FMT_S16,
99 VIRTIO_SND_PCM_FMT_U16,
100 VIRTIO_SND_PCM_FMT_S18_3,
101 VIRTIO_SND_PCM_FMT_U18_3,
102 VIRTIO_SND_PCM_FMT_S20_3,
103 VIRTIO_SND_PCM_FMT_U20_3,
104 VIRTIO_SND_PCM_FMT_S24_3,
105 VIRTIO_SND_PCM_FMT_U24_3,
106 VIRTIO_SND_PCM_FMT_S20,
107 VIRTIO_SND_PCM_FMT_U20,
108 VIRTIO_SND_PCM_FMT_S24,
109 VIRTIO_SND_PCM_FMT_U24,
110 VIRTIO_SND_PCM_FMT_S32,
111 VIRTIO_SND_PCM_FMT_U32,
112 VIRTIO_SND_PCM_FMT_FLOAT,
113 VIRTIO_SND_PCM_FMT_FLOAT64,
114 VIRTIO_SND_PCM_FMT_DSD_U8,
115 VIRTIO_SND_PCM_FMT_DSD_U16,
116 VIRTIO_SND_PCM_FMT_DSD_U32,
117 VIRTIO_SND_PCM_FMT_IEC958_SUBFRAME
118};
119enum {
120 VIRTIO_SND_PCM_RATE_5512 = 0,
121 VIRTIO_SND_PCM_RATE_8000,
122 VIRTIO_SND_PCM_RATE_11025,
123 VIRTIO_SND_PCM_RATE_16000,
124 VIRTIO_SND_PCM_RATE_22050,
125 VIRTIO_SND_PCM_RATE_32000,
126 VIRTIO_SND_PCM_RATE_44100,
127 VIRTIO_SND_PCM_RATE_48000,
128 VIRTIO_SND_PCM_RATE_64000,
129 VIRTIO_SND_PCM_RATE_88200,
130 VIRTIO_SND_PCM_RATE_96000,
131 VIRTIO_SND_PCM_RATE_176400,
132 VIRTIO_SND_PCM_RATE_192000,
133 VIRTIO_SND_PCM_RATE_384000
134};
135struct virtio_snd_pcm_info {
136 struct virtio_snd_info hdr;
137 __le32 features;
138 __le64 formats;
139 __le64 rates;
140 __u8 direction;
141 __u8 channels_min;
142 __u8 channels_max;
143 __u8 padding[5];
144};
145struct virtio_snd_pcm_set_params {
146 struct virtio_snd_pcm_hdr hdr;
147 __le32 buffer_bytes;
148 __le32 period_bytes;
149 __le32 features;
150 __u8 channels;
151 __u8 format;
152 __u8 rate;
153 __u8 padding;
154};
155struct virtio_snd_pcm_xfer {
156 __le32 stream_id;
157};
158struct virtio_snd_pcm_status {
159 __le32 status;
160 __le32 latency_bytes;
161};
162struct virtio_snd_chmap_hdr {
163 struct virtio_snd_hdr hdr;
164 __le32 chmap_id;
165};
166enum {
167 VIRTIO_SND_CHMAP_NONE = 0,
168 VIRTIO_SND_CHMAP_NA,
169 VIRTIO_SND_CHMAP_MONO,
170 VIRTIO_SND_CHMAP_FL,
171 VIRTIO_SND_CHMAP_FR,
172 VIRTIO_SND_CHMAP_RL,
173 VIRTIO_SND_CHMAP_RR,
174 VIRTIO_SND_CHMAP_FC,
175 VIRTIO_SND_CHMAP_LFE,
176 VIRTIO_SND_CHMAP_SL,
177 VIRTIO_SND_CHMAP_SR,
178 VIRTIO_SND_CHMAP_RC,
179 VIRTIO_SND_CHMAP_FLC,
180 VIRTIO_SND_CHMAP_FRC,
181 VIRTIO_SND_CHMAP_RLC,
182 VIRTIO_SND_CHMAP_RRC,
183 VIRTIO_SND_CHMAP_FLW,
184 VIRTIO_SND_CHMAP_FRW,
185 VIRTIO_SND_CHMAP_FLH,
186 VIRTIO_SND_CHMAP_FCH,
187 VIRTIO_SND_CHMAP_FRH,
188 VIRTIO_SND_CHMAP_TC,
189 VIRTIO_SND_CHMAP_TFL,
190 VIRTIO_SND_CHMAP_TFR,
191 VIRTIO_SND_CHMAP_TFC,
192 VIRTIO_SND_CHMAP_TRL,
193 VIRTIO_SND_CHMAP_TRR,
194 VIRTIO_SND_CHMAP_TRC,
195 VIRTIO_SND_CHMAP_TFLC,
196 VIRTIO_SND_CHMAP_TFRC,
197 VIRTIO_SND_CHMAP_TSL,
198 VIRTIO_SND_CHMAP_TSR,
199 VIRTIO_SND_CHMAP_LLFE,
200 VIRTIO_SND_CHMAP_RLFE,
201 VIRTIO_SND_CHMAP_BC,
202 VIRTIO_SND_CHMAP_BLC,
203 VIRTIO_SND_CHMAP_BRC
204};
205#define VIRTIO_SND_CHMAP_MAX_SIZE 18
206struct virtio_snd_chmap_info {
207 struct virtio_snd_info hdr;
208 __u8 direction;
209 __u8 channels;
210 __u8 positions[VIRTIO_SND_CHMAP_MAX_SIZE];
211};
212#endif