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Elliott Hughes180edef2023-11-02 00:08:05 +00001/*
2 * This file is auto-generated. Modifications will be lost.
3 *
4 * See https://android.googlesource.com/platform/bionic/+/master/libc/kernel/
5 * for more information.
6 */
Ben Cheng655a7c02013-10-16 16:09:24 -07007#ifndef __SOUND_HDSPM_H
8#define __SOUND_HDSPM_H
Christopher Ferrisbb9fcb42020-04-06 11:38:04 -07009#ifdef __linux__
Christopher Ferris05d08e92016-02-04 13:16:38 -080010#include <linux/types.h>
Christopher Ferrisbb9fcb42020-04-06 11:38:04 -070011#endif
Ben Cheng655a7c02013-10-16 16:09:24 -070012#define HDSPM_MAX_CHANNELS 64
Christopher Ferris05d08e92016-02-04 13:16:38 -080013enum hdspm_io_type {
Tao Baod7db5942015-01-28 10:07:51 -080014 MADI,
15 MADIface,
16 AIO,
Christopher Ferris05d08e92016-02-04 13:16:38 -080017 AES32,
Tao Baod7db5942015-01-28 10:07:51 -080018 RayDAT
Ben Cheng655a7c02013-10-16 16:09:24 -070019};
20enum hdspm_speed {
Christopher Ferris05d08e92016-02-04 13:16:38 -080021 ss,
Tao Baod7db5942015-01-28 10:07:51 -080022 ds,
23 qs
Ben Cheng655a7c02013-10-16 16:09:24 -070024};
25struct hdspm_peak_rms {
Christopher Ferris05d08e92016-02-04 13:16:38 -080026 __u32 input_peaks[64];
27 __u32 playback_peaks[64];
28 __u32 output_peaks[64];
Christopher Ferris05d08e92016-02-04 13:16:38 -080029 __u64 input_rms[64];
30 __u64 playback_rms[64];
31 __u64 output_rms[64];
32 __u8 speed;
Tao Baod7db5942015-01-28 10:07:51 -080033 int status2;
Ben Cheng655a7c02013-10-16 16:09:24 -070034};
Tao Baod7db5942015-01-28 10:07:51 -080035#define SNDRV_HDSPM_IOCTL_GET_PEAK_RMS _IOR('H', 0x42, struct hdspm_peak_rms)
Ben Cheng655a7c02013-10-16 16:09:24 -070036struct hdspm_config {
Christopher Ferris05d08e92016-02-04 13:16:38 -080037 unsigned char pref_sync_ref;
Tao Baod7db5942015-01-28 10:07:51 -080038 unsigned char wordclock_sync_check;
39 unsigned char madi_sync_check;
40 unsigned int system_sample_rate;
Christopher Ferris05d08e92016-02-04 13:16:38 -080041 unsigned int autosync_sample_rate;
Tao Baod7db5942015-01-28 10:07:51 -080042 unsigned char system_clock_mode;
43 unsigned char clock_source;
44 unsigned char autosync_ref;
Christopher Ferris05d08e92016-02-04 13:16:38 -080045 unsigned char line_out;
Tao Baod7db5942015-01-28 10:07:51 -080046 unsigned int passthru;
47 unsigned int analog_out;
Ben Cheng655a7c02013-10-16 16:09:24 -070048};
Christopher Ferris05d08e92016-02-04 13:16:38 -080049#define SNDRV_HDSPM_IOCTL_GET_CONFIG _IOR('H', 0x41, struct hdspm_config)
Ben Cheng655a7c02013-10-16 16:09:24 -070050enum hdspm_ltc_format {
Tao Baod7db5942015-01-28 10:07:51 -080051 format_invalid,
52 fps_24,
Christopher Ferris05d08e92016-02-04 13:16:38 -080053 fps_25,
Tao Baod7db5942015-01-28 10:07:51 -080054 fps_2997,
55 fps_30
Ben Cheng655a7c02013-10-16 16:09:24 -070056};
Christopher Ferris05d08e92016-02-04 13:16:38 -080057enum hdspm_ltc_frame {
Tao Baod7db5942015-01-28 10:07:51 -080058 frame_invalid,
59 drop_frame,
60 full_frame
Christopher Ferris05d08e92016-02-04 13:16:38 -080061};
Ben Cheng655a7c02013-10-16 16:09:24 -070062enum hdspm_ltc_input_format {
Tao Baod7db5942015-01-28 10:07:51 -080063 ntsc,
64 pal,
Christopher Ferris05d08e92016-02-04 13:16:38 -080065 no_video
Ben Cheng655a7c02013-10-16 16:09:24 -070066};
67struct hdspm_ltc {
Tao Baod7db5942015-01-28 10:07:51 -080068 unsigned int ltc;
Christopher Ferris05d08e92016-02-04 13:16:38 -080069 enum hdspm_ltc_format format;
Tao Baod7db5942015-01-28 10:07:51 -080070 enum hdspm_ltc_frame frame;
71 enum hdspm_ltc_input_format input_format;
Ben Cheng655a7c02013-10-16 16:09:24 -070072};
Christopher Ferris05d08e92016-02-04 13:16:38 -080073#define SNDRV_HDSPM_IOCTL_GET_LTC _IOR('H', 0x46, struct hdspm_ltc)
Ben Cheng655a7c02013-10-16 16:09:24 -070074enum hdspm_sync {
Tao Baod7db5942015-01-28 10:07:51 -080075 hdspm_sync_no_lock = 0,
76 hdspm_sync_lock = 1,
Christopher Ferris05d08e92016-02-04 13:16:38 -080077 hdspm_sync_sync = 2
Ben Cheng655a7c02013-10-16 16:09:24 -070078};
79enum hdspm_madi_input {
Tao Baod7db5942015-01-28 10:07:51 -080080 hdspm_input_optical = 0,
Christopher Ferris05d08e92016-02-04 13:16:38 -080081 hdspm_input_coax = 1
Ben Cheng655a7c02013-10-16 16:09:24 -070082};
83enum hdspm_madi_channel_format {
Tao Baod7db5942015-01-28 10:07:51 -080084 hdspm_format_ch_64 = 0,
Christopher Ferris05d08e92016-02-04 13:16:38 -080085 hdspm_format_ch_56 = 1
Ben Cheng655a7c02013-10-16 16:09:24 -070086};
87enum hdspm_madi_frame_format {
Tao Baod7db5942015-01-28 10:07:51 -080088 hdspm_frame_48 = 0,
Christopher Ferris05d08e92016-02-04 13:16:38 -080089 hdspm_frame_96 = 1
Ben Cheng655a7c02013-10-16 16:09:24 -070090};
91enum hdspm_syncsource {
Tao Baod7db5942015-01-28 10:07:51 -080092 syncsource_wc = 0,
Christopher Ferris05d08e92016-02-04 13:16:38 -080093 syncsource_madi = 1,
Tao Baod7db5942015-01-28 10:07:51 -080094 syncsource_tco = 2,
95 syncsource_sync = 3,
96 syncsource_none = 4
Ben Cheng655a7c02013-10-16 16:09:24 -070097};
Ben Cheng655a7c02013-10-16 16:09:24 -070098struct hdspm_status {
Christopher Ferris05d08e92016-02-04 13:16:38 -080099 __u8 card_type;
Tao Baod7db5942015-01-28 10:07:51 -0800100 enum hdspm_syncsource autosync_source;
Christopher Ferris05d08e92016-02-04 13:16:38 -0800101 __u64 card_clock;
102 __u32 master_period;
Tao Baod7db5942015-01-28 10:07:51 -0800103 union {
104 struct {
Christopher Ferris05d08e92016-02-04 13:16:38 -0800105 __u8 sync_wc;
106 __u8 sync_madi;
107 __u8 sync_tco;
108 __u8 sync_in;
Christopher Ferris05d08e92016-02-04 13:16:38 -0800109 __u8 madi_input;
110 __u8 channel_format;
111 __u8 frame_format;
Tao Baod7db5942015-01-28 10:07:51 -0800112 } madi;
Christopher Ferris05d08e92016-02-04 13:16:38 -0800113 } card_specific;
Ben Cheng655a7c02013-10-16 16:09:24 -0700114};
Tao Baod7db5942015-01-28 10:07:51 -0800115#define SNDRV_HDSPM_IOCTL_GET_STATUS _IOR('H', 0x47, struct hdspm_status)
Ben Cheng655a7c02013-10-16 16:09:24 -0700116#define HDSPM_ADDON_TCO 1
Christopher Ferris05d08e92016-02-04 13:16:38 -0800117struct hdspm_version {
118 __u8 card_type;
Tao Baod7db5942015-01-28 10:07:51 -0800119 char cardname[20];
120 unsigned int serial;
Christopher Ferris05d08e92016-02-04 13:16:38 -0800121 unsigned short firmware_rev;
Tao Baod7db5942015-01-28 10:07:51 -0800122 int addons;
Ben Cheng655a7c02013-10-16 16:09:24 -0700123};
124#define SNDRV_HDSPM_IOCTL_GET_VERSION _IOR('H', 0x48, struct hdspm_version)
Christopher Ferris05d08e92016-02-04 13:16:38 -0800125#define HDSPM_MIXER_CHANNELS HDSPM_MAX_CHANNELS
Ben Cheng655a7c02013-10-16 16:09:24 -0700126struct hdspm_channelfader {
Tao Baod7db5942015-01-28 10:07:51 -0800127 unsigned int in[HDSPM_MIXER_CHANNELS];
128 unsigned int pb[HDSPM_MIXER_CHANNELS];
Christopher Ferris05d08e92016-02-04 13:16:38 -0800129};
Ben Cheng655a7c02013-10-16 16:09:24 -0700130struct hdspm_mixer {
Tao Baod7db5942015-01-28 10:07:51 -0800131 struct hdspm_channelfader ch[HDSPM_MIXER_CHANNELS];
Ben Cheng655a7c02013-10-16 16:09:24 -0700132};
Christopher Ferris05d08e92016-02-04 13:16:38 -0800133struct hdspm_mixer_ioctl {
Tao Baod7db5942015-01-28 10:07:51 -0800134 struct hdspm_mixer * mixer;
Ben Cheng655a7c02013-10-16 16:09:24 -0700135};
136#define SNDRV_HDSPM_IOCTL_GET_MIXER _IOR('H', 0x44, struct hdspm_mixer_ioctl)
Ben Cheng655a7c02013-10-16 16:09:24 -0700137#endif